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10/16/2003
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03/13/2003
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10/23/2003
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10/23/2003
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10/23/2003
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10/23/2003
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09/27/2005
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10/23/2003
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09/19/2002
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10/23/2003
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10/23/2003
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03/15/2011
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Application #:
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10144250
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Filing Dt:
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05/13/2002
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Publication #:
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Pub Dt:
|
06/19/2003
| | | | |
Title:
|
COMMUNICATION NETWORK PROVIDING WIRELESS AND HARD-WIRED DYNAMIC ROUTING
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Patent #:
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Issue Dt:
|
08/15/2006
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Application #:
|
10144326
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Filing Dt:
|
05/13/2002
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Publication #:
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Pub Dt:
|
06/19/2003
| | | | |
Title:
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SYSTEM AND METHOD FOR RECOVERING AND DESERIALIZING A HIGH DATA RATE BIT STREAM
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Patent #:
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Issue Dt:
|
05/18/2004
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Application #:
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10144725
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Filing Dt:
|
05/15/2002
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Publication #:
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Pub Dt:
|
10/16/2003
| | | | |
Title:
|
NETWORK DEVICE HAVING A FLEXIBLE EEPROM FOR SETTING CONFIGURATION SETTINGS
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Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
10145408
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Filing Dt:
|
05/14/2002
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Publication #:
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Pub Dt:
|
11/20/2003
| | | | |
Title:
|
IO clamping circuit method utilizing output driver transistors
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Patent #:
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|
Issue Dt:
|
10/10/2006
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Application #:
|
10145411
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Filing Dt:
|
05/14/2002
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Publication #:
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Pub Dt:
|
08/14/2003
| | | | |
Title:
|
DUAL LINK DVI TRANSMITTER SERVICED BY SINGLE PHASE LOCKED LOOP
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Patent #:
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|
Issue Dt:
|
05/13/2003
|
Application #:
|
10145919
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Filing Dt:
|
05/15/2002
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Publication #:
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|
Pub Dt:
|
11/07/2002
| | | | |
Title:
|
DYNAMIC REGISTER WITH IDDQ TESTING CAPABILITY
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|
Patent #:
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Issue Dt:
|
03/16/2004
|
Application #:
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10145921
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Filing Dt:
|
05/15/2002
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Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
Title:
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CIRCUIT TECHNIQUE FOR HIGH SPEED LOW POWER DATA TRANSFER BUS
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Patent #:
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Issue Dt:
|
11/18/2003
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Application #:
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10146259
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Filing Dt:
|
05/15/2002
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Publication #:
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|
Pub Dt:
|
11/14/2002
| | | | |
Title:
|
ANALOG TO DIGITAL CONVERTER
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|
Patent #:
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|
Issue Dt:
|
03/07/2006
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Application #:
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10146554
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Filing Dt:
|
05/15/2002
|
Publication #:
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|
Pub Dt:
|
11/20/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR ADAPTIVE CPU POWER MANAGEMENT
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Patent #:
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Issue Dt:
|
05/03/2005
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Application #:
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10146639
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Filing Dt:
|
05/13/2002
|
Publication #:
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|
Pub Dt:
|
05/15/2003
| | | | |
Title:
|
METHOD AND SYSTEM FOR CROSS-LUMINANCE REDUCTION IN MULTI-STANDARD TELEVISION DECODERS
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|
Patent #:
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Issue Dt:
|
02/19/2008
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Application #:
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10147049
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Filing Dt:
|
05/17/2002
|
Publication #:
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|
Pub Dt:
|
07/31/2003
| | | | |
Title:
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PIPELINED PARALLEL PROCESSING OF FEEDBACK LOOPS IN A DIGITAL CIRCUIT
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Patent #:
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Issue Dt:
|
02/21/2006
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Application #:
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10147758
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Filing Dt:
|
05/16/2002
|
Publication #:
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|
Pub Dt:
|
11/20/2003
| | | | |
Title:
|
VARIABLE HAMMING ERROR CORRECTION FOR A ONE-TIME-PROGRAMMABLE-ROM
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Patent #:
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Issue Dt:
|
12/09/2008
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Application #:
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10149123
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Filing Dt:
|
06/07/2002
|
Publication #:
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|
Pub Dt:
|
12/19/2002
| | | | |
Title:
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INTERFERENCE CANCELLATION EQUIPMENT
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|
Patent #:
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Issue Dt:
|
08/03/2004
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Application #:
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10150186
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Filing Dt:
|
05/16/2002
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
Title:
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TIMING RECOVERY USING THE PILOT SIGNAL IN HIGH DEFINITION TV
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|
Patent #:
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|
Issue Dt:
|
10/23/2012
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Application #:
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10150187
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Filing Dt:
|
05/16/2002
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
Title:
|
APPARATUS FOR TRANSPORTING HOME NETWORKING FRAME-BASED COMMUNICATIONS SIGNALS OVER COAXIAL CABLES
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|
Patent #:
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|
Issue Dt:
|
11/09/2004
|
Application #:
|
10151981
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Filing Dt:
|
05/21/2002
|
Publication #:
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|
Pub Dt:
|
11/27/2003
| | | | |
Title:
|
NON-VOLATILE MEMORY CELL TECHNIQUES
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|
Patent #:
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Issue Dt:
|
06/06/2006
|
Application #:
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10153338
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Filing Dt:
|
05/22/2002
|
Publication #:
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|
Pub Dt:
|
11/27/2003
| | | | |
Title:
|
SYSTEM AND METHOD FOR PROTECTING TRANSPORT STREAM CONTENT
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|
Patent #:
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|
Issue Dt:
|
09/30/2003
|
Application #:
|
10153709
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Filing Dt:
|
05/24/2002
|
Title:
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DISTRIBUTED AVERAGING ANALOG TO DIGITAL CONVERTER TOPOLOGY
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|
Patent #:
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|
Issue Dt:
|
09/26/2006
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Application #:
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10154947
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Filing Dt:
|
05/24/2002
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
Title:
|
FAST COMPUTATION OF MULTI-INPUT-MULTI-OUTPUT DECISION FEEDBACK EQUALIZER COEFFICIENTS
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|
Patent #:
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|
Issue Dt:
|
04/13/2004
|
Application #:
|
10155156
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Filing Dt:
|
05/24/2002
|
Publication #:
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|
Pub Dt:
|
10/10/2002
| | | | |
Title:
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ACTIVE TERMINATION NETWORK
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|
Patent #:
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Issue Dt:
|
01/30/2007
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Application #:
|
10156532
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Filing Dt:
|
05/28/2002
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Title:
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CONTENT ADDRESSABLE MEMORY MATCH LINE DETECTION
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Patent #:
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Issue Dt:
|
12/28/2010
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Application #:
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10157079
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Filing Dt:
|
05/30/2002
|
Publication #:
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|
Pub Dt:
|
12/26/2002
| | | | |
Title:
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CONDITIONAL BRANCH INSTRUCTION CAPABLE OF TESTING A PLURALITY OF INDICATORS IN A PREDICATE REGISTER
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Patent #:
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Issue Dt:
|
09/26/2006
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Application #:
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10157867
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Filing Dt:
|
05/31/2002
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Publication #:
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|
Pub Dt:
|
12/04/2003
| | | | |
Title:
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AGGREGATED RATE CONTROL METHOD AND SYSTEM
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|
Patent #:
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Issue Dt:
|
07/20/2004
|
Application #:
|
10158000
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Filing Dt:
|
05/31/2002
|
Publication #:
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|
Pub Dt:
|
12/05/2002
| | | | |
Title:
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METHOD AND APPARATUS FOR CIRCUIT DESIGN
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|
Patent #:
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|
Issue Dt:
|
04/13/2004
|
Application #:
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10158193
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Filing Dt:
|
05/31/2002
|
Publication #:
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Pub Dt:
|
02/27/2003
| | | | |
Title:
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CLASS AB DIGITAL TO ANALOG CONVERTER/LINE DRIVER
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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10158240
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Filing Dt:
|
05/30/2002
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Publication #:
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Pub Dt:
|
02/13/2003
| | | | |
Title:
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TCP RECEIVER ACCELERATION
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|
Patent #:
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Issue Dt:
|
08/29/2006
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Application #:
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10158468
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Filing Dt:
|
05/30/2002
|
Publication #:
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|
Pub Dt:
|
12/04/2003
| | | | |
Title:
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LIMITING PERFORMANCE IN AN INTEGRATED CIRCUIT TO MEET EXPORT RESTRICTIONS
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Patent #:
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Issue Dt:
|
06/03/2003
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Application #:
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10158595
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Filing Dt:
|
05/31/2002
|
Title:
|
HIGH SPEED ANALOG TO DIGITAL CONVERTER
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|
Patent #:
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Issue Dt:
|
06/24/2003
|
Application #:
|
10158773
|
Filing Dt:
|
05/31/2002
|
Title:
|
SUBRANGING ANALOG TO DIGITAL CONVERTER WITH MULTI-PHASE CLOCK TIMING
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|
|
Patent #:
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Issue Dt:
|
02/24/2004
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Application #:
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10158774
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Filing Dt:
|
05/31/2002
|
Publication #:
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|
Pub Dt:
|
11/27/2003
| | | | |
Title:
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ANALOG TO DIGITAL CONVERTER WITH INTERPOLATION OF REFERENCE LADDER
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Patent #:
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Issue Dt:
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05/27/2003
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Application #:
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10158845
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Filing Dt:
|
06/03/2002
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Publication #:
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Pub Dt:
|
11/28/2002
| | | | |
Title:
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QUANTIZED QUEUE LENGTH ARBITER
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Patent #:
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Issue Dt:
|
12/13/2005
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Application #:
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10159365
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Filing Dt:
|
05/31/2002
|
Publication #:
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Pub Dt:
|
12/04/2003
| | | | |
Title:
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CHARGE PUMP FOR AN INTEGRATED CIRCUIT RECEIVER
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Patent #:
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Issue Dt:
|
06/10/2008
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Application #:
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10159788
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Filing Dt:
|
05/30/2002
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Publication #:
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Pub Dt:
|
12/04/2003
| | | | |
Title:
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METHOD AND APPARATUS FOR HIGH SPEED SIGNAL RECOVERY
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Patent #:
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Issue Dt:
|
02/28/2006
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Application #:
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10160143
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Filing Dt:
|
05/31/2002
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Publication #:
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Pub Dt:
|
12/18/2003
| | | | |
Title:
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METHODS AND APPARATUS FOR ACCELERATING SECURE SESSION PROCESSING
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Patent #:
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Issue Dt:
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05/20/2008
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Application #:
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10160322
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Filing Dt:
|
05/31/2002
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Publication #:
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Pub Dt:
|
12/04/2003
| | | | |
Title:
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METHODS AND APPARATUS FOR PERFORMING ENCRYPTION AND AUTHENTICATION
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10160335
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Filing Dt:
|
05/31/2002
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Publication #:
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Pub Dt:
|
12/18/2003
| | | | |
Title:
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A METHOD AND APPARATUS FOR PERFORMING ACCELERATED AUTHENTICATION AND DECRYPTION USING DATA BLOCKS
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10160915
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Filing Dt:
|
06/03/2002
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Publication #:
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Pub Dt:
|
12/04/2003
| | | | |
Title:
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UNCONDITIONALLY STABLE ON-CHIP FILTER AND APPLICATIONS THEREOF
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Patent #:
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Issue Dt:
|
05/10/2011
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Application #:
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10161475
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Filing Dt:
|
05/31/2002
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Publication #:
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Pub Dt:
|
12/04/2003
| | | | |
Title:
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DATA TRANSFER EFFICIENCY IN A CRYPTOGRAPHY ACCELERATOR SYSTEM
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|
|
Patent #:
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Issue Dt:
|
07/06/2004
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Application #:
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10161518
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Filing Dt:
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06/03/2002
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Publication #:
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Pub Dt:
|
12/04/2003
| | | | |
Title:
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ON-CHIP DIFFERENTIAL MULTI-LAYER INDUCTOR
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Patent #:
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Issue Dt:
|
11/08/2005
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Application #:
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10162062
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Filing Dt:
|
06/05/2002
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Publication #:
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Pub Dt:
|
12/12/2002
| | | | |
Title:
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SYSTEM AND METHOD FOR INTERLEAVING DATA IN A COMMUNICATION DEVICE
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