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Patent #:
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Issue Dt:
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12/07/1993
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Application #:
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07790953
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Filing Dt:
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11/12/1991
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Title:
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METHOD OF FORMING SHALLOW JUNCTIONS IN FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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02/22/1994
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Application #:
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07883113
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Filing Dt:
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05/14/1992
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Title:
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CONDUCTOR TRACK CONFIGURATION FOR VERY LARGE-SCALE INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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07/12/1994
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Application #:
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08074329
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Filing Dt:
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06/09/1993
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY ARRAY AND METHOD FOR OPERATING THE SAME
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Patent #:
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Issue Dt:
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01/10/1995
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Application #:
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08121725
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Filing Dt:
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09/15/1993
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Title:
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CMOS BUFFER HAVING OUTPUT TERMINAL OVERVOLATAGE CAUSED LATCH-UP PROTECTION
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Patent #:
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Issue Dt:
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10/03/1995
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Application #:
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08123647
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Filing Dt:
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09/17/1993
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Title:
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CMOS BUFFER CIRCUIT WITH CONTROLLED CURRENT SOURCE
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Patent #:
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Issue Dt:
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01/31/1995
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Application #:
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08123648
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Filing Dt:
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09/17/1993
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Title:
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MOS OUTPUT BUFFER CIRCUIT WITH CONTROLLED CURRENT SOURCE
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Patent #:
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Issue Dt:
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06/20/1995
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Application #:
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08238243
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Filing Dt:
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05/04/1994
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Title:
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INTEGRATED SEMICONDUCTOR CIRCUIT WITH ESD PROTECTION
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Patent #:
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Issue Dt:
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02/25/1997
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Application #:
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08246170
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Filing Dt:
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05/19/1994
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Title:
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MICROELECTRONIC CIRCUIT STRUCTURE HAVING IMPROVED STRUCTURAL FINENERS AND METHOD FOR MANUFACTURING SAME
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Patent #:
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Issue Dt:
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04/09/1996
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Application #:
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08272589
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Filing Dt:
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07/11/1994
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Title:
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METHOD FOR DEPOSITING A LAYER ON A SUBSTRATE WAFER WITH A SPUTTERING PROCESS
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Patent #:
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Issue Dt:
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06/25/1996
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Application #:
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08359789
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Filing Dt:
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12/20/1994
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Title:
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POLYSILICON/POLYCIDE ETCH PROCESS FOR SUB-MICRON GATE STACKS
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Patent #:
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Issue Dt:
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01/07/1997
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Application #:
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08362398
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Filing Dt:
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12/22/1994
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Title:
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PLASMA ETCHING METHOD
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Patent #:
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Issue Dt:
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03/03/1998
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Application #:
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08534776
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Filing Dt:
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09/27/1995
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Title:
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FORMATION OF SELF-ALIGNED OVERLAPPING BITLINE CONTACTS WITH SACRIFICIAL POLYSILICON FILL-IN STUD
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08610046
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Filing Dt:
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03/04/1996
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Title:
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BOARD HAVING A PLURALITY OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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07/08/1997
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Application #:
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08610523
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Filing Dt:
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03/04/1996
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Title:
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SEMICONDUCTOR COMPONENT WITH PROTECTIVE STRUCTURE FOR PROTECTING AGAINST ELECTROSTATIC DISCHARGE
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08642294
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Filing Dt:
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05/03/1996
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Title:
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PREVENTION OF ABNORMAL WSIX OXIDATION BY IN-SITU AMORPHOUS SILICON DEPOSITION
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Patent #:
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Issue Dt:
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03/10/1998
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Application #:
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08647464
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Filing Dt:
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05/03/1996
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Title:
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INTEGRATED CIRCUIT AND METHOD FOR PRODUCING THE SAME
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Patent #:
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Issue Dt:
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12/08/1998
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Application #:
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08681296
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Filing Dt:
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07/22/1996
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Title:
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INTEGRATED SWITCHING CIRCUIT WITH CMOS CIRCUIT AND METHOD FOR PRODUCING ISOLATED ACTIVE REGIONS OF A CMOS CIRCUIT
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08689208
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Filing Dt:
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08/05/1996
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Title:
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INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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06/22/1999
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Application #:
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08884119
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Filing Dt:
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06/27/1997
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Title:
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MITIGATION OF CMP-INDUCED BPSG SURFACE DAMAGE BY AN INTEGRATED ANNEAL AND SILICON DIOXIDE DEPOSITION
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Patent #:
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Issue Dt:
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02/09/1999
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Application #:
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08923300
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Filing Dt:
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09/04/1997
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Title:
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TEMPERATURE INDEPENDENT OSCILLATOR
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Patent #:
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Issue Dt:
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07/27/1999
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Application #:
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08940808
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Filing Dt:
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09/30/1997
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Title:
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DISHING RESISTANCE
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Patent #:
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Issue Dt:
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01/16/2001
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Application #:
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08994273
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Filing Dt:
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12/19/1997
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Title:
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METHOD FOR QUANTIFYING PROXIMITY EFFECTS BY MEASURING DEVICE PERFORMANCE
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Patent #:
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Issue Dt:
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07/27/1999
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Application #:
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09036486
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Filing Dt:
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03/06/1998
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Title:
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FEEDBACK PULSE GENERATORS
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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09049558
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Filing Dt:
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03/27/1998
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Title:
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READ ONLY MEMORY
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09120630
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Filing Dt:
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07/22/1998
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Title:
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SILICON OXYNITRIDE CAP FOR FLUORINATED SILICATE GLASS FILM IN INTERMETAL DIELECTRIC SEMICONDUCTOR FABRICATION
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09160851
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Filing Dt:
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09/25/1998
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Title:
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CIRCUIT CONFIGURATION FOR REDUCING DISTURBANCES DUE TO A SWITCHING OF AN OUTPUT DRIVER
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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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09160862
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Filing Dt:
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09/25/1998
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Title:
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PULSE SHAPER CIRCUIT
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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09204402
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Filing Dt:
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12/02/1998
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Title:
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MEASUREMENT SYSTEM AND METHOD FOR MEASURING CRITICAL DIMENSIONS USING ELLIPSOMETRY
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09208543
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Filing Dt:
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12/09/1998
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Title:
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LOW TEMPERATURE CVD PROCESSES FOR PREPARING FERROELECTRIC FILMS USING BI CARBOXYLATES
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Patent #:
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Issue Dt:
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01/23/2001
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Application #:
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09215607
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Filing Dt:
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12/17/1998
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Title:
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ADJUSTABLE STRENGTH DRIVER CIRCUIT AND METHOD OF ADJUSTMENT
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Patent #:
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Issue Dt:
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12/18/2001
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Application #:
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09252372
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Filing Dt:
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02/18/1999
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Title:
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USE OF DUMMY POLY SPACERS AND DIVOT FILL TECHNIQUES FOR DT-ALIGNED PROCESSING AFTER STI FORMATION FOR ADVANCED DEEP TRENCH CAPACITOR DRAMS
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09256930
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Filing Dt:
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02/24/1999
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Title:
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SYSTEM AND METHOD FOR AUTOMATED DEFECT INSPECTION OF PHOTOMASKS
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09273842
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Filing Dt:
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03/22/1999
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Title:
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SKEW POINTER GENERATION
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Patent #:
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Issue Dt:
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06/12/2001
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Application #:
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09276027
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Filing Dt:
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03/25/1999
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Title:
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SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09280615
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Filing Dt:
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03/29/1999
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Title:
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METHOD FOR REDUCING CORNER ROUNDING IN MASK FABRICATION UTILIZING ELLIPTICAL ENERGY BEAM
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Patent #:
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Issue Dt:
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11/27/2001
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Application #:
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09281020
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Filing Dt:
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03/30/1999
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Title:
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PULSE WIDTH DETECTION
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09312974
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Filing Dt:
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05/17/1999
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Title:
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ON CHIP PROGRAMMABLE DATA PATTERN GENERATOR FOR SEMICONDUCTOR MEMORIES
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09313016
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Filing Dt:
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05/17/1999
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Title:
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ON CHIP DATA COMPARATOR WITH VARIABLE DATA AND COMPARE RESULT COMPRESSION
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09324926
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Filing Dt:
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06/03/1999
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Title:
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LOW TEMPERATURE SACRIFICIAL OXIDE FORMATION
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09324927
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Filing Dt:
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06/03/1999
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Title:
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LOW TEMPERATURE SELF-ALIGNED COLLAR FORMATION
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Patent #:
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Issue Dt:
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02/27/2001
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Application #:
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09337168
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Filing Dt:
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06/21/1999
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Title:
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DEVICE PERFORMANCE BY EMPLOYING AN IMPROVED METHOD FOR FORMING HALO IMPLANTS
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09374537
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Filing Dt:
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08/16/1999
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Title:
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METHOD FOR FABRICATING 4F2 MEMORY CELLS WITH IMPROVED GATE CONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09383666
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Filing Dt:
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08/26/1999
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Title:
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SIDEWALL OXIDE PROCESS FOR IMPROVED SHALLOW JUNCTION FORMATION IN SUPPORT REGION
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09401022
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Filing Dt:
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09/21/1999
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Title:
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INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/04/2001
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Application #:
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09406890
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Filing Dt:
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09/28/1999
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Title:
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REDUCING IMPACT OF COUPLING NOISE IN MULTI-LEVEL BIELINE ARCHITECTURE
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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09408246
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Filing Dt:
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09/29/1999
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Title:
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SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09408477
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Filing Dt:
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09/28/1999
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Title:
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METHOD FOR INSTALLING PROTECTIVE COMPONENTS IN INTEGRATED CIRCUITS THAT ARE CONSTRUCTED FROM STANDARD CELLS
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09411551
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Filing Dt:
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10/04/1999
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Title:
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LOCALLY FOLDED SPLIT LEVEL BITLINE WIRING
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09429834
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Filing Dt:
|
10/29/1999
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Title:
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METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT WITH LOW THRESHOLD VOLTAGE DIFFERENCES OF THE TRANISTORS THEREIN
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Patent #:
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Issue Dt:
|
09/02/2003
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Application #:
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09437956
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Filing Dt:
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11/10/1999
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Title:
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SEMICONDUCTOR CHIP CONFIGURATION AND METHOD OF CONTROLLING A SEMICONDUCTOR CHIP
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Patent #:
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Issue Dt:
|
10/24/2000
|
Application #:
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09440818
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Filing Dt:
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11/15/1999
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Title:
|
FERROELECTRIC MEMORY CONFIGURATION
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Patent #:
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Issue Dt:
|
03/19/2002
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Application #:
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09443751
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Filing Dt:
|
11/19/1999
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Title:
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MAGNETIC MEMORY
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Patent #:
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|
Issue Dt:
|
11/27/2001
|
Application #:
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09449716
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Filing Dt:
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11/24/1999
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Title:
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SEMICONDUCTOR COMPONENT HAVING AT LEAST ONE CAPACITOR AND METHODS FOR FABRICATING IT
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09460318
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Filing Dt:
|
12/14/1999
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Title:
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SELF-ALIGNED LDD FORMATION WITH ONE-STEP IMPLANTATION FOR TRANSISTOR FORMATION
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Patent #:
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Issue Dt:
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07/03/2001
|
Application #:
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09470310
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Filing Dt:
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12/22/1999
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Title:
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INTEGRATED CIRCUIT HAVING A DECODER
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09481637
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Filing Dt:
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01/12/2000
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Title:
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PROCESS FOR PRODUCING ULTRA-PURE WATER, AND CONFIGURATION FOR CARRYING OUT A PROCESS OF THIS NATURE
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Patent #:
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|
Issue Dt:
|
09/18/2001
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Application #:
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09483738
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Filing Dt:
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01/14/2000
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Title:
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Mehtod for repairing defective memory cells of an integrated semiconductor memory
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Patent #:
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|
Issue Dt:
|
09/27/2005
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Application #:
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09484781
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Filing Dt:
|
01/18/2000
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Title:
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INTEGRATED SEMICONDUCTOR CIRCUIT AND METHOD FOR FUNCTIONAL TESTING OF PAD CELLS
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Patent #:
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|
Issue Dt:
|
10/23/2001
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Application #:
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09491646
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Filing Dt:
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01/27/2000
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Title:
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Reduced voltage input/reduced voltage output repeaters for high capacitance signal lines and methods therefor
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
|
09492655
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Filing Dt:
|
01/27/2000
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Title:
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METHOD FOR PRODUCING STRUCTURES ON THE SURFACE OF A SEMICONDUCTOR WAFER
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Patent #:
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|
Issue Dt:
|
11/28/2000
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Application #:
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09492656
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Filing Dt:
|
01/27/2000
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Title:
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Method for improving the readability of alignment marks
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Patent #:
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|
Issue Dt:
|
09/03/2002
|
Application #:
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09504274
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Filing Dt:
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02/15/2000
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Title:
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EXHAUST APPARATUS
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Patent #:
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Issue Dt:
|
02/06/2001
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Application #:
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09506892
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Filing Dt:
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02/18/2000
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Title:
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Dry process for cleaning residues/polymers after metal etch
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Patent #:
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|
Issue Dt:
|
10/29/2002
|
Application #:
|
09520549
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Filing Dt:
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03/08/2000
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Title:
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ADDRESS DECODING SYSTEM AND METHOD FOR FAILURE TOLERATION IN A MEMORY BANK
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Patent #:
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Issue Dt:
|
07/31/2001
|
Application #:
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09533526
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Filing Dt:
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03/23/2000
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Title:
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Method and apparatus for a flexible controller including an improved output arrangement for a dram generator system
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09534102
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Filing Dt:
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03/23/2000
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Title:
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METHOD AND APPARATUS FOR AN ESSAY IDENTIFICATION OF A STATE OF A DRAM GENERATOR CONTROLLER
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Patent #:
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|
Issue Dt:
|
05/01/2001
|
Application #:
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09549275
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Filing Dt:
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04/14/2000
|
Title:
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Semiconductor memory with a plurality of memory banks
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Patent #:
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Issue Dt:
|
04/16/2002
|
Application #:
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09553708
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Filing Dt:
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04/20/2000
|
Title:
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CONTROL OF OXIDE THICKNESS IN VERTICAL TRANSISTOR STRUCTURES
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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09569220
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Filing Dt:
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05/11/2000
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Title:
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METAL CHEMICAL POLISHING PROCESS FOR MINIMIZING DISHING DURING SEMICONDUCTOR WAFER FABRICATION
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09574823
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Filing Dt:
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05/19/2000
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Title:
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WAFER PROCESSING SYSTEM
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Patent #:
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Issue Dt:
|
07/30/2002
|
Application #:
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09576465
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Filing Dt:
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05/23/2000
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Title:
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METHOD OF FORMING A VERTICALLY ORIENTED DEVICE IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
|
04/23/2002
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Application #:
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09583131
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Filing Dt:
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05/30/2000
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Title:
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Electronic circuit having a flexible intermediate layer between electronic components and a heat sink
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Patent #:
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Issue Dt:
|
11/05/2002
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Application #:
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09593287
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Filing Dt:
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06/13/2000
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Title:
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PLASMA DOPING FOR DRAM WITH DEEP TRENCHES AND HEMISPHERICAL GRAINS
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Patent #:
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Issue Dt:
|
10/30/2001
|
Application #:
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09595696
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Filing Dt:
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06/16/2000
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Title:
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Generator scheme and circuit for overcoming resistive voltage drop on power supply circuits on chips
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Patent #:
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Issue Dt:
|
08/06/2002
|
Application #:
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09596606
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Filing Dt:
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06/19/2000
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Title:
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COLLAR FORMATION BY SELECTIVE OXIDE DEPOSITION
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09597348
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Filing Dt:
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06/19/2000
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Title:
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TRANSPORT DEVICE FOR ELECTRONIC COMPONENTS WITH AN ANTICONTAMINATION COATING
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Patent #:
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Issue Dt:
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01/01/2002
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Application #:
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09597389
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Filing Dt:
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06/19/2000
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Title:
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Integrated circuit vertical trench device and method of forming thereof
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Patent #:
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Issue Dt:
|
12/03/2002
|
Application #:
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09597441
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Filing Dt:
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06/20/2000
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Title:
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ELIMINATION/REDUCTION OF BLACK SILICON IN DT ETCH
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|
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09598350
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Filing Dt:
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06/21/2000
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Title:
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DLL lock scheme with multiple phase detection
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Patent #:
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Issue Dt:
|
05/07/2002
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Application #:
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09602717
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Filing Dt:
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06/26/2000
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Title:
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Photomask and method for increasing image aspect ratio while relaxing mask fabrication requirements
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Patent #:
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Issue Dt:
|
06/11/2002
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Application #:
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09603742
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Filing Dt:
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06/26/2000
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Title:
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Integrated circuit having a command decoder
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Patent #:
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Issue Dt:
|
05/07/2002
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Application #:
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09605571
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Filing Dt:
|
06/28/2000
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Title:
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STRONGLY WATER-SOLUBLE PHOTOACID GENERATOR RESIST COMPOSITIONS
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Patent #:
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Issue Dt:
|
05/07/2002
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Application #:
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09606589
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Filing Dt:
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06/29/2000
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Title:
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An Integrated circuit having a decoder unit and an additional input of a decoder unit to determine a number of outputs to be activated
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09606594
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Filing Dt:
|
06/29/2000
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Title:
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Integrated circuit for generating a phase-shifted output clock signal from a clock signal
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Patent #:
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Issue Dt:
|
06/25/2002
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Application #:
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09607317
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Filing Dt:
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06/30/2000
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Title:
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METHOD FOR PRODUCING AN EEPROM MEMORY CELL WITH A TRENCH CAPACITOR
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Patent #:
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Issue Dt:
|
08/14/2001
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Application #:
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09617649
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Filing Dt:
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07/17/2000
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Title:
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Synchronous integrated memory
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Patent #:
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|
Issue Dt:
|
08/07/2001
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Application #:
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09618124
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Filing Dt:
|
07/17/2000
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Title:
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Integrated memory
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Patent #:
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|
Issue Dt:
|
08/09/2005
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Application #:
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09621905
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Filing Dt:
|
07/24/2000
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Title:
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SYNCHRONOUS INTEGRATED MEMORY
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Patent #:
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Issue Dt:
|
04/15/2003
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Application #:
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09630972
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Filing Dt:
|
08/02/2000
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Title:
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ARRANGEMENT AND METHOD FOR TESTING A MULTIPLICITY OF SEMICONDUCTOR CHIPS AT THE WAFER LEVEL
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|
|
Patent #:
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|
Issue Dt:
|
02/04/2003
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Application #:
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09633704
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Filing Dt:
|
08/07/2000
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Title:
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CONTACT CONNECTION OF METAL INTERCONNECTS OF AN INTEGRATED SEMICONDUCTOR CHIP
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Patent #:
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|
Issue Dt:
|
07/02/2002
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Application #:
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09636522
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Filing Dt:
|
08/10/2000
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Title:
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METHOD FOR FABRICATING A MICROTECHNICAL STRUCTURE
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Patent #:
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|
Issue Dt:
|
03/12/2002
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Application #:
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09638722
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Filing Dt:
|
08/10/2000
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Title:
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Wiring through terminal via fuse
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|
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Patent #:
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|
Issue Dt:
|
04/09/2002
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Application #:
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09642325
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Filing Dt:
|
08/21/2000
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Title:
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Method for fabricating a microelectronic structure
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|
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Patent #:
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|
Issue Dt:
|
09/09/2003
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Application #:
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09642326
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Filing Dt:
|
08/21/2000
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Title:
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CONFIGURATION AND METHOD FOR PRODUCING TEST SIGNALS FOR TESTING A MULTIPLICITY OF SEMICONDUCTOR CHIPS
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|
|
Patent #:
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|
Issue Dt:
|
08/20/2002
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Application #:
|
09645765
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Filing Dt:
|
08/25/2000
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Title:
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METHOD OF FABRICATING INTEGRATED CIRCUITS HAVING TRANSISTORS AND FURTHER SEMICONDUCTOR ELEMENTS
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Patent #:
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|
Issue Dt:
|
09/21/2004
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Application #:
|
09648939
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Filing Dt:
|
08/28/2000
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Title:
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METHOD FOR GENERATING A SEQUENCE OF RANDOM NUMBER OF A 1/F- NOSE
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Patent #:
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|
Issue Dt:
|
12/04/2001
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Application #:
|
09651492
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Filing Dt:
|
08/30/2000
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Title:
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Epitaxy layer and method for its production
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|
Patent #:
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|
Issue Dt:
|
12/17/2002
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Application #:
|
09655461
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Filing Dt:
|
09/05/2000
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Title:
|
CHIP CRACK STOP DESIGN FOR SEMICONDUCTOR CHIPS
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|
Patent #:
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|
Issue Dt:
|
06/18/2002
|
Application #:
|
09658713
|
Filing Dt:
|
09/11/2000
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Title:
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METHOD FOR PRODUCING AN ELECTRICAL CONNECTION BETWEEN THE FRONT AND REAR SIDES OF SEMICONDUCTOR CHIPS
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|
|
Patent #:
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|
Issue Dt:
|
04/30/2002
|
Application #:
|
09659946
|
Filing Dt:
|
09/13/2000
|
Title:
|
Combined tracking of wll and vpp with low threshold voltage in dram array
|
|