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Reel/Frame:023828/0001   Pages: 398
Recorded: 01/13/2010
Attorney Dkt #:609612800100
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 440
Page 1 of 5
Pages: 1 2 3 4 5
1
Patent #:
Issue Dt:
12/07/1993
Application #:
07790953
Filing Dt:
11/12/1991
Title:
METHOD OF FORMING SHALLOW JUNCTIONS IN FIELD EFFECT TRANSISTORS
2
Patent #:
Issue Dt:
02/22/1994
Application #:
07883113
Filing Dt:
05/14/1992
Title:
CONDUCTOR TRACK CONFIGURATION FOR VERY LARGE-SCALE INTEGRATED CIRCUITS
3
Patent #:
Issue Dt:
07/12/1994
Application #:
08074329
Filing Dt:
06/09/1993
Title:
INTEGRATED SEMICONDUCTOR MEMORY ARRAY AND METHOD FOR OPERATING THE SAME
4
Patent #:
Issue Dt:
01/10/1995
Application #:
08121725
Filing Dt:
09/15/1993
Title:
CMOS BUFFER HAVING OUTPUT TERMINAL OVERVOLATAGE CAUSED LATCH-UP PROTECTION
5
Patent #:
Issue Dt:
10/03/1995
Application #:
08123647
Filing Dt:
09/17/1993
Title:
CMOS BUFFER CIRCUIT WITH CONTROLLED CURRENT SOURCE
6
Patent #:
Issue Dt:
01/31/1995
Application #:
08123648
Filing Dt:
09/17/1993
Title:
MOS OUTPUT BUFFER CIRCUIT WITH CONTROLLED CURRENT SOURCE
7
Patent #:
Issue Dt:
06/20/1995
Application #:
08238243
Filing Dt:
05/04/1994
Title:
INTEGRATED SEMICONDUCTOR CIRCUIT WITH ESD PROTECTION
8
Patent #:
Issue Dt:
02/25/1997
Application #:
08246170
Filing Dt:
05/19/1994
Title:
MICROELECTRONIC CIRCUIT STRUCTURE HAVING IMPROVED STRUCTURAL FINENERS AND METHOD FOR MANUFACTURING SAME
9
Patent #:
Issue Dt:
04/09/1996
Application #:
08272589
Filing Dt:
07/11/1994
Title:
METHOD FOR DEPOSITING A LAYER ON A SUBSTRATE WAFER WITH A SPUTTERING PROCESS
10
Patent #:
Issue Dt:
06/25/1996
Application #:
08359789
Filing Dt:
12/20/1994
Title:
POLYSILICON/POLYCIDE ETCH PROCESS FOR SUB-MICRON GATE STACKS
11
Patent #:
Issue Dt:
01/07/1997
Application #:
08362398
Filing Dt:
12/22/1994
Title:
PLASMA ETCHING METHOD
12
Patent #:
Issue Dt:
03/03/1998
Application #:
08534776
Filing Dt:
09/27/1995
Title:
FORMATION OF SELF-ALIGNED OVERLAPPING BITLINE CONTACTS WITH SACRIFICIAL POLYSILICON FILL-IN STUD
13
Patent #:
Issue Dt:
10/06/1998
Application #:
08610046
Filing Dt:
03/04/1996
Title:
BOARD HAVING A PLURALITY OF INTEGRATED CIRCUITS
14
Patent #:
Issue Dt:
07/08/1997
Application #:
08610523
Filing Dt:
03/04/1996
Title:
SEMICONDUCTOR COMPONENT WITH PROTECTIVE STRUCTURE FOR PROTECTING AGAINST ELECTROSTATIC DISCHARGE
15
Patent #:
Issue Dt:
09/08/1998
Application #:
08642294
Filing Dt:
05/03/1996
Title:
PREVENTION OF ABNORMAL WSIX OXIDATION BY IN-SITU AMORPHOUS SILICON DEPOSITION
16
Patent #:
Issue Dt:
03/10/1998
Application #:
08647464
Filing Dt:
05/03/1996
Title:
INTEGRATED CIRCUIT AND METHOD FOR PRODUCING THE SAME
17
Patent #:
Issue Dt:
12/08/1998
Application #:
08681296
Filing Dt:
07/22/1996
Title:
INTEGRATED SWITCHING CIRCUIT WITH CMOS CIRCUIT AND METHOD FOR PRODUCING ISOLATED ACTIVE REGIONS OF A CMOS CIRCUIT
18
Patent #:
Issue Dt:
08/04/1998
Application #:
08689208
Filing Dt:
08/05/1996
Title:
INTEGRATED CIRCUIT
19
Patent #:
Issue Dt:
06/22/1999
Application #:
08884119
Filing Dt:
06/27/1997
Title:
MITIGATION OF CMP-INDUCED BPSG SURFACE DAMAGE BY AN INTEGRATED ANNEAL AND SILICON DIOXIDE DEPOSITION
20
Patent #:
Issue Dt:
02/09/1999
Application #:
08923300
Filing Dt:
09/04/1997
Title:
TEMPERATURE INDEPENDENT OSCILLATOR
21
Patent #:
Issue Dt:
07/27/1999
Application #:
08940808
Filing Dt:
09/30/1997
Title:
DISHING RESISTANCE
22
Patent #:
Issue Dt:
01/16/2001
Application #:
08994273
Filing Dt:
12/19/1997
Title:
METHOD FOR QUANTIFYING PROXIMITY EFFECTS BY MEASURING DEVICE PERFORMANCE
23
Patent #:
Issue Dt:
07/27/1999
Application #:
09036486
Filing Dt:
03/06/1998
Title:
FEEDBACK PULSE GENERATORS
24
Patent #:
Issue Dt:
08/24/1999
Application #:
09049558
Filing Dt:
03/27/1998
Title:
READ ONLY MEMORY
25
Patent #:
Issue Dt:
10/09/2001
Application #:
09120630
Filing Dt:
07/22/1998
Title:
SILICON OXYNITRIDE CAP FOR FLUORINATED SILICATE GLASS FILM IN INTERMETAL DIELECTRIC SEMICONDUCTOR FABRICATION
26
Patent #:
Issue Dt:
05/30/2000
Application #:
09160851
Filing Dt:
09/25/1998
Title:
CIRCUIT CONFIGURATION FOR REDUCING DISTURBANCES DUE TO A SWITCHING OF AN OUTPUT DRIVER
27
Patent #:
Issue Dt:
03/28/2000
Application #:
09160862
Filing Dt:
09/25/1998
Title:
PULSE SHAPER CIRCUIT
28
Patent #:
Issue Dt:
02/29/2000
Application #:
09204402
Filing Dt:
12/02/1998
Title:
MEASUREMENT SYSTEM AND METHOD FOR MEASURING CRITICAL DIMENSIONS USING ELLIPSOMETRY
29
Patent #:
Issue Dt:
01/30/2001
Application #:
09208543
Filing Dt:
12/09/1998
Title:
LOW TEMPERATURE CVD PROCESSES FOR PREPARING FERROELECTRIC FILMS USING BI CARBOXYLATES
30
Patent #:
Issue Dt:
01/23/2001
Application #:
09215607
Filing Dt:
12/17/1998
Title:
ADJUSTABLE STRENGTH DRIVER CIRCUIT AND METHOD OF ADJUSTMENT
31
Patent #:
Issue Dt:
12/18/2001
Application #:
09252372
Filing Dt:
02/18/1999
Title:
USE OF DUMMY POLY SPACERS AND DIVOT FILL TECHNIQUES FOR DT-ALIGNED PROCESSING AFTER STI FORMATION FOR ADVANCED DEEP TRENCH CAPACITOR DRAMS
32
Patent #:
Issue Dt:
03/26/2002
Application #:
09256930
Filing Dt:
02/24/1999
Title:
SYSTEM AND METHOD FOR AUTOMATED DEFECT INSPECTION OF PHOTOMASKS
33
Patent #:
Issue Dt:
04/02/2002
Application #:
09273842
Filing Dt:
03/22/1999
Title:
SKEW POINTER GENERATION
34
Patent #:
Issue Dt:
06/12/2001
Application #:
09276027
Filing Dt:
03/25/1999
Title:
SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS
35
Patent #:
Issue Dt:
04/10/2001
Application #:
09280615
Filing Dt:
03/29/1999
Title:
METHOD FOR REDUCING CORNER ROUNDING IN MASK FABRICATION UTILIZING ELLIPTICAL ENERGY BEAM
36
Patent #:
Issue Dt:
11/27/2001
Application #:
09281020
Filing Dt:
03/30/1999
Title:
PULSE WIDTH DETECTION
37
Patent #:
Issue Dt:
11/18/2003
Application #:
09312974
Filing Dt:
05/17/1999
Title:
ON CHIP PROGRAMMABLE DATA PATTERN GENERATOR FOR SEMICONDUCTOR MEMORIES
38
Patent #:
Issue Dt:
03/12/2002
Application #:
09313016
Filing Dt:
05/17/1999
Title:
ON CHIP DATA COMPARATOR WITH VARIABLE DATA AND COMPARE RESULT COMPRESSION
39
Patent #:
Issue Dt:
10/30/2001
Application #:
09324926
Filing Dt:
06/03/1999
Title:
LOW TEMPERATURE SACRIFICIAL OXIDE FORMATION
40
Patent #:
Issue Dt:
03/05/2002
Application #:
09324927
Filing Dt:
06/03/1999
Title:
LOW TEMPERATURE SELF-ALIGNED COLLAR FORMATION
41
Patent #:
Issue Dt:
02/27/2001
Application #:
09337168
Filing Dt:
06/21/1999
Title:
DEVICE PERFORMANCE BY EMPLOYING AN IMPROVED METHOD FOR FORMING HALO IMPLANTS
42
Patent #:
Issue Dt:
03/12/2002
Application #:
09374537
Filing Dt:
08/16/1999
Title:
METHOD FOR FABRICATING 4F2 MEMORY CELLS WITH IMPROVED GATE CONDUCTOR STRUCTURE
43
Patent #:
Issue Dt:
03/05/2002
Application #:
09383666
Filing Dt:
08/26/1999
Title:
SIDEWALL OXIDE PROCESS FOR IMPROVED SHALLOW JUNCTION FORMATION IN SUPPORT REGION
44
Patent #:
Issue Dt:
08/21/2001
Application #:
09401022
Filing Dt:
09/21/1999
Title:
INTEGRATED CIRCUIT
45
Patent #:
Issue Dt:
12/04/2001
Application #:
09406890
Filing Dt:
09/28/1999
Title:
REDUCING IMPACT OF COUPLING NOISE IN MULTI-LEVEL BIELINE ARCHITECTURE
46
Patent #:
Issue Dt:
07/08/2003
Application #:
09408246
Filing Dt:
09/29/1999
Title:
SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS
47
Patent #:
Issue Dt:
05/13/2003
Application #:
09408477
Filing Dt:
09/28/1999
Title:
METHOD FOR INSTALLING PROTECTIVE COMPONENTS IN INTEGRATED CIRCUITS THAT ARE CONSTRUCTED FROM STANDARD CELLS
48
Patent #:
Issue Dt:
09/18/2001
Application #:
09411551
Filing Dt:
10/04/1999
Title:
LOCALLY FOLDED SPLIT LEVEL BITLINE WIRING
49
Patent #:
Issue Dt:
05/14/2002
Application #:
09429834
Filing Dt:
10/29/1999
Title:
METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT WITH LOW THRESHOLD VOLTAGE DIFFERENCES OF THE TRANISTORS THEREIN
50
Patent #:
Issue Dt:
09/02/2003
Application #:
09437956
Filing Dt:
11/10/1999
Title:
SEMICONDUCTOR CHIP CONFIGURATION AND METHOD OF CONTROLLING A SEMICONDUCTOR CHIP
51
Patent #:
Issue Dt:
10/24/2000
Application #:
09440818
Filing Dt:
11/15/1999
Title:
FERROELECTRIC MEMORY CONFIGURATION
52
Patent #:
Issue Dt:
03/19/2002
Application #:
09443751
Filing Dt:
11/19/1999
Title:
MAGNETIC MEMORY
53
Patent #:
Issue Dt:
11/27/2001
Application #:
09449716
Filing Dt:
11/24/1999
Title:
SEMICONDUCTOR COMPONENT HAVING AT LEAST ONE CAPACITOR AND METHODS FOR FABRICATING IT
54
Patent #:
Issue Dt:
03/26/2002
Application #:
09460318
Filing Dt:
12/14/1999
Title:
SELF-ALIGNED LDD FORMATION WITH ONE-STEP IMPLANTATION FOR TRANSISTOR FORMATION
55
Patent #:
Issue Dt:
07/03/2001
Application #:
09470310
Filing Dt:
12/22/1999
Title:
INTEGRATED CIRCUIT HAVING A DECODER
56
Patent #:
Issue Dt:
10/08/2002
Application #:
09481637
Filing Dt:
01/12/2000
Title:
PROCESS FOR PRODUCING ULTRA-PURE WATER, AND CONFIGURATION FOR CARRYING OUT A PROCESS OF THIS NATURE
57
Patent #:
Issue Dt:
09/18/2001
Application #:
09483738
Filing Dt:
01/14/2000
Title:
Mehtod for repairing defective memory cells of an integrated semiconductor memory
58
Patent #:
Issue Dt:
09/27/2005
Application #:
09484781
Filing Dt:
01/18/2000
Title:
INTEGRATED SEMICONDUCTOR CIRCUIT AND METHOD FOR FUNCTIONAL TESTING OF PAD CELLS
59
Patent #:
Issue Dt:
10/23/2001
Application #:
09491646
Filing Dt:
01/27/2000
Title:
Reduced voltage input/reduced voltage output repeaters for high capacitance signal lines and methods therefor
60
Patent #:
Issue Dt:
09/24/2002
Application #:
09492655
Filing Dt:
01/27/2000
Title:
METHOD FOR PRODUCING STRUCTURES ON THE SURFACE OF A SEMICONDUCTOR WAFER
61
Patent #:
Issue Dt:
11/28/2000
Application #:
09492656
Filing Dt:
01/27/2000
Title:
Method for improving the readability of alignment marks
62
Patent #:
Issue Dt:
09/03/2002
Application #:
09504274
Filing Dt:
02/15/2000
Title:
EXHAUST APPARATUS
63
Patent #:
Issue Dt:
02/06/2001
Application #:
09506892
Filing Dt:
02/18/2000
Title:
Dry process for cleaning residues/polymers after metal etch
64
Patent #:
Issue Dt:
10/29/2002
Application #:
09520549
Filing Dt:
03/08/2000
Title:
ADDRESS DECODING SYSTEM AND METHOD FOR FAILURE TOLERATION IN A MEMORY BANK
65
Patent #:
Issue Dt:
07/31/2001
Application #:
09533526
Filing Dt:
03/23/2000
Title:
Method and apparatus for a flexible controller including an improved output arrangement for a dram generator system
66
Patent #:
Issue Dt:
03/04/2003
Application #:
09534102
Filing Dt:
03/23/2000
Title:
METHOD AND APPARATUS FOR AN ESSAY IDENTIFICATION OF A STATE OF A DRAM GENERATOR CONTROLLER
67
Patent #:
Issue Dt:
05/01/2001
Application #:
09549275
Filing Dt:
04/14/2000
Title:
Semiconductor memory with a plurality of memory banks
68
Patent #:
Issue Dt:
04/16/2002
Application #:
09553708
Filing Dt:
04/20/2000
Title:
CONTROL OF OXIDE THICKNESS IN VERTICAL TRANSISTOR STRUCTURES
69
Patent #:
Issue Dt:
09/13/2005
Application #:
09569220
Filing Dt:
05/11/2000
Title:
METAL CHEMICAL POLISHING PROCESS FOR MINIMIZING DISHING DURING SEMICONDUCTOR WAFER FABRICATION
70
Patent #:
Issue Dt:
04/01/2003
Application #:
09574823
Filing Dt:
05/19/2000
Title:
WAFER PROCESSING SYSTEM
71
Patent #:
Issue Dt:
07/30/2002
Application #:
09576465
Filing Dt:
05/23/2000
Title:
METHOD OF FORMING A VERTICALLY ORIENTED DEVICE IN AN INTEGRATED CIRCUIT
72
Patent #:
Issue Dt:
04/23/2002
Application #:
09583131
Filing Dt:
05/30/2000
Title:
Electronic circuit having a flexible intermediate layer between electronic components and a heat sink
73
Patent #:
Issue Dt:
11/05/2002
Application #:
09593287
Filing Dt:
06/13/2000
Title:
PLASMA DOPING FOR DRAM WITH DEEP TRENCHES AND HEMISPHERICAL GRAINS
74
Patent #:
Issue Dt:
10/30/2001
Application #:
09595696
Filing Dt:
06/16/2000
Title:
Generator scheme and circuit for overcoming resistive voltage drop on power supply circuits on chips
75
Patent #:
Issue Dt:
08/06/2002
Application #:
09596606
Filing Dt:
06/19/2000
Title:
COLLAR FORMATION BY SELECTIVE OXIDE DEPOSITION
76
Patent #:
Issue Dt:
12/24/2002
Application #:
09597348
Filing Dt:
06/19/2000
Title:
TRANSPORT DEVICE FOR ELECTRONIC COMPONENTS WITH AN ANTICONTAMINATION COATING
77
Patent #:
Issue Dt:
01/01/2002
Application #:
09597389
Filing Dt:
06/19/2000
Title:
Integrated circuit vertical trench device and method of forming thereof
78
Patent #:
Issue Dt:
12/03/2002
Application #:
09597441
Filing Dt:
06/20/2000
Title:
ELIMINATION/REDUCTION OF BLACK SILICON IN DT ETCH
79
Patent #:
Issue Dt:
05/14/2002
Application #:
09598350
Filing Dt:
06/21/2000
Title:
DLL lock scheme with multiple phase detection
80
Patent #:
Issue Dt:
05/07/2002
Application #:
09602717
Filing Dt:
06/26/2000
Title:
Photomask and method for increasing image aspect ratio while relaxing mask fabrication requirements
81
Patent #:
Issue Dt:
06/11/2002
Application #:
09603742
Filing Dt:
06/26/2000
Title:
Integrated circuit having a command decoder
82
Patent #:
Issue Dt:
05/07/2002
Application #:
09605571
Filing Dt:
06/28/2000
Title:
STRONGLY WATER-SOLUBLE PHOTOACID GENERATOR RESIST COMPOSITIONS
83
Patent #:
Issue Dt:
05/07/2002
Application #:
09606589
Filing Dt:
06/29/2000
Title:
An Integrated circuit having a decoder unit and an additional input of a decoder unit to determine a number of outputs to be activated
84
Patent #:
Issue Dt:
09/04/2001
Application #:
09606594
Filing Dt:
06/29/2000
Title:
Integrated circuit for generating a phase-shifted output clock signal from a clock signal
85
Patent #:
Issue Dt:
06/25/2002
Application #:
09607317
Filing Dt:
06/30/2000
Title:
METHOD FOR PRODUCING AN EEPROM MEMORY CELL WITH A TRENCH CAPACITOR
86
Patent #:
Issue Dt:
08/14/2001
Application #:
09617649
Filing Dt:
07/17/2000
Title:
Synchronous integrated memory
87
Patent #:
Issue Dt:
08/07/2001
Application #:
09618124
Filing Dt:
07/17/2000
Title:
Integrated memory
88
Patent #:
Issue Dt:
08/09/2005
Application #:
09621905
Filing Dt:
07/24/2000
Title:
SYNCHRONOUS INTEGRATED MEMORY
89
Patent #:
Issue Dt:
04/15/2003
Application #:
09630972
Filing Dt:
08/02/2000
Title:
ARRANGEMENT AND METHOD FOR TESTING A MULTIPLICITY OF SEMICONDUCTOR CHIPS AT THE WAFER LEVEL
90
Patent #:
Issue Dt:
02/04/2003
Application #:
09633704
Filing Dt:
08/07/2000
Title:
CONTACT CONNECTION OF METAL INTERCONNECTS OF AN INTEGRATED SEMICONDUCTOR CHIP
91
Patent #:
Issue Dt:
07/02/2002
Application #:
09636522
Filing Dt:
08/10/2000
Title:
METHOD FOR FABRICATING A MICROTECHNICAL STRUCTURE
92
Patent #:
Issue Dt:
03/12/2002
Application #:
09638722
Filing Dt:
08/10/2000
Title:
Wiring through terminal via fuse
93
Patent #:
Issue Dt:
04/09/2002
Application #:
09642325
Filing Dt:
08/21/2000
Title:
Method for fabricating a microelectronic structure
94
Patent #:
Issue Dt:
09/09/2003
Application #:
09642326
Filing Dt:
08/21/2000
Title:
CONFIGURATION AND METHOD FOR PRODUCING TEST SIGNALS FOR TESTING A MULTIPLICITY OF SEMICONDUCTOR CHIPS
95
Patent #:
Issue Dt:
08/20/2002
Application #:
09645765
Filing Dt:
08/25/2000
Title:
METHOD OF FABRICATING INTEGRATED CIRCUITS HAVING TRANSISTORS AND FURTHER SEMICONDUCTOR ELEMENTS
96
Patent #:
Issue Dt:
09/21/2004
Application #:
09648939
Filing Dt:
08/28/2000
Title:
METHOD FOR GENERATING A SEQUENCE OF RANDOM NUMBER OF A 1/F- NOSE
97
Patent #:
Issue Dt:
12/04/2001
Application #:
09651492
Filing Dt:
08/30/2000
Title:
Epitaxy layer and method for its production
98
Patent #:
Issue Dt:
12/17/2002
Application #:
09655461
Filing Dt:
09/05/2000
Title:
CHIP CRACK STOP DESIGN FOR SEMICONDUCTOR CHIPS
99
Patent #:
Issue Dt:
06/18/2002
Application #:
09658713
Filing Dt:
09/11/2000
Title:
METHOD FOR PRODUCING AN ELECTRICAL CONNECTION BETWEEN THE FRONT AND REAR SIDES OF SEMICONDUCTOR CHIPS
100
Patent #:
Issue Dt:
04/30/2002
Application #:
09659946
Filing Dt:
09/13/2000
Title:
Combined tracking of wll and vpp with low threshold voltage in dram array
Assignor
1
Exec Dt:
04/25/2006
Assignee
1
GUSTAV-HEINEMANN-RING 212
MUNICH, GERMANY 81739
Correspondence name and address
BARRY E. BRETSCHNEIDER
C/O MORRISON & FOERSTER LLP
1650 TYSONS BLVD. SUITE 400
MCLEAN, VA 22102

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