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Reel/Frame:030919/0040   Pages: 19
Recorded: 07/23/2013
Attorney Dkt #:127853-600001
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING AND RECEIVING PARTIES PREVIOUSLY RECORDED ON REEL 030832 FRAME 0604. ASSIGNOR(S) HEREBY CONFIRMS THE CONVEYING PARTY DATA: INTEGRATED DEVICE TECHNOLOGY, INC. TECEIVING: PMC-SIERRA US, INC.
Total properties: 66
1
Patent #:
6937621
Issue Dt:
08/30/2005
Application #:
09790301
Filing Dt:
02/21/2001
Publication #:
US20020114357
Pub Dt:
08/22/2002
Title:
APPARATUS AND METHOD FOR DETERMINING BYTE GAIN AND LOSS ADJUSTMENTS IN A SONET/SDH NETWORK ELEMENT
2
Patent #:
6748567
Issue Dt:
06/08/2004
Application #:
09846875
Filing Dt:
05/01/2001
Title:
METHOD AND SYSTEM FOR ERROR CORRECTION OVER SERIAL LINK
3
Patent #:
7203170
Issue Dt:
04/10/2007
Application #:
09847076
Filing Dt:
05/01/2001
Publication #:
US20020163914
Pub Dt:
11/07/2002
Title:
NETWORK SWITCH PORT WITH WEIGHTED RANDOM EARLY DISCARD
4
Patent #:
7058057
Issue Dt:
06/06/2006
Application #:
09847077
Filing Dt:
05/01/2001
Publication #:
US20020163922
Pub Dt:
11/07/2002
Title:
NETWORK SWITCH PORT TRAFFIC MANAGER HAVING CONFIGURABLE PACKET AND CELL SERVICING
5
Patent #:
6687781
Issue Dt:
02/03/2004
Application #:
09847078
Filing Dt:
05/01/2001
Publication #:
US20020174279
Pub Dt:
11/21/2002
Title:
FAIR WEIGHTED QUEUING BANDWIDTH ALLOCATION SYSTEM FOR NETWORK SWITCH PORT
6
Patent #:
7058070
Issue Dt:
06/06/2006
Application #:
09847079
Filing Dt:
05/01/2001
Publication #:
US20040213251
Pub Dt:
10/28/2004
Title:
BACK PRESSURE CONTROL SYSTEM FOR NETWORK SWITCH PORT
7
Patent #:
7079485
Issue Dt:
07/18/2006
Application #:
09847711
Filing Dt:
05/01/2001
Title:
MULTISERVICE SWITCHING SYSTEM WITH DISTRIBUTED SWITCH FABRIC
8
Patent #:
7006518
Issue Dt:
02/28/2006
Application #:
09865258
Filing Dt:
05/25/2001
Publication #:
US20020176428
Pub Dt:
11/28/2002
Title:
METHOD AND APPARATUS FOR SCHEDULING STATIC AND DYNAMIC TRAFFIC THROUGH A SWITCH FABRIC
9
Patent #:
6993028
Issue Dt:
01/31/2006
Application #:
09905394
Filing Dt:
07/13/2001
Publication #:
US20030012199
Pub Dt:
01/16/2003
Title:
APPARATUS AND METHOD FOR REORDERING SEQUENCE INDICATED INFORMATION UNITS INTO PROPER SEQUENCE
10
Patent #:
6959002
Issue Dt:
10/25/2005
Application #:
09908614
Filing Dt:
07/18/2001
Publication #:
US20030016686
Pub Dt:
01/23/2003
Title:
TRAFFIC MANAGER FOR NETWORK SWITCH PORT
11
Patent #:
6598132
Issue Dt:
07/22/2003
Application #:
09908616
Filing Dt:
07/18/2001
Publication #:
US20030084246
Pub Dt:
05/01/2003
Title:
BUFFER MANAGER FOR NETWORK SWITCH PORT
12
Patent #:
7110405
Issue Dt:
09/19/2006
Application #:
09955615
Filing Dt:
09/18/2001
Publication #:
US20030053470
Pub Dt:
03/20/2003
Title:
MULTICAST CELL BUFFER FOR NETWORK SWITCH
13
Patent #:
7263097
Issue Dt:
08/28/2007
Application #:
09997478
Filing Dt:
11/26/2001
Title:
PROGRAMMABLY SLICEABLE SWITCH-FABRIC UNIT AND METHODS OF USE
14
Patent #:
7181485
Issue Dt:
02/20/2007
Application #:
09997507
Filing Dt:
11/26/2001
Title:
VARIABLY DELAYABLE TRANSMISSION OF PACKETS BETWEEN INDEPENDENTLY CLOCKED SOURCE, INTERMEDIATE, AND DESTINATION CIRCUITS WHILE MAINTAINING ORDERLY AND TIMELY PROCESSING IN ONE OR BOTH OF THE INTERMEDIATE AND DESTINATION CIRCUITS
15
Patent #:
7734977
Issue Dt:
06/08/2010
Application #:
10835711
Filing Dt:
04/29/2004
Publication #:
US20040210815
Pub Dt:
10/21/2004
Title:
METHOD AND SYSTEM FOR ERROR CORRECTION OVER SERIAL LINK
16
Patent #:
7334071
Issue Dt:
02/19/2008
Application #:
11138853
Filing Dt:
05/25/2005
Publication #:
US20060282603
Pub Dt:
12/14/2006
Title:
EXPANSION OF CROSS-DOMAIN ADDRESSING FOR PCI-EXPRESS PACKETS PASSING THROUGH NON-TRANSPARENT BRIDGE
17
Patent #:
7676713
Issue Dt:
03/09/2010
Application #:
11261256
Filing Dt:
10/28/2005
Publication #:
US20070101215
Pub Dt:
05/03/2007
Title:
AUTOMATED DEVICE TESTING USING INTERTWINED STIMULUS-GENERATION AND RESPONSE VALIDATION SPECIFICATIONS FOR MANAGING DUT'S THAT GENERATE OUT-OF-ORDER RESPONSES
18
Patent #:
7779197
Issue Dt:
08/17/2010
Application #:
11382475
Filing Dt:
05/09/2006
Title:
DEVICE AND METHOD FOR ADDRESS MATCHING WITH POST MATCHING LIMIT CHECK AND NULLIFICATION
19
Patent #:
7647438
Issue Dt:
01/12/2010
Application #:
11382480
Filing Dt:
05/09/2006
Title:
BINARY BASE ADDRESS SORTING METHOD AND DEVICE WITH SHIFT VECTOR
20
Patent #:
8255599
Issue Dt:
08/28/2012
Application #:
11390754
Filing Dt:
03/28/2006
Publication #:
US20070260782
Pub Dt:
11/08/2007
Title:
PACKETS TRANSFER DEVICE HAVING DATA ABSORBING BUFFERS WITH ELASTIC BUFFER CAPACITIES
21
Patent #:
7454554
Issue Dt:
11/18/2008
Application #:
11395715
Filing Dt:
03/31/2006
Title:
BINARY BASE ADDRESS SEARCH DEVICE AND METHOD
22
Patent #:
7694025
Issue Dt:
04/06/2010
Application #:
11395918
Filing Dt:
03/31/2006
Title:
METHOD AND DEVICE FOR BASE ADDRESS SORTING AND ENTRY INTO BASE ADDRESS REGISTERS
23
Patent #:
7634586
Issue Dt:
12/15/2009
Application #:
11422190
Filing Dt:
06/05/2006
Title:
DEVICE FOR CONCURRENT LIMIT VALIDITY CHECK
24
Patent #:
8437369
Issue Dt:
05/07/2013
Application #:
11437082
Filing Dt:
05/19/2006
Publication #:
US20070268931
Pub Dt:
11/22/2007
Title:
PACKETS TRANSFER DEVICE THAT INTELLIGENTLY ACCOUNTS FOR VARIABLE EGRESS CHANNEL WIDTHS WHEN SCHEDULING USE OF DISPATCH BUS BY EGRESSING PACKET STREAMS
25
Patent #:
8234424
Issue Dt:
07/31/2012
Application #:
11450899
Filing Dt:
06/08/2006
Publication #:
US20080123638
Pub Dt:
05/29/2008
Title:
EFFICIENT STRIP-DOWN AND RE-ALIGNMENT OF INGRESSING PHYSICAL LAYER/DATA LAYER PACKETS IN AN AGGREGATED PCI-EXPRESS PORT HAVING EIGHT LANES
26
Patent #:
8462628
Issue Dt:
06/11/2013
Application #:
11643465
Filing Dt:
12/20/2006
Publication #:
US20080151753
Pub Dt:
06/26/2008
Title:
METHOD OF IMPROVING OVER PROTOCOL-REQUIRED SCHEDULING TABLES WHILE MAINTAINING SAME
27
Patent #:
7756014
Issue Dt:
07/13/2010
Application #:
11677697
Filing Dt:
02/22/2007
Title:
DEVICE AND METHOD FOR HANDLING CATASTROPHIC ROUTING
28
Patent #:
7356722
Issue Dt:
04/08/2008
Application #:
11699737
Filing Dt:
01/29/2007
Publication #:
US20070130246
Pub Dt:
06/07/2007
Title:
VARIABLY DELAYABLE TRANSMISSION OF PACKETS BETWEEN INDEPENDENTLY CLOCKED SOURCE, INTERMEDIATE, AND DESTINATION CIRCUITS WHILE MAINTAINING ORDERLY AND TIMELY PROCESSING IN ONE OR BOTH OF THE INTERMEDIATE AND DESTINATION CIRCUITS
29
Patent #:
7773591
Issue Dt:
08/10/2010
Application #:
11774457
Filing Dt:
07/06/2007
Publication #:
US20090010252
Pub Dt:
01/08/2009
Title:
INTEGRATED MEMORY FOR STORING EGRESSING PACKET DATA, REPLAY DATA AND TO-BE EGRESSED DATA
30
Patent #:
7848319
Issue Dt:
12/07/2010
Application #:
11830453
Filing Dt:
07/30/2007
Publication #:
US20070263618
Pub Dt:
11/15/2007
Title:
PROGRAMMABLY SLICEABLE SWITCH-FABRIC UNIT AND METHODS OF USE
31
Patent #:
7852867
Issue Dt:
12/14/2010
Application #:
11854076
Filing Dt:
09/12/2007
Publication #:
US20090010279
Pub Dt:
01/08/2009
Title:
INTEGRATED MEMORY FOR STORING EGRESSING PACKET DATA, REPLAY DATA AND TO-BE EGRESSED DATA
32
Patent #:
7787378
Issue Dt:
08/31/2010
Application #:
11854495
Filing Dt:
09/12/2007
Title:
METHOD AND APPARATUS FOR CONVERSION OF AN ARBITRATION TABLE INTO COUNT VALUES TO CONTROL THE DISTRIBUTION OF RESOURCES
33
Patent #:
7792014
Issue Dt:
09/07/2010
Application #:
11863727
Filing Dt:
09/28/2007
Publication #:
US20090086735
Pub Dt:
04/02/2009
Title:
METHOD OF SKIPPING NULLIFIED PACKETS DURING MASS REPLAY FROM REPLAY BUFFER
34
Patent #:
7995696
Issue Dt:
08/09/2011
Application #:
12188195
Filing Dt:
08/07/2008
Title:
SYSTEM AND METHOD FOR DESKEWING DATA TRANSMITTED THROUGH DATA LANES
35
Patent #:
9467307
Issue Dt:
10/11/2016
Application #:
12200062
Filing Dt:
08/28/2008
Publication #:
US20100054268
Pub Dt:
03/04/2010
Title:
Method of Tracking Arrival Order of Packets into Plural Queues
36
Patent #:
8161210
Issue Dt:
04/17/2012
Application #:
12264158
Filing Dt:
11/03/2008
Title:
MULTI-QUEUE SYSTEM AND METHOD FOR DESKEWING SYMBOLS IN DATA STREAMS
37
Patent #:
8285884
Issue Dt:
10/09/2012
Application #:
12264184
Filing Dt:
11/03/2008
Title:
DATA AGGREGATION SYSTEM AND METHOD FOR DESKEWING DATA AT SELECTABLE DATA RATES
38
Patent #:
8174969
Issue Dt:
05/08/2012
Application #:
12625491
Filing Dt:
11/24/2009
Title:
CONGESTION MANAGEMENT FOR A PACKET SWITCH
39
Patent #:
8391302
Issue Dt:
03/05/2013
Application #:
12630811
Filing Dt:
12/03/2009
Title:
HIGH-PERFORMANCE INGRESS BUFFER FOR A PACKET SWITCH
40
Patent #:
8295293
Issue Dt:
10/23/2012
Application #:
12639938
Filing Dt:
12/16/2009
Title:
PREDICTIVE FLOW CONTROL FOR A PACKET SWITCH
41
Patent #:
8284790
Issue Dt:
10/09/2012
Application #:
12701472
Filing Dt:
02/05/2010
Title:
PACKET SWITCH WITH ENQUEUE STRUCTURE FOR ORDERING PACKETS
42
Patent #:
8400915
Issue Dt:
03/19/2013
Application #:
12710592
Filing Dt:
02/23/2010
Title:
PIPELINE SCHEDULER FOR A PACKET SWITCH
43
Patent #:
8429325
Issue Dt:
04/23/2013
Application #:
12852399
Filing Dt:
08/06/2010
Title:
PCI EXPRESS SWITCH AND METHOD FOR MULTI-PORT NON-TRANSPARENT SWITCHING
44
Patent #:
8327243
Issue Dt:
12/04/2012
Application #:
12857391
Filing Dt:
08/16/2010
Title:
SYSTEM AND METHOD FOR GENERATING LOCATOR POLYNOMIALS
45
Patent #:
8397144
Issue Dt:
03/12/2013
Application #:
12913716
Filing Dt:
10/27/2010
Title:
BCH DATA CORRECTION SYSTEM AND METHOD
46
Patent #:
8707122
Issue Dt:
04/22/2014
Application #:
13023336
Filing Dt:
02/08/2011
Title:
NONVOLATILE MEMORY CONTROLLER WITH TWO-STAGE ERROR CORRECTION TECHNIQUE FOR ENHANCED RELIABILITY
47
Patent #:
8588228
Issue Dt:
11/19/2013
Application #:
13052008
Filing Dt:
03/18/2011
Title:
NONVOLATILE MEMORY CONTROLLER WITH HOST CONTROLLER INTERFACE FOR RETRIEVING AND DISPATCHING NONVOLATILE MEMORY COMMANDS IN A DISTRIBUTED MANNER
48
Patent #:
8554968
Issue Dt:
10/08/2013
Application #:
13052388
Filing Dt:
03/21/2011
Title:
INTERRUPT TECHNIQUE FOR A NONVOLATILE MEMORY CONTROLLER
49
Patent #:
8601346
Issue Dt:
12/03/2013
Application #:
13052835
Filing Dt:
03/21/2011
Title:
SYSTEM AND METHOD FOR GENERATING PARITY DATA IN A NONVOLATILE MEMORY CONTROLLER BY USING A DISTRIBUTED PROCESSING TECHNIQUE
50
Patent #:
8656071
Issue Dt:
02/18/2014
Application #:
13107265
Filing Dt:
05/13/2011
Title:
SYSTEM AND METHOD FOR ROUTING A DATA MESSAGE THROUGH A MESSAGE NETWORK
51
Patent #:
8599913
Issue Dt:
12/03/2013
Application #:
13195685
Filing Dt:
08/01/2011
Title:
DATA REGENERATION APPARATUS AND METHOD FOR PCI EXPRESS
52
Patent #:
8694855
Issue Dt:
04/08/2014
Application #:
13287443
Filing Dt:
11/02/2011
Title:
ERROR CORRECTION CODE TECHNIQUE FOR IMPROVING READ STRESS ENDURANCE
53
Patent #:
8694849
Issue Dt:
04/08/2014
Application #:
13330573
Filing Dt:
12/19/2011
Title:
SHUFFLER ERROR CORRECTION CODE SYSTEM AND METHOD
54
Patent #:
8656257
Issue Dt:
02/18/2014
Application #:
13434770
Filing Dt:
03/29/2012
Title:
NONVOLATILE MEMORY CONTROLLER WITH CONCATENATED ERROR CORRECTION CODES
55
Patent #:
8621318
Issue Dt:
12/31/2013
Application #:
13435572
Filing Dt:
03/30/2012
Title:
NONVOLATILE MEMORY CONTROLLER WITH ERROR DETECTION FOR CONCATENATED ERROR CORRECTION CODES
56
Patent #:
8917734
Issue Dt:
12/23/2014
Application #:
13681257
Filing Dt:
11/19/2012
Title:
METHOD AND APPARATUS FOR AN AGGREGATED NON-TRANSPARENT REQUESTER ID TRANSLATION FOR A PCIE SWITCH
57
Patent #:
9025495
Issue Dt:
05/05/2015
Application #:
13743225
Filing Dt:
01/16/2013
Title:
FLEXIBLE ROUTING ENGINE FOR A PCI EXPRESS SWITCH AND METHOD OF USE
58
Patent #:
8995302
Issue Dt:
03/31/2015
Application #:
13743281
Filing Dt:
01/16/2013
Title:
METHOD AND APPARATUS FOR TRANSLATED ROUTING IN AN INTERCONNECT SWITCH
59
Patent #:
9146890
Issue Dt:
09/29/2015
Application #:
13750991
Filing Dt:
01/25/2013
Title:
METHOD AND APPARATUS FOR MAPPED I/O ROUTING IN AN INTERCONNECT SWITCH
60
Patent #:
9128858
Issue Dt:
09/08/2015
Application #:
13752757
Filing Dt:
01/29/2013
Title:
APPARATUS AND METHOD FOR ADJUSTING A CORRECTABLE RAW BIT ERROR RATE LIMIT IN A MEMORY SYSTEM USING STRONG LOG-LIKELIHOOD (LLR) VALUES
61
Patent #:
9092353
Issue Dt:
07/28/2015
Application #:
13752885
Filing Dt:
01/29/2013
Title:
APPARATUS AND METHOD BASED ON LDPC CODES FOR ADJUSTING A CORRECTABLE RAW BIT ERROR RATE LIMIT IN A MEMORY SYSTEM
62
Patent #:
8990661
Issue Dt:
03/24/2015
Application #:
13785848
Filing Dt:
03/05/2013
Title:
LAYER SPECIFIC ATTENUATION FACTOR LDPC DECODER
63
Patent #:
9397701
Issue Dt:
07/19/2016
Application #:
13792831
Filing Dt:
03/11/2013
Title:
SYSTEM AND METHOD FOR LIFETIME SPECIFIC LDPC DECODING
64
Patent #:
8935598
Issue Dt:
01/13/2015
Application #:
13797444
Filing Dt:
03/12/2013
Title:
SYSTEM AND METHOD FOR ADAPTIVE CHECK NODE APPROXIMATION IN LDPC DECODING
65
Patent #:
8984365
Issue Dt:
03/17/2015
Application #:
13860300
Filing Dt:
04/10/2013
Title:
SYSTEM AND METHOD FOR REDUCED MEMORY STORAGE IN LDPC DECODING
66
Patent #:
8984376
Issue Dt:
03/17/2015
Application #:
13860411
Filing Dt:
04/10/2013
Title:
SYSTEM AND METHOD FOR AVOIDING ERROR MECHANISMS IN LAYERED ITERATIVE DECODING
Assignor
1
INTEGRATED DEVICE TECHNOLOGY, INC.
Exec Dt:
07/12/2013
Assignee
1
PMC-SIERRA US, INC.
1380 BORDEAUX DRIVE
SUNNYVALE, CALIFORNIA 94089
Correspondence name and address
JONES DAY
222 EAST 41ST STREET
NEW YORK, NEW YORK 10017-6702

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