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11/11/1997
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08387192
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02/13/1995
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Title:
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SYSTEM FOR MANAGING AND ACCESSING A DYNAMICALLY EXPANDING COMPUTER DATABASE
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01/28/1997
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08390712
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02/17/1995
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Title:
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02/06/1996
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08392278
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02/22/1995
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Title:
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12/23/1997
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08394383
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02/24/1995
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Title:
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09/09/1997
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08394384
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02/04/1997
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Title:
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METHOD AND APPARATUS FOR DETECTING ERRORS IN A SYSTEM THAT EMPLOYS MULTI-BIT WIDE MEMORY ELEMENTS
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06/04/1996
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08396402
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02/27/1995
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Title:
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SYSTEM AND METHOD FOR CONTROLLING THE COMPETITION BETWEEN PROCESSORS, IN AN AT-COMPATIBLE MULTIPROCESSOR ARRAY, TO INITIALIZE A TEST SEQUENCE
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07/21/1998
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08396677
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03/01/1995
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07/21/1998
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08396679
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03/01/1995
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Title:
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METHOD AND APPARATUS FOR DYNAMICALLY TESTING A MEMORY WITHIN A COMPUTER SYSTEM
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07/21/1998
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08396680
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03/01/1995
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Title:
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METHOD AND APPARATUS FOR PROVIDING FAULT DETECTION TO A BUS WITHIN A COMPUTER SYSTEM
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04/23/1996
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08396952
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03/01/1995
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Title:
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METHOD AND APPARATUS FOR DETERMINING THE SOURCE AND NATURE OF AN ERROR WITHIN A COMPUTER SYSTEM
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01/21/1997
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08396953
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03/01/1995
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Title:
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METHOD AND APPARATUS FOR INDICATING THE SEVERITY OF A FAULT WITHIN A COMPUTER SYSTEM
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03/31/1998
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08397429
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03/01/1995
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Title:
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METHOD FOR MAKING A DATA BASE AVAILABLE TO A USER PROGRAM DURING DATA BASE RECOVERY
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12/09/1997
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08399274
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03/06/1995
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Title:
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APPARATUS AND METHOD FOR SIGNAL IDENTIFICATION
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12/05/1995
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08400063
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03/07/1995
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Title:
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MAGNETICALLY-ATTACHABLE EMI SHIELDING COVER FOR ATTENUATING ELECTROMAGNETIC EMANATION
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05/21/1996
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08402684
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03/13/1995
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Title:
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ELECTRONIC TESTER FOR TESTING IDDQ IN AN INTEGRATED CIRCUIT CHIP
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Patent #:
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11/03/1998
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08404791
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03/15/1995
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Title:
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MEMORY QUEUE WITH ADJUSTABLE PRIORITY AND CONFLICT DETECTION
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05/26/1998
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08406265
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03/17/1995
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Title:
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SYSTEM FOR OPTIMALLY PROCESSING A TRANSACTION AND A QUERY TO THE SAME THE SAME DATABASE CONCURRENTLY
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Patent #:
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12/23/1997
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08406278
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Filing Dt:
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03/17/1995
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Title:
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SYSTEM FOR OPTIMALLY STORING A DATA FILE FOR ENHANCED QUERY PROCESSING
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Patent #:
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04/23/1996
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08406811
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Filing Dt:
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03/16/1995
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Title:
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CONFIGURABLE NETWORK USING DUAL SYSTEM BUSSES WITH COMMON PROTOCOL COM PATIBLE STORE-THROUGH AND NON-STORE-THROUGH CACHE MEMORIES
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Issue Dt:
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06/25/1996
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08411250
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03/27/1995
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Title:
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FLOPPY-DISK AIR AND DUST DAM
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12/09/1997
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08414881
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Filing Dt:
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03/31/1995
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Title:
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METHOD FOR PLACING LOGIC FUNCTIONS AND CELLS IN A LOGIC DESIGN USING FLOOR PLANNING BY ANALOGY
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Patent #:
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Issue Dt:
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08/19/1997
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08414900
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Filing Dt:
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03/31/1995
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Title:
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SYSTEM ARCHITECTURE FOR IMPROVED NETWORK INPUT/OUTPUT PROCESSING
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07/21/1998
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08418317
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04/07/1995
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Title:
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CHECK READER UTILIZING SYNC-TAGS TO MATCH THE IMAGES OF THE FRONT AND REAR FACES OF A CHECK
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Issue Dt:
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01/02/1996
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08420329
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Filing Dt:
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04/11/1995
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Title:
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DEDICATED PROCESSOR FOR TASK I/O AND MEMORY MANAGEMENT
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Patent #:
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Issue Dt:
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10/22/1996
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08422119
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Filing Dt:
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04/14/1995
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Title:
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FLASH MEMORY WEAR LEVELING SYSTEM PROVIDING IMMEDIATE DIRECT ACCESS TO MICROPROCESSOR
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Patent #:
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02/23/1999
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08422204
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Filing Dt:
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03/31/1995
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Title:
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VARIABLE RATE CLOCK FOR TIMING RECOVERY AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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01/20/1998
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08428684
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04/25/1995
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Title:
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METHODS AND APPARATUS FOR EXCHANGING ACTIVE MESSAGES IN A PARALLEL PROCESSING COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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08/11/1998
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08430988
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04/28/1995
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Title:
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HIGH POWER SOLID STATE MICROWAVE TRANSMITTER
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Issue Dt:
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12/09/1997
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08431366
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Filing Dt:
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04/28/1995
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Title:
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CACHE CONTROLLER UTILIZING A STATE MACHINE FOR CONTROLLING INVALIDATIONS IN A NETWORK WITH DUAL SYSTEM BUSSES
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Patent #:
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Issue Dt:
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11/05/1996
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Application #:
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08433650
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Filing Dt:
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05/04/1995
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Title:
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APPARATUS AND METHOD FOR FREQUENCY SPACE MODELING
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08437764
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Filing Dt:
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05/09/1995
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Title:
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DATA TRANSMISSION SYSTEM WITH A LOW PEAK-TO-AVERAGE POWER RATIO BASED ON DISTORTING SMALL AMPLITUDE SIGNALS
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Patent #:
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Issue Dt:
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02/25/1997
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Application #:
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08451786
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Filing Dt:
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05/26/1995
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Title:
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ARRANGEMENT FOR ALIGNING, FOCUSING AND NORMALIZING IMAGING SYSTEM
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Patent #:
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Issue Dt:
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04/23/1996
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Application #:
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08451800
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05/26/1995
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Title:
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DOCUMENT SEPARATION/DETECTION TECHNIQUE
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Patent #:
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Issue Dt:
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06/04/1996
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Application #:
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08451801
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Filing Dt:
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05/26/1995
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Title:
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DOCUMENT STACKING TECHNIQUE
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Patent #:
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Issue Dt:
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05/12/1998
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08454849
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Filing Dt:
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05/31/1995
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Title:
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VIDEO HARDWARE FOR PROTECTED, MULTIPROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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10/21/1997
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08454910
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Filing Dt:
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05/31/1995
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Title:
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SYSTEM FOR HIGH-SPEED TRANSFER OF A CONTINOUS DATA STREAM BETWEEN HOSTS USING MULTIPLE PARALLEL COMMUNICATION LINKS
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Issue Dt:
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09/23/1997
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08470582
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Filing Dt:
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06/09/1995
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Title:
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METHOD FOR COLLAPSING A VERSION TREE WHICH DEPICTS A HISTORY OF SYSTEM DATA AND PROCESSES FOR AN ENTERPRISE
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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08489313
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Filing Dt:
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06/09/1995
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Title:
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METHOD FOR LOCATING A VERSIONED OBJECT WITHIN A VERSION TREE DEPICTING A HISTORY OF SYSTEM DATA AND PROCESSES FOR AN ENTERPRISE
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Issue Dt:
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04/16/1996
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08493058
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06/21/1995
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Title:
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SYSTEM FOR POINTER UPDATING ACROSS PAGED MEMORY
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Issue Dt:
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06/10/1997
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08493383
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Filing Dt:
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06/21/1995
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Title:
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AVOIDING INSTABILITY
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Patent #:
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Issue Dt:
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12/08/1998
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08496917
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Filing Dt:
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06/30/1995
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Title:
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DOCUMENT PAGE ANALYZER AND METHOD
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Issue Dt:
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06/04/1996
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Application #:
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08502404
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Filing Dt:
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07/14/1995
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Title:
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APPARATUS FOR DETERMINING THE DIRECTION OF SIGNAL/DATA FLOW ON A SCSI BUS FOR CONVERTING BETWEEN SINGLE ENDED AND DIFFERENTIAL TYPE SIGNALS
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Issue Dt:
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04/07/1998
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08503955
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07/19/1995
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Title:
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APPARATUS FOR SYNCHRONIZING MULTIPOINT-TO-POINT COMMUNICATIONS SYSTEMS
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08/24/1999
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08503956
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07/19/1995
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Title:
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METHOD AND APPARATUS FOR INCREASING THE SPEED OF A FULL CODE BOOK SEARCH IN A QUARTIZER ENCODER
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Patent #:
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Issue Dt:
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01/20/1998
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08504303
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Filing Dt:
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07/19/1995
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Title:
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DATA PROCESSING ARRAY IN WHICH SUB-ARRAYS ARE ESTABLISHED AND RUN INDEPENDENTLY
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Issue Dt:
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06/09/1998
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Application #:
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08505140
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Filing Dt:
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07/21/1995
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Title:
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METHOD FOR PROVIDING OBJECT DATABASE INDEPENDENCE IN A PROGRAM WRITTEN USING THE C++ PROGRAMMING LANGUAGE
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Issue Dt:
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03/24/1998
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08505987
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Filing Dt:
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07/24/1995
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Title:
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MULTIPROCESSOR WITH SPLIT TRANSACTION BUS ARCHITECTURE FOR SENDING RETRY DIRECTION TO OTHER BUS MODULE UPON A MATCH OF SUBSEQUENT ADDRESS BUS CYCLES TO CONTENT OF CACHE TAG
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Issue Dt:
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05/26/1998
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08506647
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07/25/1995
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Title:
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METHOD FOR GENERICALLY MANIPULATING PROPERTIES OF OBJECTS IN AN OBJECT ORIENTED REPOSITORY
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Issue Dt:
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07/15/1997
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Application #:
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08510283
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08/02/1995
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Title:
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BUS REQUEST ERROR DETECTION
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Issue Dt:
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09/08/1998
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Application #:
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08515574
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Filing Dt:
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08/16/1995
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Title:
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METHOD AND APPARATUS FOR RELIABLE ACCESS TO AUDIO AND FACSIMILE MESSAGE STORAGE AND RETRIEVAL SYSTEM
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08515605
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Filing Dt:
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08/16/1995
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Title:
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PROGRAMMABLE BUS INTERFACE UNIT DATA PATH
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Issue Dt:
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03/19/1996
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Application #:
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08516727
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Filing Dt:
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08/18/1995
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Title:
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PINCH-ROLL WITH FLOATING DAMPER
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Issue Dt:
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05/26/1998
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08518352
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Filing Dt:
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06/14/1995
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Title:
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RANDOM DELAY SUBSYSTEMS
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Issue Dt:
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06/02/1998
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Application #:
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08518353
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Filing Dt:
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06/14/1995
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Title:
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LIVELOCK AVOIDANCE
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Patent #:
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Issue Dt:
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04/07/1998
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Application #:
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08520442
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Filing Dt:
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08/29/1995
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Title:
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LEAST RECENTLY USED BLOCK REPLACEMENT FOR FOUR BLOCK CACHE LOGIC SYSTEM
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08521003
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Filing Dt:
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08/30/1995
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Title:
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SYSTEM WITH USER SPECIFIED PATTERN DEFINITIONS FOR MATCHING INPUT MESSAGES AND ASSOCIATED DECISIONS FOR CONDITIONALLY RESPONDING TO THE INPUT MESSAGES
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Issue Dt:
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08/11/1998
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Application #:
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08521203
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Filing Dt:
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08/30/1995
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Title:
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APPARATUS AND METHOD FOR MESSAGE MATCHING USING PATTERN DECISIONS IN A MESSAGE MATCHING AND AUTOMATIC RESPONSE SYSTEM
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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08521695
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Filing Dt:
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08/31/1995
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Title:
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METHOD FOR GENERATING AN INTERNET PROTOCOL SUITE CHECKSUM IN A SINGLE MARCO INSTRUCTION
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08524017
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Filing Dt:
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08/29/1995
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Title:
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METHOD OF STABILIZING COMPONENT AND NET NAMES OF INTEGRATED CIRCUITS IN ELECTRONIC DESIGN AUTOMATION SYSTEMS
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Patent #:
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Issue Dt:
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02/11/1997
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Application #:
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08527743
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Filing Dt:
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09/13/1995
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Title:
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EXTENDED DISTANCE FIBER OPTIC INTERFACE
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Issue Dt:
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05/06/1997
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08529167
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Filing Dt:
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09/15/1995
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Title:
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MEMORY BASED INTERFACE
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Issue Dt:
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11/04/1997
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Application #:
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08530782
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Filing Dt:
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09/19/1995
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Title:
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SYSTEM AND METHOD FOR SATISFYING MUTUALLY EXCLUSIVE GATING REQUIREMENTS IN AUTOMATIC TEST PATTERN GENERATION SYSTEMS
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Issue Dt:
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04/07/1998
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Application #:
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08546650
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Filing Dt:
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10/23/1995
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Title:
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FAST WRITE INITIALIZATION SYSTEM FOR MICROCODE RAM VIA DATA PATH ARRAY USING PRE-LOADED FLASH MEMORY AND PROGRAMMABLE CONTROL LOGIC ARRAY
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Issue Dt:
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01/06/1998
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Application #:
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08546651
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Filing Dt:
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10/23/1995
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Title:
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SYSTEM FOR FAST READ AND VERIFICATION OF MICROCODE RAM
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Issue Dt:
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06/17/1997
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Application #:
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08547430
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Filing Dt:
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10/24/1995
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Title:
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CAMERA FOR HIGH-SPEED IMAGING
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Issue Dt:
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12/08/1998
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Application #:
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08549352
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Filing Dt:
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10/27/1995
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Title:
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METHOD FOR GENERATING OLE AUTOMATION AND IDL INTERFACES FROM METADATA INFORMATION
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Issue Dt:
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02/27/2001
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Application #:
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08551981
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Filing Dt:
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11/02/1995
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Title:
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DUAL THRESHOLD DIGITAL RECEIVER WITH LARGE NOISE MARGIN
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Patent #:
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Issue Dt:
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05/26/1998
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Application #:
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08555551
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Filing Dt:
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11/09/1995
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Title:
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EXTRACTING AND PROCESSING DATA DERIVED FROM A COMMON CHANNEL SIGNALLING NETWORK
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Patent #:
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Issue Dt:
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01/14/1997
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Application #:
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08556247
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Filing Dt:
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11/09/1995
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Title:
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METHOD FOR SWITCHING BETWEEN A PLURALITY OF CLOCK SOURCES UPON DETECTION OF PHASE ALIGNMENT THEREOF AND DISABLING ALL OTHER CLOCK SOURCES
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Patent #:
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Issue Dt:
|
03/03/1998
|
Application #:
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08558246
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Filing Dt:
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11/17/1995
|
|
Title:
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HIGH PERFORMANCE INSTRUCTION DATA PATH
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|
|
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Patent #:
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|
Issue Dt:
|
12/10/1996
|
Application #:
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08563876
|
Filing Dt:
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11/28/1995
|
|
Title:
|
SYNCHRONOUS CDMA TRANSMITTER/RECEIVER
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|
|
|
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Patent #:
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|
Issue Dt:
|
06/02/1998
|
Application #:
|
08566116
|
Filing Dt:
|
11/30/1995
|
|
Title:
|
METHOD OF AND APPARATUS FOR RAPIDLY LOADING ADDRESSING REGISTERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/1997
|
Application #:
|
08566479
|
Filing Dt:
|
12/04/1995
|
|
Title:
|
METHOD FOR CONTROLLING THE EXPANSION OF CONNECTIONS TO A SCSI BUS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
02/24/1998
|
Application #:
|
08567394
|
Filing Dt:
|
12/01/1995
|
|
Title:
|
METHOD FOR GENERICALLY INVOKING OPERATION IN AN OBJECT ORIENTED REPOSITORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08573015
|
Filing Dt:
|
12/15/1995
|
|
Title:
|
METHOD OF COMPACTING DATA REPRESENTATIONS OF HIERARCHICAL LOGIC DESIGNS USED FOR STATIC TIMING ANALYSIS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/1997
|
Application #:
|
08573306
|
Filing Dt:
|
12/15/1995
|
|
Title:
|
INTEGRATED CIRCUIT MEMORY HAVING HIGH SPEED AND LOW POWER BY SELECTIVELY COUPLING COMPENSATION COMPONENTS TO A PULSE GENERATOR
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/1997
|
Application #:
|
08573509
|
Filing Dt:
|
12/15/1995
|
|
Title:
|
MULTIPLE MEMORY BIT/CHIP FAILURE DETECTION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08576113
|
Filing Dt:
|
12/21/1995
|
|
Title:
|
APPARATUS FOR FIBRE CHANNEL TRANSMISSION HAVING INTERFACE LOGIC, BUFFER MEMORY, MULTIPLEXOR/MICROPROCESSOR, AND BUS CONTROL DEVICE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/01/1997
|
Application #:
|
08577908
|
Filing Dt:
|
12/04/1995
|
|
Title:
|
DAYCLOCK CARRY AND COMPARE TREE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/15/1998
|
Application #:
|
08577909
|
Filing Dt:
|
12/04/1995
|
|
Title:
|
PROCESSOR COMMAND FOR PROMPTING A STORAGE CONTROLLER TO WRITE A DAY CLOCK VALUE TO SPECIFIED MEMORY LOCATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/1997
|
Application #:
|
08578783
|
Filing Dt:
|
12/26/1995
|
|
Title:
|
PIPELINED MICROINSTRUCTION APPARATUS AND METHODS WITH BRANCH PREDICTION AND SPECULATIVE STATE CHANGING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/1997
|
Application #:
|
08579683
|
Filing Dt:
|
12/28/1995
|
|
Title:
|
MULTI-PROCESSOR DATA PROCESSING SYSTEM WITH MULTIPLE, SEPARATE INSTRUCTION AND OPERAND SECOND LEVEL CACHES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/1997
|
Application #:
|
08579896
|
Filing Dt:
|
12/28/1995
|
|
Title:
|
MULTI-PROCESSOR DATA PROCESSING SYSTEM WITH CONTROL FOR GRANTING MULTIPLE STORAGE LOCKS IN PARALLEL AND PARALLEL LOCK PRIORITY AND SECOND LEVEL CACHE PRIORITY QUEUES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/1999
|
Application #:
|
08579897
|
Filing Dt:
|
12/28/1995
|
|
Title:
|
MULTI-PROCESSOR DATA PROCESSING SYSTEM WITH MULTIPLE SECOND LEVEL CACHES MAPABLE TO ALL OF ADDRESSABLE MEMORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/1998
|
Application #:
|
08581085
|
Filing Dt:
|
12/29/1995
|
|
Title:
|
MAGNETIC INK RECORDER CALIBRATION APPARATUS AND METHOD
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/15/1998
|
Application #:
|
08583326
|
Filing Dt:
|
01/05/1996
|
|
Title:
|
PROCESSOR PATH EMULATION SYSTEM PROVIDING FAST READOUT AND VERIFICATION OF MAIN MEMORY BY MAINTENANCE CONTROLLER INTERFACE TO MAINTENANCE SUBSYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/1999
|
Application #:
|
08583376
|
Filing Dt:
|
01/05/1996
|
|
Title:
|
FAST WRITE INITIALIZATION METHOD AND SYSTEM FOR LOADING CHANNEL ADAPTER MICROCODE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08583377
|
Filing Dt:
|
01/05/1996
|
|
Title:
|
HIGH SPEED INITIALIZATION SYSTEM FOR RAM DEVICES USING JTAG LOOP FOR PROVIDING VALID PARITY BITS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/1997
|
Application #:
|
08583765
|
Filing Dt:
|
01/11/1996
|
|
Title:
|
FAULT TOLERANT APPARATUS AND METHOD FOR MAINTAINING ONE OR MORE QUEUES THAT ARE SHARED BY MULTIPLE PROCESSORS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08584644
|
Filing Dt:
|
01/11/1996
|
|
Title:
|
FLEXIBLE, SOFT, RANDOM-LIKE COUNTER SYSTEM FOR BUS PROTOCOL WAITING PERIODS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08589793
|
Filing Dt:
|
01/22/1996
|
|
Title:
|
MULTIPLE POWER DOMAIN POWER LOSS DETECTION AND INTERFACE DISABLE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08591844
|
Filing Dt:
|
01/25/1996
|
|
Title:
|
METHOD AND CIRCUITRY FOR MODIFYING DATA WORDS IN A MULTI-LEVEL DISTRIBUTED DATA PROCESSING SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08592088
|
Filing Dt:
|
01/26/1996
|
|
Title:
|
DERIVED GENERATION SYSTEM FOR PARITY BITS WITH BI-DIRECTIONAL, CROSSED-FIELDS UTILIZING STORED FLIP-BIT FEATURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08592089
|
Filing Dt:
|
01/26/1996
|
|
Title:
|
MULTI SET CACHE STRUCTURE HAVING PARITY RAMS HOLDING PARITY BITS FOR TAG DATA AND FOR STATUS DATA UTILIZING PREDICTION CIRCUITRY THAT PREDICTS AND GENERATES THE NEEDED PARITY BITS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/23/1997
|
Application #:
|
08592090
|
Filing Dt:
|
01/26/1996
|
|
Title:
|
METHOD AND SYSTEM FOR RANDOMLY SELECTING A CHACHE SET FOR CACHE FILL OPERATIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1998
|
Application #:
|
08592092
|
Filing Dt:
|
01/26/1996
|
|
Title:
|
SMART FILL SYSTEM FOR MULTIPLE CACHE NETWORK
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08592095
|
Filing Dt:
|
01/26/1996
|
|
Title:
|
ADJUSTING PRIORITY CACHE ACCESS OPERATIONS WITH MULTIPLE LEVEL PRIORITY STATES BETWEEN A CENTRAL PROCESSOR AND AN INVALIDATION QUEUE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
01/28/1997
|
Application #:
|
08602259
|
Filing Dt:
|
02/15/1996
|
|
Title:
|
CACHE INVALIDATION SEQUENCE SYSTEM UTILIZING ODD AND EVEN INVALIDATION QUEUES WITH SHORTER INVALIDATION CYCLES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/16/1997
|
Application #:
|
08606356
|
Filing Dt:
|
02/23/1996
|
|
Title:
|
DATA PROCESSING SYSTEM WITH FAST MESSAGE PROCESSING FOR UPGRADED INPUT/OUTPUT STATIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08619050
|
Filing Dt:
|
03/20/1996
|
|
Title:
|
CACHE MEMORY WHICH SELECTS ONE OF SEVERAL BLOCKS TO UPDATE BY DIGITALLY COMBINING CONTROL BITS IN ALL THE BLOCKS
|
|
