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Patent #:
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Issue Dt:
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07/03/2012
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Application #:
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10921376
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Filing Dt:
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08/18/2004
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Publication #:
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Pub Dt:
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03/03/2005
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Title:
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LEADFRAME-BASED MOLD ARRAY PACKAGE HEAT SPREADER AND FABRICATION METHOD THEREFOR
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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11163305
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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04/19/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM USING ETCHED LEADFRAME
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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11164209
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Filing Dt:
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11/14/2005
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Publication #:
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Pub Dt:
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06/22/2006
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Title:
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HYPER THERMALLY ENHANCED SEMICONDUCTOR PACKAGE SYSTEM COMPRISING HEAT SLUGS ON OPPOSITE SURFACES OF A SEMICONDUCTOR CHIP
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Patent #:
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Issue Dt:
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10/23/2012
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Application #:
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11462509
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Filing Dt:
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08/04/2006
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Publication #:
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Pub Dt:
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02/07/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FILLED WAFER RECESS
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Patent #:
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Issue Dt:
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07/03/2012
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Application #:
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11465706
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
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02/21/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WAFERSCALE SPACER
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Patent #:
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Issue Dt:
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08/28/2012
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Application #:
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11615919
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Filing Dt:
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12/22/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MOLD FLASH PREVENTION TECHNOLOGY
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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11616878
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Filing Dt:
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12/28/2006
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Publication #:
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Pub Dt:
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07/03/2008
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Title:
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BRIDGE STACK INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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06/12/2012
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Application #:
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11670714
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Filing Dt:
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02/02/2007
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Publication #:
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Pub Dt:
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07/03/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE WITH MOLDED CAVITY
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Patent #:
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Issue Dt:
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06/26/2012
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Application #:
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11670899
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Filing Dt:
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02/02/2007
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Publication #:
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Pub Dt:
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01/17/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLASHLESS LEADS
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Patent #:
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Issue Dt:
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09/04/2012
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Application #:
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11689229
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Filing Dt:
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03/21/2007
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Publication #:
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Pub Dt:
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09/25/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD SUPPORT
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Patent #:
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Issue Dt:
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06/26/2012
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Application #:
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11694921
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Filing Dt:
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03/30/2007
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Publication #:
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Pub Dt:
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10/02/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATING FEATURES
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Patent #:
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Issue Dt:
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05/15/2012
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Application #:
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11750715
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Filing Dt:
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05/18/2007
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Publication #:
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Pub Dt:
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11/20/2008
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Title:
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ELECTRONIC SYSTEM WITH EXPANSION FEATURE
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Patent #:
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Issue Dt:
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06/19/2012
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Application #:
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11769691
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Filing Dt:
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06/27/2007
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Publication #:
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Pub Dt:
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01/01/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM WITH ADHESIVELESS PACKAGE ATTACH
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Patent #:
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Issue Dt:
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09/25/2012
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Application #:
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11773951
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Filing Dt:
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07/05/2007
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Publication #:
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Pub Dt:
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01/08/2009
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Title:
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SEMICONDUCTOR PACKAGE SYSTEM WITH PATTERNED MASK OVER THERMAL RELIEF
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Patent #:
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Issue Dt:
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05/01/2012
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Application #:
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11849263
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Filing Dt:
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08/31/2007
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Publication #:
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Pub Dt:
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12/20/2007
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Title:
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NESTED INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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11854989
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Filing Dt:
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09/13/2007
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Publication #:
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Pub Dt:
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03/19/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADS SEPARATED FROM A DIE PADDLE
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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11934069
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Filing Dt:
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11/01/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTING INTERCONNECTS
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Patent #:
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Issue Dt:
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09/04/2012
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Application #:
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11938371
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Filing Dt:
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11/12/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
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Patent #:
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Issue Dt:
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05/22/2012
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Application #:
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11947303
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Filing Dt:
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11/29/2007
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Publication #:
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Pub Dt:
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06/04/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH ANTI-MOLD FLASH FEATURE
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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11949133
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Filing Dt:
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12/03/2007
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Publication #:
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Pub Dt:
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06/04/2009
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Title:
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WAFER LEVEL DIE INTEGRATION AND METHOD
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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11950216
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Filing Dt:
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12/04/2007
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKED DIE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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05/15/2012
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Application #:
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11956132
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Filing Dt:
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12/13/2007
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR SHIELDING ELECTROMAGNETIC INTERFERENCE
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Patent #:
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Issue Dt:
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08/21/2012
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Application #:
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11965653
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Filing Dt:
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12/27/2007
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Publication #:
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Pub Dt:
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07/02/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTRA-STACK ENCAPSULATION
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Patent #:
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Issue Dt:
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07/17/2012
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Application #:
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12018065
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Filing Dt:
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01/22/2008
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Publication #:
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Pub Dt:
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07/24/2008
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Title:
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SYSTEM FOR PEELING SEMICONDUCTOR CHIPS FROM TAPE
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Patent #:
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Issue Dt:
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09/04/2012
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Application #:
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12035493
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Filing Dt:
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02/22/2008
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PENETRABLE FILM ADHESIVE
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Patent #:
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Issue Dt:
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09/25/2012
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Application #:
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12046430
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Filing Dt:
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03/11/2008
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Publication #:
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Pub Dt:
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09/17/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRATION PORT
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Patent #:
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Issue Dt:
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07/03/2012
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Application #:
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12050797
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Filing Dt:
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03/18/2008
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Publication #:
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Pub Dt:
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10/02/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SINK SPACER STRUCTURES
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Patent #:
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Issue Dt:
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10/16/2012
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Application #:
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12051305
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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PACKAGE IN PACKAGE SYSTEM INCORPORATING AN INTERNAL STIFFENER COMPONENT
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Patent #:
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Issue Dt:
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08/21/2012
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Application #:
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12053751
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Filing Dt:
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03/24/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STEP MOLD RECESS
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Patent #:
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Issue Dt:
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07/31/2012
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Application #:
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12113888
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Filing Dt:
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05/01/2008
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Publication #:
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Pub Dt:
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08/28/2008
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Title:
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STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONNECT INTERFACE
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Patent #:
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Issue Dt:
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04/03/2012
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Application #:
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12134179
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Filing Dt:
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06/05/2008
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Publication #:
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Pub Dt:
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12/11/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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12136037
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Filing Dt:
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06/09/2008
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Publication #:
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Pub Dt:
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12/10/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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12137529
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Filing Dt:
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06/11/2008
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Publication #:
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Pub Dt:
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12/17/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERNAL STACKING MODULE
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Patent #:
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Issue Dt:
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09/18/2012
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Application #:
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12172095
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Filing Dt:
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07/11/2008
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Publication #:
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Pub Dt:
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01/14/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CHIP ON LEAD
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Patent #:
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Issue Dt:
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09/18/2012
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Application #:
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12188995
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Filing Dt:
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08/08/2008
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Publication #:
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Pub Dt:
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02/11/2010
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Title:
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EXPOSED INTERCONNECT FOR A PACKAGE ON PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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05/22/2012
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Application #:
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12207332
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Filing Dt:
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09/09/2008
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Publication #:
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Pub Dt:
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03/11/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT STRUCTURE WITH INTEGRATED PASSIVE DEVICE AND DISCRETE COMPONENT
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Patent #:
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Issue Dt:
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10/16/2012
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Application #:
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12207493
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Filing Dt:
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09/09/2008
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Publication #:
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Pub Dt:
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03/19/2009
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Title:
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MEMORY DEVICE SYSTEM WITH STACKED PACKAGES
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Patent #:
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Issue Dt:
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05/01/2012
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Application #:
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12329789
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Filing Dt:
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12/08/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE IN SUBSTRATE FOR IPD AND BASEBAND CIRCUIT SEPARATED BY HIGH-RESISTIVITY MOLDING COMPOUND
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Patent #:
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Issue Dt:
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05/01/2012
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Application #:
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12329800
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Filing Dt:
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12/08/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING BOND WIRES AND STUD BUMPS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
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Patent #:
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Issue Dt:
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10/09/2012
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Application #:
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12332318
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Filing Dt:
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12/10/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A CONDUCTIVE VIA-IN-VIA STRUCTURE
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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12362627
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Filing Dt:
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01/30/2009
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Publication #:
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Pub Dt:
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07/23/2009
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Title:
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FLIP CHIP INTERCONNECT SOLDER MASK
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Patent #:
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Issue Dt:
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07/10/2012
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Application #:
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12412303
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Filing Dt:
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03/26/2009
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Publication #:
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Pub Dt:
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10/08/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE CONTROL SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/28/2012
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Application #:
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12488043
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Filing Dt:
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06/19/2009
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Publication #:
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Pub Dt:
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12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADFRAME HAVING RADIAL-SEGMENTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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12488383
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Filing Dt:
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06/19/2009
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Publication #:
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Pub Dt:
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12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/05/2012
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Application #:
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12492360
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Filing Dt:
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06/26/2009
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Publication #:
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Pub Dt:
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10/22/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE USING STUD BUMPS
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Patent #:
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Issue Dt:
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09/11/2012
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Application #:
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12533943
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Filing Dt:
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07/31/2009
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Publication #:
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Pub Dt:
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02/03/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING DIE WITH TSV IN CAVITY OF SUBSTRATE FOR ELECTRICAL INTERCONNECT OF FI-POP
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Patent #:
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Issue Dt:
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05/01/2012
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Application #:
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12545357
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Filing Dt:
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08/21/2009
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Publication #:
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Pub Dt:
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02/24/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF STACKING DIE ON LEADFRAME ELECTRICALLY CONNECTED BY CONDUCTIVE PILLARS
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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12557811
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Filing Dt:
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09/11/2009
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Publication #:
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Pub Dt:
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03/17/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
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Patent #:
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Issue Dt:
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09/11/2012
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Application #:
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12563514
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Filing Dt:
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09/21/2009
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Publication #:
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Pub Dt:
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03/24/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATED VIA AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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05/08/2012
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Application #:
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12573110
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Filing Dt:
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10/03/2009
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Publication #:
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Pub Dt:
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01/28/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFRAME SUBSTRATE
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Patent #:
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Issue Dt:
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05/08/2012
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Application #:
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12610763
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Filing Dt:
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11/02/2009
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Publication #:
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Pub Dt:
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05/05/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING COLUMN INTERCONNECT STRUCTURE TO REDUCE WAFER STRESS
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Patent #:
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Issue Dt:
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06/12/2012
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Application #:
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12633531
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Filing Dt:
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12/08/2009
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Publication #:
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Pub Dt:
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07/01/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL DURING REFLOW WITH SOLDER MASK PATCH
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Patent #:
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Issue Dt:
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10/09/2012
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Application #:
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12635631
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Filing Dt:
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12/10/2009
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Publication #:
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Pub Dt:
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06/16/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PIP WITH INNER KNOWN GOOD DIE INTERCONNECTED WITH CONDUCTIVE BUMPS
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|
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Patent #:
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|
Issue Dt:
|
07/03/2012
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Application #:
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12635695
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Filing Dt:
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12/10/2009
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Publication #:
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Pub Dt:
|
06/16/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HAVING PLATED TERMINAL LEADS AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
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Issue Dt:
|
10/16/2012
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Application #:
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12641319
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Filing Dt:
|
12/17/2009
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Publication #:
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Pub Dt:
|
06/23/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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|
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Patent #:
|
|
Issue Dt:
|
07/10/2012
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Application #:
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12643180
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Filing Dt:
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12/21/2009
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Publication #:
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Pub Dt:
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04/22/2010
| | | | |
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Title:
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SOLDER JOINT FLIP CHIP INTERCONNECTION HAVING RELIEF STRUCTURE
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Patent #:
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Issue Dt:
|
08/14/2012
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Application #:
|
12713018
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Filing Dt:
|
02/25/2010
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Publication #:
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Pub Dt:
|
08/25/2011
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING IPD IN FAN-OUT LEVEL CHIP SCALE PACKAGE
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Patent #:
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|
Issue Dt:
|
10/30/2012
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Application #:
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12727229
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Filing Dt:
|
03/18/2010
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Publication #:
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Pub Dt:
|
09/22/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/05/2012
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Application #:
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12731354
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Filing Dt:
|
03/25/2010
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Publication #:
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Pub Dt:
|
07/15/2010
| | | | |
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Title:
|
FUSIBLE I/O INTERCONNECTION SYSTEMS AND METHODS FOR FLIP-CHIP PACKAGING INVOLVING SUBSTRATE-MOUNTED STUD BUMPS
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|
|
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Patent #:
|
|
Issue Dt:
|
06/19/2012
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Application #:
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12732465
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Filing Dt:
|
03/26/2010
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|
Publication #:
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Pub Dt:
|
09/29/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/26/2012
|
Application #:
|
12772142
|
Filing Dt:
|
04/30/2010
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|
Publication #:
|
|
Pub Dt:
|
11/03/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
12789456
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Filing Dt:
|
05/28/2010
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|
Publication #:
|
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Pub Dt:
|
09/23/2010
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING HONEYCOMB MOLDING
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12794612
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Filing Dt:
|
06/04/2010
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|
Publication #:
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Pub Dt:
|
12/08/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THERMALLY CONDUCTIVE LAYER BETWEEN SEMICONDUCTOR DIE AND BUILD-UP INTERCONNECT STRUCTURE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
12796668
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Filing Dt:
|
06/08/2010
|
|
Publication #:
|
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Pub Dt:
|
12/08/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPART CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/19/2012
|
Application #:
|
12797922
|
Filing Dt:
|
06/10/2010
|
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DEVICE UNITS AND METHOD FOR MANUFACTURING THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2012
|
Application #:
|
12818462
|
Filing Dt:
|
06/18/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/22/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND UNDERFILL AND METHOD OF MANUFACTURE THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2012
|
Application #:
|
12822954
|
Filing Dt:
|
06/24/2010
|
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE AND METHOD FOR MANUFACTURING THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2012
|
Application #:
|
12827864
|
Filing Dt:
|
06/30/2010
|
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
|
Title:
|
QUAD FLAT PACK IN QUAD FLAT PACK INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD FOR MANUFACTURING THEREOF
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|
|
|
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Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
12832821
|
Filing Dt:
|
07/08/2010
|
|
Publication #:
|
|
Pub Dt:
|
10/28/2010
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE PILLARS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2012
|
Application #:
|
12859049
|
Filing Dt:
|
08/18/2010
|
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12882083
|
Filing Dt:
|
09/14/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/15/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
12882856
|
Filing Dt:
|
09/15/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/15/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULANT CONTAINMENT AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2012
|
Application #:
|
12911042
|
Filing Dt:
|
10/25/2010
|
|
Publication #:
|
|
Pub Dt:
|
02/17/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING A THERMAL DISSIPATION PATH THROUGH RDL AND CONDUCTIVE VIA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2012
|
Application #:
|
12912467
|
Filing Dt:
|
10/26/2010
|
|
Title:
|
EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
12942084
|
Filing Dt:
|
11/09/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/03/2011
| | | | |
|
Title:
|
ENCAPSULANT INTERPOSER SYSTEM WITH INTEGRATED PASSIVE DEVICES AND MANUFACTURING METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12950591
|
Filing Dt:
|
11/19/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/24/2011
| | | | |
|
Title:
|
SEMICONDUCTOR PACKAGE WITH SEMICONDUCTOR CORE STRUCTURE AND METHOD OF FORMING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12961490
|
Filing Dt:
|
12/06/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
12968257
|
Filing Dt:
|
12/14/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BUMP CONDUCTORS AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
12970755
|
Filing Dt:
|
12/16/2010
|
|
Publication #:
|
|
Pub Dt:
|
04/14/2011
| | | | |
|
Title:
|
PACKAGE-ON-PACKAGE SYSTEM WITH VIA Z-INTERCONNECTIONS AND METHOD FOR MANUFACTURING THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2012
|
Application #:
|
12973410
|
Filing Dt:
|
12/20/2010
|
|
Publication #:
|
|
Pub Dt:
|
04/21/2011
| | | | |
|
Title:
|
WIRE BONDING STRUCTURE AND METHOD THAT ELIMINATES SPECIAL WIRE BONDABLE FINISH AND REDUCES BONDING PITCH ON SUBSTRATES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12976753
|
Filing Dt:
|
12/22/2010
|
|
Publication #:
|
|
Pub Dt:
|
04/21/2011
| | | | |
|
Title:
|
METHOD FOR MANUFACTURING PACKAGE SYSTEM INCORPORATING FLIP-CHIP ASSEMBLY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
13019541
|
Filing Dt:
|
02/02/2011
|
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HOLES IN SUBSTRATE TO INTERCONNECT TOP SHIELD AND GROUND SHIELD
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
13019562
|
Filing Dt:
|
02/02/2011
|
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON RECESSED AND RAISED BOND FINGERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2012
|
Application #:
|
13019643
|
Filing Dt:
|
02/02/2011
|
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
|
Title:
|
STRUCTURE FOR BUMPED WAFER TEST
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
13023329
|
Filing Dt:
|
02/08/2011
|
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
|
Title:
|
METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE SYSTEM WITH DIE SUPPORT PAD
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2012
|
Application #:
|
13028501
|
Filing Dt:
|
02/16/2011
|
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR ELECTROMAGNETIC ISOLATION AND METHOD FOR MANUFACTURING THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
13029936
|
Filing Dt:
|
02/17/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/15/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SACRIFICIAL PROTECTIVE LAYER TO PROTECT SEMICONDUCTOR DIE EDGE DURING SINGULATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
13035617
|
Filing Dt:
|
02/25/2011
|
|
Publication #:
|
|
Pub Dt:
|
08/30/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE STRUCTURE USING CONDUCTIVE VIA AND EXPOSED BUMP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2012
|
Application #:
|
13039311
|
Filing Dt:
|
03/03/2011
|
|
Publication #:
|
|
Pub Dt:
|
06/23/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
13053141
|
Filing Dt:
|
03/21/2011
|
|
Publication #:
|
|
Pub Dt:
|
07/14/2011
| | | | |
|
Title:
|
SEMICONDUCTOR PACKAGE SYSTEM WITH FINE PITCH LEAD FINGERS AND METHOD OF MANUFACTURING THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2012
|
Application #:
|
13080070
|
Filing Dt:
|
04/06/1961
|
|
Publication #:
|
|
Pub Dt:
|
07/28/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2012
|
Application #:
|
13088647
|
Filing Dt:
|
04/18/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/08/2011
| | | | |
|
Title:
|
BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2012
|
Application #:
|
13090192
|
Filing Dt:
|
04/19/2011
|
|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
|
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MOUNTABLE INWARD AND OUTWARD INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2012
|
Application #:
|
13117500
|
Filing Dt:
|
05/27/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/22/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF MANUFACTURE THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
13155312
|
Filing Dt:
|
06/07/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THREE-DIMENSIONAL VERTICALLY ORIENTED INTEGRATED CAPACITORS
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|
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|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
13166417
|
Filing Dt:
|
06/22/2011
|
|
Publication #:
|
|
Pub Dt:
|
10/13/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2012
|
Application #:
|
13172560
|
Filing Dt:
|
06/29/2011
|
|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
|
Title:
|
METHOD FOR MANUFACTURING INTEGRATED CIRCUIT PACKAGE SYSTEM WITH UNDER PADDLE LEADFINGERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
13212986
|
Filing Dt:
|
08/18/2011
|
|
Publication #:
|
|
Pub Dt:
|
12/08/2011
| | | | |
|
Title:
|
APPARATUS FOR THERMALLY ENHANCED SEMICONDUCTOR PACKAGE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
13241153
|
Filing Dt:
|
09/22/2011
|
|
Publication #:
|
|
Pub Dt:
|
01/26/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
13397562
|
Filing Dt:
|
02/15/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
|
|
