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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09426208
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Filing Dt:
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10/25/1999
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Title:
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METHOD FOR FILLING TRENCHES
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09426304
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Filing Dt:
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10/25/1999
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Title:
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USE OF A RAPID THERMAL ANNEAL PROCESS TO CONTROL DRIVE CURRENT
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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09426339
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Filing Dt:
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10/25/1999
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Title:
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HEAT REMOVAL FROM SOI DEVICES BY USING METAL SUBSTRATES
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09426911
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Filing Dt:
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10/26/1999
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Title:
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METHOD TO FORM NARROW STRUCTURES USING DOUBLE-DAMASCENE PROCESS
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09427134
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Filing Dt:
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10/25/1999
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Title:
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SELECTIVE THINNING OF BARRIER OXIDE THROUGH MASKED SIMOX IMPLANT
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09427135
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Filing Dt:
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10/25/1999
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Title:
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THROUGH WAFER BACKSIDE CONTACT TO IMPROVE SOI HEAT DISSIPATION
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Patent #:
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Issue Dt:
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06/12/2001
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Application #:
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09427136
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Filing Dt:
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10/25/1999
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Title:
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BIPOLAR JUNCTION TRANSISTOR WITH TUNNELING CURRENT THROUGH THE GATE OF A FIELD EFFECT TRANSISTOR AS BASE CURRENT
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09427462
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Filing Dt:
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10/22/1999
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Title:
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ARGON DOPED EPITAXIAL LAYERS FOR INHIBITING PUNCHTHROUGH WITHIN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09427861
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Filing Dt:
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10/27/1999
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Title:
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PLASMA TREATMENT FOR POLYMER REMOVAL AFTER VIA ETCH
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Patent #:
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Issue Dt:
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02/20/2001
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Application #:
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09428591
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Filing Dt:
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10/27/1999
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Title:
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APPARATUS AND METHOD FOR DETECTING MICROBRANCHES EARLY
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09428614
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Filing Dt:
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10/27/1999
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Title:
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SYSTEM AND METHOD FOR TRANSPARENT HANDLING OF EXTENDED REGISTER STATES
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09428633
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Filing Dt:
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10/27/1999
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Title:
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SYSTEM AND METHOD FOR INITIATING AN OPERATING FREQUENCY USING DUAL-USE PINS
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09429428
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Filing Dt:
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10/28/1999
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Title:
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SYSTEM AND METHOD FOR MITIGATING WAFER SURFACE DISFORMATION DURING CHEMICAL MECHANICAL POLISHING (CMP)
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09429994
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Filing Dt:
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10/29/1999
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Title:
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ACTIVE CONTROL OF TEMPERATURE IN SCANNING PROBE LITHOGRAPHY AND MASKLESS LITHOGRAPHY
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09430120
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Filing Dt:
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10/29/1999
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Title:
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ALTERNATE FAULT HANDLER
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Patent #:
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Issue Dt:
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07/24/2001
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Application #:
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09430335
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Filing Dt:
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10/29/1999
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Title:
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METHOD AND SYSTEM FOR REDUCING ARC LAYER REMOVAL BY CONDENSING THE ARC LAYER
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09430475
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Filing Dt:
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10/29/1999
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Title:
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METHOD ANDAPPARATUS FOR INTEGRATION OF REAL-TIME TOOL DATA AND IN-LINE METROLOGY FOR FAULT DETECTION IN AN ADVANCED PROCESS CONTROL (APC) FRAMEWORK
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09430522
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Filing Dt:
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10/29/1999
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Title:
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METHOD FOR IDENTIFYING AND CORRECTING ERROR IN A CENTRAL PROCESSING UNIT
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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09430752
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Filing Dt:
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10/29/1999
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Title:
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APPARATUS AND METHOD FOR STORING MIN TERMS IN A NETWORK SWITCH PORT MEMORY FOR IDENTIFYING DATA PACKET TYPES IN A REAL TIME
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Patent #:
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Issue Dt:
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03/02/2004
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Application #:
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09430753
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Filing Dt:
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10/29/1999
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Title:
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APPARATUS AND METHOD FOR IDENTIFYING DATA PACKET TYPES IN REAL TIME ON A NETWORK SWITCH PORT
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09430766
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Filing Dt:
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10/29/1999
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Title:
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SCALED INTERCONNECT ANODIZATION FOR HIGH FREQUENCY APPLICATIONS
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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09431358
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Filing Dt:
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11/01/1999
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Title:
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METHOD AND MECHANISM FOR SPECULATIVELY EXECUTING THREADS OF INSTRUCTIONS
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09431516
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Filing Dt:
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11/01/1999
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Title:
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TIME RAMPED METHOD FOR PLATING OF HIGH ASPECT RATIO SEMICONDUCTOR VIAS AND CHANNELS
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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09431640
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Filing Dt:
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11/01/1999
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Title:
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CROSSTALK CANCELLATION FOR INTEGRATED CIRCUIT PACKAGE CONFIGURATION
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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09433185
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Filing Dt:
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10/25/1999
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Title:
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DETERMINATION OF EXECUTION RESOURCE ALLOCATION BASED ON CONCURRENTLY EXECUTABLE MISALIGNED MEMORY OPERATIONS
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09433611
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Filing Dt:
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11/02/1999
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Title:
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TESTABILITY ARCHITECTURE FOR MODULARIZED INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09434146
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Filing Dt:
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11/04/1999
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Publication #:
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Pub Dt:
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01/17/2002
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Title:
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TA BARRIER SLURRY CONTAINING AN ORGANIC ADDITIVE
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09436906
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Filing Dt:
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11/09/1999
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Title:
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WAY PREDICTION LOGIC FOR CACHE ARRAY
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09437086
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Filing Dt:
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11/09/1999
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Title:
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RESOLVING DEPENDENCIES AMONG CONCURRENTLY DISPATCHED INSTRUCTIONS IN A SUPERSCALAR MICROPROCESSOR
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09441222
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Filing Dt:
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11/15/1999
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Title:
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DEPOSITING A MATERIAL OF CONTROLLED, VARIABLE THICKNESS ACROSS A SURFACE FOR PLANARIZATION OF THAT SURFACE
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09441632
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Filing Dt:
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11/16/1999
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Title:
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INSTRUCTION DECODE UNIT PRODUCING INSTRUCTION OPERAND INFORMATION IN THE ORDER IN WHICH THE OPERANDS ARE IDENTIFIED, AND SYSTEMS INCLUDING SAME
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09442208
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Filing Dt:
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11/16/1999
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Title:
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METHOD AND CIRCUITRY FOR AN UNDISTURBED SCANNABLE STATE ELEMENT
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09442209
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Filing Dt:
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11/16/1999
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Title:
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MERGING NARROW REGISTER FOR RESOLUTION OF DATA DEPENDENCIES WHEN UPDATING A PORTION OF A REGISTER IN A MICROPROCESSOR
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09442771
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Filing Dt:
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11/18/1999
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Title:
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A METHOD OF MAKING A COPPER METALLIZATION WITH IMPROVED ELECTROMIGRATION RESISTANCE
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Patent #:
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Issue Dt:
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10/17/2000
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Application #:
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09458816
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Filing Dt:
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12/10/1999
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Title:
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REORDER BUFFER EMPLOYED IN A MICROPROCESSOR TO STORE INSTRUCTION RESULTS HAVING A PLURALITY OF ENTERIES PREDETERMINED TO CORRESPOND TO A PLURALITY OF FUNCTIONAL UNITS
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09468014
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Filing Dt:
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12/20/1999
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Title:
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INDUCTOR AND TRANSFORMER FORMED WITH MULTI-LAYER COIL TURNS FABRICATED ON AN INTEGRATED CIRCUIT SUBSTRATE
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09468693
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Filing Dt:
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12/21/1999
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Title:
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INSTRUCTION ALIGNMENT UNIT FOR ROUTING VARIABLE BYTE-LENGTH INSTRUCTIONS
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09474790
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Filing Dt:
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12/29/1999
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Title:
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MICROPROCESSOR CONFIGURED TO DETECT UPDATES TO INSTRUCTIONS
OUTSTANDING WITHIN AN INSTRUCTION PROCESSING PIPELINE AND
COMPUTER SYSTEM INCLUDING SAME
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09475572
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Filing Dt:
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01/05/2000
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Title:
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SEMICONDUCTOR DEVICE HAVING A REDUCED SIGNAL PROCESSING TIME AND A METHOD OF FABRICATING THE SAME
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09476041
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Filing Dt:
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12/31/1999
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Title:
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SILICON OXIDE INSULATOR (SOI) SEMICONDUCTOR HAVING SELECTIVELY LINKED BODY
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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09476192
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Filing Dt:
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01/03/2000
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Title:
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STORE TO LOAD FORWARD PREDICTOR TRAINING USING DELTA TAG
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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09476204
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Filing Dt:
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01/03/2000
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Title:
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SCHEDULER WHICH RETRIES LOAD/STORE HIT SITUATIONS
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09476322
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Filing Dt:
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01/03/2000
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Title:
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SCHEDULER WHICH DISCOVERS NON-SPECULATIVE NATURE OF AN INSTRUCTION AFTER ISSUING AND REISSUES THE INSTRUCTION
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Patent #:
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Issue Dt:
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02/03/2004
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Application #:
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09476577
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Filing Dt:
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01/03/2000
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Title:
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CACHE WHICH PROVIDES PARTIAL TAGS FROM NON-PREDICTED WAYS TO DIRECT SEARCH IF WAY PREDICTION MISSES
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09476579
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Filing Dt:
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01/03/2000
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Title:
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STORE LOAD FORWARD PREDICTOR TRAINING
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09476696
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Filing Dt:
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01/03/2000
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Title:
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METHOD AND APPARATUS FOR RUN-TO-RUN CONTROL OF DEPOSITION PROCESS
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09476875
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Filing Dt:
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01/04/2000
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Title:
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FEED-FORWARD CONTROL OF AN ETCH PROCESSING TOOL
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Patent #:
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Issue Dt:
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01/27/2004
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Application #:
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09476892
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Filing Dt:
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01/03/2000
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Title:
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CONTROL MECHANISM FOR MATCHING PROCESS PARAMETERS IN A MULTI-CHAMBER PROCESS TOOL
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09476893
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Filing Dt:
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01/03/2000
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Title:
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METHOD FOR VARYING NITRIDE STRIP MAKEUP PROCESS BASED ON FIELD OXIDE LOSS AND DEFECT COUNT
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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09476895
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Filing Dt:
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01/03/2000
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Title:
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METHOD AND APPARATUS FOR FAULT MODEL ANALYSIS IN MANUFACTURING TOOLS
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09476936
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Filing Dt:
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01/03/2000
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Title:
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PIPELINE ELEMENTS WHICH VERIFY PREDECODE INFORMATION
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09476944
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Filing Dt:
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01/03/2000
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Title:
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METHOD OF IMPROVING VACUUM QUALITY IN SEMICONDUCTOR PROCESSING CHAMBERS
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09476950
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Filing Dt:
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01/03/2000
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Title:
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HIGHER THERMAL CONDUCTIVITY GLASS FOR SOI HEAT REMOVAL
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09476955
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Filing Dt:
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01/03/2000
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Title:
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VARIABLE DESIGN RULE TOOL
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Patent #:
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Issue Dt:
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11/21/2000
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Application #:
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09477050
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Filing Dt:
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01/03/2000
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Title:
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METHOD OF MAKING AN ULTRA THIN SILICON NITRIDE FILM
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Patent #:
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Issue Dt:
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04/13/2004
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Application #:
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09477051
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Filing Dt:
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01/03/2000
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Title:
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METHOD AND APPARATUS FOR BUFFERING DATA SAMPLES IN A SOFTWARE BASED ADSL MODEM
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09477067
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Filing Dt:
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01/03/2000
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Publication #:
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Pub Dt:
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01/24/2002
| | | | |
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Title:
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HEAT REMOVAL BY REMOVAL OF BURIED OXIDE IN ISOLATION AREAS
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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09477124
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Filing Dt:
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01/03/2000
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Title:
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USING A MODEL SPECIFIC REGISTER AS A BASE I/O ADDRESS REGISTER FOR EMBEDDED I/O REGISTERS IN A PROCESSOR
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Patent #:
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Issue Dt:
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05/25/2004
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Application #:
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09477216
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Filing Dt:
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01/04/2000
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Title:
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DISTRIBUTED TRANSLATION LOOK-ASIDE BUFFERS FOR GRAPHICS ADDRESS REMAPPING TABLE
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09477465
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Filing Dt:
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01/04/2000
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Title:
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METHOD AND APPARATUS FOR USING EQUIPMENT STATE DATA FOR RUN-TO-RUN CONTROL OF MANUFACTURING TOOLS
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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09477663
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Filing Dt:
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01/05/2000
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Title:
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PASSING VLAN INFORMATION THROUGH DESCRIPTORS
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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09477723
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Filing Dt:
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01/05/2000
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Title:
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APPARATUS AND METHOD FOR RESETTING A RETRY COUNTER IN A NETWORK SWITCH PORT IN RESPONSE TO EXERTING BACKPRESSURE
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09477741
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Filing Dt:
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01/05/2000
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Title:
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LOCAL INTERCONNECTION ARRANGEMENT WITH REDUCED JUNCTION LEAKAGE AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09477810
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Filing Dt:
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01/05/2000
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Title:
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SELECTIVE ELECTROPLATING WITH DIRECT CONTACT CHEMICAL POLISHING
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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09477821
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Filing Dt:
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01/05/2000
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Title:
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SELECTIVE DEPOSITION PROCESS FOR ALLOYING DAMASCENE-TYPE CU INTERCONNECT LINES
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09477822
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Filing Dt:
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01/05/2000
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Title:
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PROCESS FOR ALLOYING DAMASCENE-TYPE CU INTERCONNECT LINES
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Patent #:
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Issue Dt:
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07/16/2002
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Application #:
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09478054
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Filing Dt:
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01/05/2000
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Title:
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CONDUCTING PATH WITH TWO DIFFERENT END CHARACTERISTIC IMPEDANCES DETERMINED BY DOPING
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09478118
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Filing Dt:
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01/04/2000
|
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Title:
|
CHEMICAL-MECHANICAL POLISHING OF PHOTORESIST LAYER
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|
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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09478139
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Filing Dt:
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01/05/2000
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Publication #:
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Pub Dt:
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12/20/2001
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Title:
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MICROPROCESSOR INCLUDING AN EFFICIENT IMPLEMENTATION OF EXTREME VALUE INSTRUCTIONS
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09478181
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Filing Dt:
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01/05/2000
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Title:
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METHOD OF CONTROLLING FEATURE DIMENSIONS BASED UPON ETCH CHEMISTRY CONCENTRATIONS
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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09478962
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Filing Dt:
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01/07/2000
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Title:
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METHOD FOR ESTABLIHING ULTRA-THIN GATE INSULATOR USING OXIDIZED NITRIDE FILM
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09479180
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Filing Dt:
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01/07/2000
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Title:
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METHOD AND APPARATUS FOR DETERMINING MEASUREMENT FREQUENCY BASED ON HARDWARE AGE AND USAGE
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Patent #:
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Issue Dt:
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07/31/2001
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Application #:
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09479402
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Filing Dt:
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01/06/2000
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Title:
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METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH METAL SILICIDE REGIONS
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09479403
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Filing Dt:
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01/06/2000
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Title:
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WAFER-LESS QUALIFICATION OF A PROCESSING TOOL
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09479492
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Filing Dt:
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01/07/2000
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Title:
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Method For Establishing Shallow Junction In Semiconductor Device To Minimize Junction Capacitance
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Patent #:
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Issue Dt:
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05/22/2001
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Application #:
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09479493
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Filing Dt:
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01/07/2000
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Title:
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METHOD FOR ESTABLISHING COMPONENT ISOLATION REGIONS IN SOI SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09479504
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Filing Dt:
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01/07/2000
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Title:
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Method for establishing shallow junction in semiconductor device to minimize junction capacitance
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09479505
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Filing Dt:
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01/07/2000
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Title:
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METHOD FOR ESTABLISHING ULTRA-THIN GATE INSULATOR HAVING ANNEALED OXIDE AND OXIDIZED NITRIDE
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09479506
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Filing Dt:
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01/07/2000
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Publication #:
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Pub Dt:
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12/06/2001
| | | | |
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Title:
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METHOD FOR ESTABLISHING ULTRA-THIN GATE INSULATOR USING ANNEAL IN AMMONIA
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09479552
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Filing Dt:
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01/07/2000
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Title:
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Fabrication Of A Field Effect Transistor With Minimized Parasitic Miller Capacitance
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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09479852
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Filing Dt:
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01/07/2000
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Title:
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METHOD FOR REQUESTING TRACE DATA REPORTS FROM FDC SEMICONDUCTOR FABRICATION PROCESSES
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09481005
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Filing Dt:
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01/10/2000
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Title:
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INTERRUPT DESCRIPTOR CACHE FOR A MICROPROCESSOR
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09481808
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Filing Dt:
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01/11/2000
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Title:
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Semiconductor Fabrication Employing a Post-Implant Anneal Within a Low Temperature, High Pressure Nitrogen Ambient to Improve Channel and Gate Oxide Reliability
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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09482957
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Filing Dt:
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01/14/2000
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Title:
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ARRANGEMENT DETERMINING POLICIES FOR LAYER 3 FRAME FRAGMENTS IN A NETWORK SWITCH
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Patent #:
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Issue Dt:
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07/29/2003
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Application #:
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09483318
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Filing Dt:
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01/14/2000
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Title:
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COMPUTER SYSTEM INITIALIZATION WITH BOOT PROGRAM STORED IN SEQUENTIAL ACCESS MEMORY, CONTROLLED BY A BOOT LOADER TO CONTROL AND EXECUTE THE BOOT PROGRAM
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Patent #:
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Issue Dt:
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02/26/2002
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Application #:
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09483493
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Filing Dt:
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01/14/2000
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Title:
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Program Counter Update Mechanism
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09483528
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Filing Dt:
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01/14/2000
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Title:
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Selective laser anneal process using highly reflective aluminum mask
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09483678
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Filing Dt:
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01/14/2000
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Title:
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Multiple Active Layer Integrated Circuit And A Method Of Making Such A Circuit
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09484412
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Filing Dt:
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01/18/2000
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Publication #:
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Pub Dt:
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03/07/2002
| | | | |
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Title:
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SELECTIVE DEPOSITION PROCESS FOR PASSIVATING TOP INTERFACE OF DAMASCENE-TYPE CU INTERCONNECT LINES
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09484439
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Filing Dt:
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01/18/2000
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Title:
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Process for Passivating Top Interface of Damascene-Type Cu Interconnect Lines
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Patent #:
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Issue Dt:
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11/13/2001
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Application #:
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09484601
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Filing Dt:
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01/18/2000
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Title:
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Photoresist removal using a polishing tool
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09484602
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Filing Dt:
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01/18/2000
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Title:
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METHOD AND APPARATUS FOR PROGRAMMED LATENCY FOR IMPROVING WAFER TO WAFER UNIFORMITY
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09484603
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Filing Dt:
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01/18/2000
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Publication #:
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Pub Dt:
|
11/22/2001
| | | | |
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Title:
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METHOD OF FORMING SILICON OXYNITRIDE FILMS
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Patent #:
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Issue Dt:
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12/23/2003
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Application #:
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09484604
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Filing Dt:
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01/18/2000
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Title:
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METHOD AND APPARATUS FOR DETERMINING CMP PAD CONDITIONER EFFECTIVENESS
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09484634
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Filing Dt:
|
01/18/2000
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Title:
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Leaky lower interface for reduction of floating body effect in SOI devices
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Patent #:
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Issue Dt:
|
10/16/2001
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Application #:
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09487180
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Filing Dt:
|
01/19/2000
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Title:
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In-situ feedback system for localized CMP thickness control
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09487771
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Filing Dt:
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01/19/2000
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Title:
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Method and Apparatus for Performing Vector and Scalar Multiplication and Calculating Rounded Products
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Patent #:
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Issue Dt:
|
09/25/2001
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Application #:
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09488158
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Filing Dt:
|
01/20/2000
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Title:
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Real time interrupt handling for superscalar processors
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Patent #:
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Issue Dt:
|
09/17/2002
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Application #:
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09488289
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Filing Dt:
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01/20/2000
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Title:
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STACKED INTEGRATED CIRCUIT AND CAPACITOR STRUCTURE CONTAINING VIA STRUCTURES
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Patent #:
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Issue Dt:
|
08/12/2008
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Application #:
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09488351
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Filing Dt:
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01/20/2000
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Title:
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METHOD AND APPARATUS FOR USING LOW POWER TRAINING
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