|
|
|
|
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Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
09863598
|
Filing Dt:
|
05/23/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DETECTING NECKING OVER FIELD/ACTIVE TRANSITIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
09864692
|
Filing Dt:
|
05/24/2001
|
|
Title:
|
METHOD AND APPARATUS FOR USING A DYNAMIC CONTROL MODEL TO COMPENSATE FOR A PROCESS INTERRUPT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09865286
|
Filing Dt:
|
05/25/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DETERMINING PROCESS LAYER CONFORMALITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
09870889
|
Filing Dt:
|
05/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/27/2003
| | | | |
|
Title:
|
EXTERNAL LOCKING MECHANISM FOR PERSONAL COMPUTER MEMORY LOCATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
09870890
|
Filing Dt:
|
05/30/2001
|
|
Title:
|
SECURE BOOTING OF A PERSONAL COMPUTER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
|
Application #:
|
09871015
|
Filing Dt:
|
05/31/2001
|
|
Title:
|
METHOD AND APPARATUS FOR OPTICAL FILM STACK FAULT DETECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
09871084
|
Filing Dt:
|
05/30/2001
|
|
Title:
|
LOCKING MECHANISM OVERRIDE AND DISABLE FOR PERSONAL COMPUTER ROM ACCESS PROTECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
09871191
|
Filing Dt:
|
05/31/2001
|
|
Title:
|
POST-SILICIDATION IMPLANT FOR INTRODUCING RECOMBINATION CENTER IN BODY OF SOI MOSFET
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
09871305
|
Filing Dt:
|
05/31/2001
|
|
Title:
|
METHOD FOR FORMING COPPER INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
09872313
|
Filing Dt:
|
06/01/2001
|
|
Title:
|
CACHE MEMORY AND METHOD OF OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
09872328
|
Filing Dt:
|
06/01/2001
|
|
Title:
|
CONFORMAL ATOMIC LINER LAYER IN AN INTERGRATED CIRCUIT INTERCONNECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09872465
|
Filing Dt:
|
05/31/2001
|
|
Title:
|
MANUFACTURING METHOD FOR SEMICONDUCTOR INTERCONNECT BARRIER OF BORON SILICON NITRIDE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09873667
|
Filing Dt:
|
06/04/2001
|
|
Title:
|
METHOD OF ELECTROCHEMICAL FORMATION OF HIGH TC SUPERCONDUCTING DAMASCENE INTERCONNECT FOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2005
|
Application #:
|
09873674
|
Filing Dt:
|
06/04/2001
|
|
Title:
|
STRADDLED GATE FDSOI DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09874513
|
Filing Dt:
|
06/05/2001
|
|
Title:
|
METHOD OF RE-WORKING COPPER DAMASCENE WAFERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2002
|
Application #:
|
09874558
|
Filing Dt:
|
06/04/2001
|
|
Title:
|
ANNEALING AMBIENT IN INTEGRATED CIRCUIT INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09875457
|
Filing Dt:
|
06/05/2001
|
|
Title:
|
BARRIER-TO-SEED LAYER ALLOYING IN INTEGRATED CIRCUIT INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
09875596
|
Filing Dt:
|
06/06/2001
|
|
Title:
|
SYSTEM FOR AND METHOD OF USING DEVELOPER AS A SOLVENT TO SPREAD PHOTORESIST FASTER AND REDUCE PHOTORESIST CONSUMPTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09877631
|
Filing Dt:
|
06/08/2001
|
|
Title:
|
BONDED SOI FOR FLOATING BODY AND METAL GETTERING CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2002
|
Application #:
|
09877688
|
Filing Dt:
|
06/08/2001
|
|
Title:
|
DIELECTRIC PROTECTED CHEMICAL-MECHANICAL POLISHING IN INTEGRATED CIRCUIT INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
09879338
|
Filing Dt:
|
06/11/2001
|
|
Title:
|
METHOD OF CONTROLLING PHOTOLITHOGRAPHY PROCESSES BASED UPON SCATTEROMETRIC MEASUREMENTS OF PHOTORESIST THICKNESS, AND SYSTEM FOR ACCOMPLISHING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09879376
|
Filing Dt:
|
06/11/2001
|
|
Title:
|
METHOD FOR FORMING OPENINGS FOR CONDUCTIVE INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
09879724
|
Filing Dt:
|
06/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
|
Title:
|
LEAKY, THERMALLY CONDUCTIVE INSULATOR MATERIAL (LTCIM) IN SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
09880219
|
Filing Dt:
|
06/12/2001
|
|
Title:
|
METHOD OF ENHANCED FILL OF VIAS AND TRENCHES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09880513
|
Filing Dt:
|
06/12/2001
|
|
Title:
|
HDP DEPOSITION HILLOCK SUPPRESSION METHOD
IN INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
|
Application #:
|
09880591
|
Filing Dt:
|
06/13/2001
|
|
Title:
|
SYSTEM TO DETERMINE SUITABILITY OF SION ARC SURFACE FOR DUV RESIST PATTERNING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2003
|
Application #:
|
09880990
|
Filing Dt:
|
06/13/2001
|
|
Title:
|
METHOD AND APPARATUS FOR PERFORMING TRENCH DEPTH ANALYSIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09881993
|
Filing Dt:
|
06/15/2001
|
|
Title:
|
CHEMICAL TRIM PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
09884058
|
Filing Dt:
|
06/20/2001
|
|
Title:
|
METHOD OF FORMING LOW RESISTANCE BARRIER ON LOW K INTERCONNECT WITH ELECTROLESSLY PLATED COPPER SEED LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09884059
|
Filing Dt:
|
06/20/2001
|
|
Title:
|
METHOD OF FORMING LOW RESISTANCE BARRIER ON LOW K INTERCONNECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
09884617
|
Filing Dt:
|
06/19/2001
|
|
Title:
|
PERFORMING A TWO-STEP READ ON A MAC REGISTER IN A HOME NETWORK AS AN ATOMIC READ
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09885411
|
Filing Dt:
|
06/19/2001
|
|
Title:
|
METHOD AND APPARATUS FOR CHARACTERIZING AN INTERCONNECT STRUCTURE PROFILE USING SCATTEROMETRY MEASUREMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09885455
|
Filing Dt:
|
06/19/2001
|
|
Title:
|
APPARATUS FOR FILLING TRENCHES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
09886032
|
Filing Dt:
|
06/22/2001
|
|
Title:
|
INTEGRATION OF LOW-K SIOF AS INTER-LAYER DIELECTRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
09886863
|
Filing Dt:
|
06/21/2001
|
|
Title:
|
MONITOR CMP PROCESS USING SCATTEROMETRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09888431
|
Filing Dt:
|
06/26/2001
|
|
Title:
|
USE OF HYDROGEN DOPING FOR PROTECTION OF LOW-K DIELECTRIC LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
09891898
|
Filing Dt:
|
06/26/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DETERMINING OUTPUT CHARACTERISTICS USING TOOL STATE DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
09892328
|
Filing Dt:
|
06/26/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
USING TYPE BITS TO TRACK STORAGE OF ECC AND PREDECODE BITS IN A LEVEL TWO CACHE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09892777
|
Filing Dt:
|
06/28/2001
|
|
Title:
|
EXTRUDED HEAT SPREADER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09892778
|
Filing Dt:
|
06/28/2001
|
|
Title:
|
HEAT SPREADER HAVING HOLES FOR RIVET-LIKE ADHESIVE CONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2003
|
Application #:
|
09892799
|
Filing Dt:
|
06/28/2001
|
|
Title:
|
METHOD OF CHECKING BGA SUBSTRATE DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
09893100
|
Filing Dt:
|
06/26/2001
|
|
Title:
|
COLLISION RECOVERY INTERFACE SUPPORT IN A HOME PHONELINE NETWORKING ALLIANCE MEDIA ACCESS CONTROLLER (HPNA MAC) OPERATING IN ACCORDANCE WITH AT LEAST TWO DIFFERENT DATA RATE STANDARDS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09893186
|
Filing Dt:
|
06/27/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
USING SCATTEROMETRY FOR ETCH END POINTS FOR DUAL DAMASCENE PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
09893188
|
Filing Dt:
|
06/27/2001
|
|
Title:
|
DUAL LAYER PATTERNING SCHEME TO MAKE DUAL DAMASCENE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2005
|
Application #:
|
09893198
|
Filing Dt:
|
06/27/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
GROWING COPPER VIAS OR LINES WITHIN A PATTERNED RESIST USING A COPPER SEED LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
09893272
|
Filing Dt:
|
06/27/2001
|
|
Title:
|
USE OF SCATTEROMETRY TO MEASURE PATTERN ACCURACY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09893807
|
Filing Dt:
|
06/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
CRITICAL DIMENSION MONITORING FROM LATENT IMAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
09893824
|
Filing Dt:
|
06/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR ACTIVE CONTROL OF SPACER DEPOSITION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
|
09893847
|
Filing Dt:
|
06/28/2001
|
|
Title:
|
MINIMIZED CONTAMINATION OF SEMICONDUCTOR WAFERS WITHIN AN IMPLANTATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
09894048
|
Filing Dt:
|
06/28/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DETERMINING FEATURE CHARACTERISTICS USING SCATTEROMETRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09894284
|
Filing Dt:
|
06/27/2001
|
|
Title:
|
IMAGING OF INTEGRATED CIRCUIT INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09894289
|
Filing Dt:
|
06/27/2001
|
|
Title:
|
VIA FORMATION IN INTEGRATED CIRCUIT INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2004
|
Application #:
|
09894434
|
Filing Dt:
|
06/28/2001
|
|
Title:
|
SYSTEM AND METHOD FOR ACTIVE CONTROL OF BPSG DEPOSITION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09894670
|
Filing Dt:
|
06/27/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/03/2002
| | | | |
|
Title:
|
ALGORITHM FOR DETECTING SLOPED CONTACT HOLES USING A CRITICAL-DIMENSION WAVEFORM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2003
|
Application #:
|
09894701
|
Filing Dt:
|
06/28/2001
|
|
Title:
|
USE OF SCATTEROMETRY FOR IN-SITU CONTROL OF GASEOUS PHASE CHEMICAL TRIM PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2002
|
Application #:
|
09895038
|
Filing Dt:
|
06/29/2001
|
|
Title:
|
METHOD OF FORMING CU-CA-O THIN FILMS ON CU SURFACES IN A CHEMICAL SOLUTION AND SEMICONDUCTOR DEVICE THEREBY FORMED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2002
|
Application #:
|
09896490
|
Filing Dt:
|
06/29/2001
|
|
Title:
|
SOURCE/DRAIN FORMATION WITH SUB-AMORPHIZING IMPLANTATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
09897205
|
Filing Dt:
|
07/02/2001
|
|
Title:
|
METHOD OF USING SCATTEROMETRY MEASUREMENTS TO CONTROL PHOTORESIST ETCH PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
09897573
|
Filing Dt:
|
07/02/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DETERMINING GRID DIMENSIONS USING SCATTEROMETRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
09897576
|
Filing Dt:
|
07/02/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DETERMINING CONTACT OPENING DIMENSIONS USING SCATTEROMETRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
09897623
|
Filing Dt:
|
07/02/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DETERMINING COLUMN DIMENSIONS USING SCATTEROMETRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09897624
|
Filing Dt:
|
07/02/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DETERMINING CRITICAL DIMENSION VARIATION IN A LINE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09897626
|
Filing Dt:
|
07/02/2001
|
|
Title:
|
METHOD AND APPARATUS FOR CONTROLLING A PLATING PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09900400
|
Filing Dt:
|
07/05/2001
|
|
Title:
|
SOI MOSFET WITH ASYMMETRICAL SOURCE/BODY AND DRAIN/BODY JUNCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09900628
|
Filing Dt:
|
07/06/2001
|
|
Title:
|
METAL GATE TRIM PROCESS BY USING SELF ASSEMBLED MONOLAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
09900986
|
Filing Dt:
|
07/09/2001
|
|
Title:
|
DAMASCENE PROCESS FOR A T-SHAPED GATE ELECTRODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
09901329
|
Filing Dt:
|
07/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
SOFTWARE MODEM FOR COMMUNICATING DATA USING ENCRYPTED DATA AND UNENCRYPTED CONTROL CODES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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01/10/2006
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Application #:
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09901547
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Filing Dt:
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07/09/2001
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Title:
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SOFTWARE MODEM FOR COMMUNICATING DATA USING SEPARATE CHANNELS FOR DATA AND CONTROL CODES
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Patent #:
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Issue Dt:
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08/26/2003
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Application #:
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09902024
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Filing Dt:
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07/10/2001
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Publication #:
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Pub Dt:
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01/16/2003
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Title:
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LOCALLY INCREASING SIDEWALL DENSITY BY ION IMPLANTATION
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09902351
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Filing Dt:
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07/10/2001
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Title:
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MACHINE READABLE CODE TO TRIGGER DATA COLLECTION
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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09902366
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Filing Dt:
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07/10/2001
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Title:
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SCATTERED SIGNAL COLLECTION USING STROBED TECHNIQUE
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Patent #:
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Issue Dt:
|
08/06/2002
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Application #:
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09902587
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Filing Dt:
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07/12/2001
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Title:
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METHOD OF FORMING NITRIDE CAPPED CU LINES WITH REDUCED ELECTROMIGRATION ALONG THE CU/NITRIDE INTERFACE
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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09903258
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Filing Dt:
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07/11/2001
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Title:
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ACOUSTICALLY ENHANCED DEPOSITION PROCESSES, AND SYSTEMS FOR PERFORMING SAME
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Patent #:
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Issue Dt:
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06/08/2004
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Application #:
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09903267
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Filing Dt:
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07/11/2001
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Title:
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DYNAMIC LOT ALLOCATION BASED UPON WAFER STATE CHARACTERISTICS, AND SYSTEM FOR ACCOMPLISHING SAME
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09903758
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Filing Dt:
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07/13/2001
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Title:
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PRE-TREATMENT OF LOW-K DIELECTRIC FOR PREVENTION OF PHOTORESIST POISONING
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09904367
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Filing Dt:
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07/12/2001
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Title:
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PROCESS INTEGRATION OF ELECTRICAL THICKNESS MEASUREMENT OF GATE OXIDE AND TUNNEL OXIDES BY CORONA DISCHARGE TECHNIQUE
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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09904374
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Filing Dt:
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07/11/2001
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Title:
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METHOD AND APPARATUS FOR PASSING DEVICE CONFIGURATION INFORMATION TO A SHARED CONTROLLER
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09904943
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Filing Dt:
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07/13/2001
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Title:
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GRADED OXIDE CAPS ON LOW DIELECTRIC CONSTANT (LOW K) CHEMICAL VAPOR DEPOSTION (CVD) FILMS
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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09905002
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Filing Dt:
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07/12/2001
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Title:
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PARTIAL DIRECTORY CACHE FOR REDUCING PROBE TRAFFIC IN MULTIPROCESSOR SYSTEMS
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Patent #:
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Issue Dt:
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01/16/2007
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Application #:
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09905132
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Filing Dt:
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07/13/2001
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Publication #:
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Pub Dt:
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01/16/2003
| | | | |
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Title:
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MECHANISM TO STRIP LARQ HEADER AND PRESERVE LARQ HEADER IN STATUS FRAME
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09905220
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Filing Dt:
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07/12/2001
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Title:
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SYSTEM AND SOFTWARE FOR DATA COLLECTION AND PROCESS CONTROL IN SEMICONDUCTOR MANUFACTURING AND METHOD THEREOF
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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09905226
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Filing Dt:
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07/12/2001
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Title:
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SYSTEM AND SOFTWARE FOR DATA DISTRIBUTION IN SEMICONDUCTOR MANUFACTURING AND METHOD THEREOF
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09905435
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Filing Dt:
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07/13/2001
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Title:
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ELIMINATION OF FLUX DIVERGENCE IN INTEGRATED CIRCUIT INTERCONNECTS
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09907083
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Filing Dt:
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07/17/2001
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Title:
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POWER STATE RESYNCHRONIZATION
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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09907311
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Filing Dt:
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07/17/2001
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Title:
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PHOTO ASSISTED ELECTRICAL LINEWIDTH MEASUREMENT METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09909074
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Filing Dt:
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07/19/2001
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Title:
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METHOD AND APPARATUS FOR CONTROLLING A THICKNESS OF A CONDUCTIVE LAYER IN A SEMICONDUCTOR MANUFACTURING OPERATION
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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09909112
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Filing Dt:
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07/19/2001
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Title:
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USE OF SLURRY WASTE COMPOSITION TO DETERMINE THE AMOUNT OF METAL REMOVED DURING CHEMICAL MECHANICAL POLISHING, AND SYSTEM FOR ACCOMPLISHING SAME
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09911236
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Filing Dt:
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07/23/2001
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Title:
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MEASURE FLUORESCENCE FROM CHEMICAL RELEASED DURING TRIM ETCH
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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09911238
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Filing Dt:
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07/23/2001
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Title:
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SYSTEM AND METHOD TO MEASURE CLOSED AREA DEFECTS
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Patent #:
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Issue Dt:
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07/13/2004
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Application #:
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09911241
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Filing Dt:
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07/23/2001
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Title:
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SYSTEM AND METHOD FOR CONTROL OF HARDMASK ETCH TO PREVENT PATTERN COLLAPSE OF ULTRA-THIN RESISTS
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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09911264
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Filing Dt:
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07/23/2001
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Title:
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PROCESS CONTROL BASED UPON WEIGHT OR MASS MEASUREMENTS, AND SYSTEMS FOR ACCOMPLISHING SAME
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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09911907
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Filing Dt:
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07/23/2001
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Publication #:
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Pub Dt:
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01/23/2003
| | | | |
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Title:
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METHOD TO COMMUNICATE PHY MEAN SQUARE ERROR TO UPPER LAYER DEVICE DRIVER FOR RATE NEGOTIATION
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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09912011
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Filing Dt:
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07/24/2001
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Title:
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HYBRID BRANCH PREDICTION DEVICE WITH TWO LEVELS OF BRANCH PREDICTION CACHE
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09912186
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Filing Dt:
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07/24/2001
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Title:
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TEST STRUCTURES FOR ELECTRICAL LINEWIDTH MEASUREMENT AND PROCESSES FOR THEIR FORMATION
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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09915883
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Filing Dt:
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07/26/2001
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Title:
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INTEGRATED CIRCUIT DEFECT ANALYSIS USING LIQUID CRYSTAL
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Patent #:
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Issue Dt:
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08/12/2003
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Application #:
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09917327
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Filing Dt:
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07/27/2001
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Title:
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METHOD OF USING DAMAGED AREAS OF A WAFER FOR PROCESS QUALIFICATIONS AND EXPERIMENTS, AND SYSTEM FOR ACCOMPLISHING SAME
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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09919293
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Filing Dt:
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07/31/2001
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Title:
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METHOD AND APPARATUS FOR PERIODIC CORRECTION OF METROLOGY DATA
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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09920459
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Filing Dt:
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08/01/2001
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Publication #:
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Pub Dt:
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02/14/2002
| | | | |
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Title:
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STACK SWITCHING MECHANISM IN A COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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09922536
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Filing Dt:
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08/03/2001
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Title:
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SELF-ALIGNED GATE FORMATION USING POLYSILICON POLISH WITH PERIPHERAL PROTECTIVE LAYER
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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09922936
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Filing Dt:
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08/07/2001
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Publication #:
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Pub Dt:
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03/14/2002
| | | | |
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Title:
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CONTROLLED AND PROGRAMMED DEPOSITION OF FLUX ON A FLIP-CHIP DIE BY SPRAYING
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