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Patent #:
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Issue Dt:
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03/23/1999
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08592828
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Filing Dt:
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01/26/1996
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Title:
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METHOD FOR ANALYZING THE PERFORMANCE OF A MICROPROCESSOR
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Patent #:
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Issue Dt:
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05/16/2000
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08594209
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Filing Dt:
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01/31/1996
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Title:
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TRENCH ISOLATION STRUCTURES WITH OXIDIZED SILICON REGIONS AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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12/09/1997
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Application #:
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08597369
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Filing Dt:
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02/09/1996
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Title:
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CAM ACCELERATED BUFFER MANAGEMENT
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Patent #:
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Issue Dt:
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08/25/1998
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Application #:
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08599187
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Filing Dt:
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02/09/1996
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Title:
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METHOD FOR CONTINUOUS WAVEFORM SYNTHESIS
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Patent #:
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Issue Dt:
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03/03/1998
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Application #:
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08599188
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Filing Dt:
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02/09/1996
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Title:
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SYSTEM AND METHOD FOR WAVEFORM SYNTHESIS
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08599696
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Filing Dt:
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02/09/1996
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Title:
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HIGH PERFORMANCE SUPERSCALAR MICROPROCESSOR INCLUDING A CIRCUIT FOR CONVERTING CISC INSTRUCTIONS TO RISC OPERATIONS
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08599697
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Filing Dt:
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02/09/1996
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Title:
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HIGH PERFORMANCE SUPERSCALAR MICROPROCESSOR INCLUDING A CIRCUIT FOR BYTE-ALIGNING CISC INSTRUCTIONS STORED IN A VARIABLE BYTE-LENGTH FORMAT
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08599698
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Filing Dt:
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02/09/1996
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Title:
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HIGH PERFORMANCE SUPERSCALAR MICROPROCESSOR INCLUDING AN INSTRUCTION CACHE CIRCUIT FOR BYTE-ALIGNING CISC INSTRUCTIONS STORED IN A VARIABLE BYTE-LENGTH FORMAT
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Patent #:
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Issue Dt:
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05/12/1998
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Application #:
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08599699
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Filing Dt:
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02/09/1996
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Title:
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HIGH PERFORMANCE SUPERSCALAR MICROPROCESSOR INCLUDING A SPECULATIVE INSTRUCTION QUEUE FOR BYTE-ALIGNING CISC INSTRUCTIONS STORED IN A VARIABLE BYTE-LENGTH FORMAT
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08599700
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Filing Dt:
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02/09/1996
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Title:
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HIGH PERFORMANCE SUPERSCALAR MICROPROCESSOR INCLUDING A DUAL-PATHWAY CIRCUIT FOR CONVERTING CISC INSTRUCTIONS TO RISC OPERATIONS
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Patent #:
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Issue Dt:
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04/08/1997
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Application #:
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08601541
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Filing Dt:
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02/14/1996
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Title:
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HIGH DENSITY MULTI-LEVEL METALLIZATION AND INTERCONNECTION STRUCTURE
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Patent #:
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Issue Dt:
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04/21/1998
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Application #:
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08601618
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Filing Dt:
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02/14/1996
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Title:
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APPARATUS FOR DETECTING UPDATES TO INSTRUCTIONS WHICH ARE WITHIN AN INSTRUCTION PROCESSING PIPELINE OF A MICROPROCESSOR
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08602640
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Filing Dt:
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02/16/1996
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Title:
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METHOD AND SYSTEM FOR ENABLING AND DISABLING FUNCTIONS IN A PERIPHERAL DEVICE FOR A PROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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07/28/1998
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Application #:
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08603805
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Filing Dt:
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02/20/1996
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Title:
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APPARATUS AND METHOD FOR ACCESSING SPECIAL REGISTERS WITHOUT SERIALIZATION
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Patent #:
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Issue Dt:
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08/18/1998
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Application #:
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08605741
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Filing Dt:
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02/22/1996
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Title:
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REDUCING CACHE SNOOPING OVERHEAD IN A MULTILEVEL CACHE SYSTEM WITH INCLUSION FIELD IN SHARED CACHE INDICATING STATE OF DATA IN LOWER LEVEL CACHES
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Patent #:
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Issue Dt:
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10/07/1997
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Application #:
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08608377
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Filing Dt:
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02/28/1996
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Title:
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NOVEL LANDING PAD TECHNOLOGY DOUBLED UP AS LOCAL INTERCONNECT AND BORDERLESS CONTACT FOR DEEP SUB-HALF MICROMETER IC APPLICATION
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Patent #:
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Issue Dt:
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11/11/1997
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Application #:
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08608913
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Filing Dt:
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02/29/1996
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Title:
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A PRODUCTION WORTHY INTERCONNECT FOR DEEP SUB-HALF MICROMETER BACK-END -OF-LINE TECNOLOGY
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08617413
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Filing Dt:
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03/18/1996
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Title:
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BUS ARBITER METHOD AND SYSTEM
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08621397
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Filing Dt:
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03/25/1996
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Title:
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COMPUTER SYSTEM AND METHOD FOR PERFORMING WAVETABLE MUSIC SYNTHESIS WHICH STORES WAVETABLE DATA IN SYSTEM MEMORY
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Patent #:
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Issue Dt:
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07/08/1997
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Application #:
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08621714
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Filing Dt:
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03/28/1996
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Title:
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HYBRID OF LOCAL OXIDATION OF SILICON ISOLATION AND TRENCH ISOLATION FOR A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/11/1997
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Application #:
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08622696
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Filing Dt:
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03/26/1996
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Title:
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METHOD FOR ENHANCING FIELD OXIDE THICKNESS AT FIELD OXIDE PERIMETERS
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08623021
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Filing Dt:
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03/28/1996
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Title:
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METHOD AND APPARATUS FOR SOFTWARE ACCESS TO A MICROPROCESSOR SERIAL NUMBER
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Patent #:
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Issue Dt:
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08/03/1999
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Application #:
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08623022
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Filing Dt:
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03/28/1996
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Title:
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METHOD AND APPARATUS FOR SERIALIZING MICROPROCESSOR IDENTIFICATION NUMBERS
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08623024
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Filing Dt:
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03/28/1996
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Title:
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METHOD AND APPARATUS FOR ENCRYPTING AND DECRYPTING MICROPROCESSOR SERIAL NUMBERS
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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08623802
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Filing Dt:
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03/29/1996
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Title:
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METHOD OF PROCESSING A SEMICONDUCTOR WAFER FOR CONTROLLING DRIVE CURRENT
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08625056
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Filing Dt:
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03/29/1996
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Title:
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METHOD AND APPARATUS FOR ADDING A RANDOMIZED PROPAGATION DELAY INTERVAL TO AN INTERFRAME SPACING IN A STATION ACCESSING AN ETHERNET NETWORK
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Patent #:
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Issue Dt:
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02/09/1999
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Application #:
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08626683
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Filing Dt:
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04/01/1996
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Title:
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A SERVER SELECTION METHOD WHERE A CLIENT SELECTS A SERVER ACCORDING TO ADDRESS, OPERATING SYSTEM AND FOUND FRAME FOR REMOTE BOOTING
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08627878
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Filing Dt:
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04/03/1996
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Title:
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METHOD AND APPARATUS FOR DYNAMICALLY DISPLAYING AND CAUSING THE EXECUTION OF SOFTWARE DIAGNOSTIC/TEST PROGRAMS FOR THE SILICON VALIDATION OF MICROPROCESSORS
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Patent #:
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Issue Dt:
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01/27/1998
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Application #:
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08635843
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Filing Dt:
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04/22/1996
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Title:
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METHOD AND SYSTEM FOR GRACEFUL RECOVERY FROM A FAULT IN PERIPHERAL DEVICES USING A VARIETY OF BUS STRUCTURES
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08635845
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Filing Dt:
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04/22/1996
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Title:
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METHOD AND SYSTEM FOR DETECTION OF AND GRACEFUL RECOVERY FROM A PERIPHERAL DEVICE FAULT
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Patent #:
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Issue Dt:
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02/09/1999
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Application #:
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08637980
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Filing Dt:
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04/26/1996
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Title:
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METHOD OF REDUCING OVERLAP BETWEEN GATE ELECTRODE AND LDD REGION
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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08639758
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Filing Dt:
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04/29/1996
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Title:
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REDUCED BIRD'S BEAK FIELD OXIDATION PROCESS USING NITROGEN IMPLANTED INTO ACTIVE REGION
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Patent #:
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Issue Dt:
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09/22/1998
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Application #:
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08641028
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Filing Dt:
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04/29/1996
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Title:
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NITROGENATED TRENCH LINER FOR IMPROVED SHALLOW TRENCH ISOLATION
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08647510
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Filing Dt:
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05/14/1996
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Title:
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METHOD OF PATTERNING A METHOD SUBSTRATE SPIN-ON GLASS AS A HARD MASK
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Patent #:
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Issue Dt:
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04/20/1999
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Application #:
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08647637
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Filing Dt:
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05/15/1996
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Title:
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POLYSILICON DIFFUSION DOPING METHOD EMPLOYING A DEPOSITED DOPED OXIDE LAYER WITH A HIGHLY UNIFORM THICKNESS
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Patent #:
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Issue Dt:
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03/16/1999
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Application #:
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08649243
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Filing Dt:
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05/16/1996
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Title:
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UNIFIED MULTI-FUNCTION OPERATION SCHEDULER FOR OUT-OF-ORDER EXECUTION IN A SUPERSCALAR PROCESSOR
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08649245
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Filing Dt:
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05/17/1996
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Title:
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SYSTEM AND METHOD FOR PERFORMING DATA TRANSFERS DURING PCI IDLE CLOCK CYCLES
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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08649247
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Filing Dt:
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05/17/1996
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Title:
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DEPENDENCY TABLE FOR REDUCING DEPENDENCY CHECKING HARDWARE
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Patent #:
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Issue Dt:
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08/31/1999
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Application #:
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08649809
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Filing Dt:
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05/17/1996
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Title:
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A MICROPROCESSOR CONFIGURED TO EXECUTE MULTIPLE THREADS INCLUDING INTERRUPT SERVICE ROUTINES
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Patent #:
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Issue Dt:
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09/28/1999
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Application #:
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08649847
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Filing Dt:
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05/16/1996
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Title:
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CACHE CONTROLLER WITH TABLE WALK LOGIC TIGHTLY COUPLED TO SECOND LEVEL ACCESS LOGIC
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08649980
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Filing Dt:
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05/16/1996
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Title:
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INSTRUCTION DECODER INCLUDING EMULATION USING INDIRECT SPECIFIERS
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Patent #:
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Issue Dt:
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09/15/1998
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Application #:
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08649981
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Filing Dt:
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05/16/1996
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Title:
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INSTRUCTION PREDECODE AND MULTIPLE INSTRUCTION DECODE
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Patent #:
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Issue Dt:
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07/25/2000
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Application #:
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08649982
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Filing Dt:
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05/16/1996
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Title:
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FLEXIBLE IMPLEMENTATION OF A SYSTEM MANAGEMENT MODE (SMM) IN A PROCESSOR
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Patent #:
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Issue Dt:
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07/20/1999
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Application #:
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08649983
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Filing Dt:
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05/16/1996
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Title:
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RISC86 INSTRUCTION SET
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Patent #:
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Issue Dt:
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07/06/1999
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Application #:
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08649984
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Filing Dt:
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05/16/1996
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Title:
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INSTRUCTION DECODER INCLUDING TWO-WAY EMULATION CODE BRANCHING
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08650055
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Filing Dt:
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05/16/1996
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Title:
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PROCESSING SYSTEM THAT RAPIDLY IDENTFIES FIRST OR SECOND OPERATIONS OF SELECTED TYPES FOR EXECUTION
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Patent #:
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Issue Dt:
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05/19/1998
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Application #:
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08650938
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Filing Dt:
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05/17/1996
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Title:
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COMPUTER SYSTEM HAVING A MULTIMEDIA BUS AND COMPRISING A CENTRALIZED I/O PROCESSOR WHICH PERFORMS INTELLIGENT DATA TRANSFERS
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08650939
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Filing Dt:
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05/17/1996
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Title:
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COMPUTER SYSTEM HAVING A MULTIMEDIA BUS AND COMPRISING A CENTRALIZED I/O PROCESSOR WHICH PERFORMS INTELLIGENT BYTE SLICING
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08650940
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Filing Dt:
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05/17/1996
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Title:
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BYTE QUEUE DIVIDED INTO MULTIPLE SUBQUEUES FOR OPTIMIZING INSTRUCTION SELECTION LOGIC
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Patent #:
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Issue Dt:
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02/23/1999
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Application #:
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08652363
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Filing Dt:
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05/23/1996
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Title:
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SUBTRENCH CONDUCTOR FORUATION WITH LARGE TILT ANGLE IMPLANT
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Patent #:
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Issue Dt:
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10/13/1998
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Application #:
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08652785
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Filing Dt:
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05/23/1996
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Title:
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APPARATUS FOR EFFICIENT INSTRUCTION EXECUTION VIA VARIABLE ISSUE AND VARIABLE CONTROL VECTORS PER ISSUE
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08653147
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Filing Dt:
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05/24/1996
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Title:
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TRANSISTOR DEVICE WITH REDUCED HOT CARRIER INJECTION EFFECTS
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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08655242
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Filing Dt:
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06/05/1996
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Title:
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DIELECTRIC HAVING AN AIR GAP FORMED BETWEEN CLOSELY SPACED INTERCONNECT LINES
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08655246
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Filing Dt:
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06/05/1996
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Title:
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METHOD FOR FORMING A MULTILEVEL INTERCONNECT STRUCTURE OF AN INTEGRATED CIRCUIT BY A SINGLE VIA ETCH AND SINGLE FILL PROCESS
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Patent #:
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Issue Dt:
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03/31/1998
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Application #:
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08655247
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Filing Dt:
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06/05/1996
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Title:
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MASK GENERATION TECHNIQUE FOR PRODUCING AN INTEGRATED CIRCUIT WITH OPTIMAL POLYSILICON INTERCONNECT LAYOUT FOR ACHIEVING GLOBAL PLANARIZATION
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08655248
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Filing Dt:
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06/05/1996
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Title:
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MULTILEVEL INTERCONNECT STRUCTURE OF AN INTERGRATED CIRCUIT HAVING AIR GAPS AND PILLARS SEPARATING LEVELS OF INTERCONNECT
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Patent #:
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Issue Dt:
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09/29/1998
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Application #:
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08658456
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Filing Dt:
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06/05/1996
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Title:
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INTERLEVEL DIELECTRIC WITH AIR GAPS TO LESSEN CAPACITIVE COUPLING
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08658457
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Filing Dt:
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06/05/1996
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Title:
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INTERLEVEL DIELECTRIC WITH AIR GAPS TO REDUCE PERMITIVITY
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08658458
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Filing Dt:
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06/05/1996
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Title:
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A MULTILEVEL INTERCONNECT STRUCTURE OF AN INTEGRATED CIRCUIT FORMED BY A SINGLE VIA ETCH AND DUAL FILL PROCESS
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08658547
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Filing Dt:
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06/05/1996
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Title:
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METHOD OF FORMATION OF AN AIR GAP WITHIN A SEMICONDUCTOR DIELECTRIC BY SOLVENT DESORPTION
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Patent #:
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Issue Dt:
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09/14/1999
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Application #:
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08659166
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Filing Dt:
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06/05/1996
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Title:
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DISSOLVABLE DIELECTRIC METHOD
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08659167
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Filing Dt:
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06/05/1996
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Title:
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SEMICONDUCTOR INTERLEVEL DIELECTRIC HAVING A POLYMIDE FOR PRODUCING AIR GAPS
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08659728
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Filing Dt:
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06/06/1996
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Title:
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ADDRESS GENERATION AND DATA PATH ARBITRATION TO AND FROM SRAM TO ACCOMMODATE MULTIPLE TRANSMITTED PACKETS
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08659795
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Filing Dt:
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06/06/1996
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Title:
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METHOD OF IDENTIFYING END OF PACKET BY WRITING THE ADDRESS OF LAST DATA INTO THE FIRST LOCATION OF THE MEMORY
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08660674
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Filing Dt:
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06/05/1996
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Title:
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METHOD OF FORMING A RECESSED INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08662217
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Filing Dt:
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06/12/1996
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Title:
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TRENCH ISOLATION OF FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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02/16/1999
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Application #:
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08666017
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Filing Dt:
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06/19/1996
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Title:
|
NITROGENATED GATE STRUCTURE FOR IMPROVED TRANSISTOR PERFORMANCE AND METHOD FOR MAKING SAME
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Patent #:
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Issue Dt:
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04/07/1998
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Application #:
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08671439
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Filing Dt:
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06/27/1996
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Title:
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DEPENDENCY CHECKING AND FORWARDING OF VARIABLE WIDTH OPERANDS
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08671831
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Filing Dt:
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10/09/1996
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Title:
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INTERRUPT CONTROLLER OPTIMIZED FOR POWER MANAGEMENT IN A COMPUTER SYSTEM OR SUBSYSTEM
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Patent #:
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Issue Dt:
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01/27/1998
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Application #:
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08674081
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Filing Dt:
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07/01/1996
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Title:
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METHOD FOR PRODUCING A LOW RESISTIVITY POLYCIDE
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Patent #:
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Issue Dt:
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01/12/1999
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Application #:
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08677406
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Filing Dt:
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07/09/1996
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Title:
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PRECHARGING AN OUTPUT PERIPHERAL FOR A DIRECT MEMORY ACCESS OPERATION
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Patent #:
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Issue Dt:
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06/17/1997
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Application #:
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08679650
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Filing Dt:
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07/12/1996
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Title:
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METHOD AND SYSTEM FOR ASSIGNING PERIPHERAL DEVICE ADDRESSES
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Patent #:
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Issue Dt:
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06/22/1999
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Application #:
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08681105
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Filing Dt:
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07/22/1996
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Title:
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CACHE SYSTEM AND METHOD USING TAGGED CACHE LINES FOR MATCHING CACHE STRATEGY TO I/O APPLICATION
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Patent #:
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Issue Dt:
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09/30/1997
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Application #:
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08682493
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Filing Dt:
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07/17/1996
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Title:
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METHOD FOR FABRICATION OF A NON-SYMMETRICAL TRANSISTOR
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Patent #:
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Issue Dt:
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10/26/1999
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Application #:
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08684701
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Filing Dt:
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07/19/1996
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Title:
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COMPUTER SYSTEM HAVING DISTRIBUTED COMPRESSION AND DECOMPRESSION LOGIC FOR COMPRESSED DATA MOVEMENT
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08685655
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Filing Dt:
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07/24/1996
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Title:
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MICROPROCESSOR CONFIGURED TO SIMULTANEOUSLY DISPATCH MICROCODE AND DIRECTLY-DECODED INSTRUCTIONS
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Patent #:
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Issue Dt:
|
02/03/1998
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Application #:
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08687857
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Filing Dt:
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07/26/1996
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Title:
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RAPID THERMAL ANNEAL SYSTEM AND METHOD INCLUDING IMPROVED TEMPERATURE SENSING AND MONITORING
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Patent #:
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Issue Dt:
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02/16/1999
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Application #:
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08690382
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Filing Dt:
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07/26/1996
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Title:
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APPARATUS FOR ALIGNING INSTRUCTIONS USING PREDECODED SHIFT AMOUNTS EACH SHIFT AMOUNT IDENTIFYING A PATTICULAR INSTRUCTION
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|
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Patent #:
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Issue Dt:
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05/04/1999
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Application #:
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08690384
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Filing Dt:
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07/26/1996
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Title:
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A SUPERSCALAR MICPROCESSOR HAVING SYMMETRICAL FIXED ISSUE POSITIONS EACH CONFIGURED TO EXECUTE A PARTICULAR SUBSET OF INSTRUCTIONS
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Patent #:
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Issue Dt:
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03/02/1999
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Application #:
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08690385
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Filing Dt:
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07/26/1996
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Title:
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REORDER BUFFER CONFIGURED TO ALLOCATE STORGE CAPABLE OF STORING RESULTS CORRESPONDING TO A MAXIMUM NUMBER OF CONCURRENTLY RECEIVABLE INSTRUCTIONS REGARDLESS OF A NUMBER OF INSTRUCTIONS RECEIVED
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Patent #:
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Issue Dt:
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03/02/1999
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Application #:
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08691053
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Filing Dt:
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08/01/1996
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Title:
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ON-CHIP TRANSFORMERS
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|
|
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Patent #:
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Issue Dt:
|
05/11/1999
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Application #:
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08696733
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Filing Dt:
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08/14/1996
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Title:
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MICROCONTROLLER CONFIGURED TO CONVEY DATA CORRESPONDING TO INTERNAL MEMORY ACCESSES EXTERNALLY
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|
|
|
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Patent #:
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Issue Dt:
|
09/16/1997
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Application #:
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08696734
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Filing Dt:
|
08/14/1996
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|
Title:
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METHOD FOR TESTING INTEGRATED MEMORY USING AN INTEGRATED DMA CONTROLLER
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|
|
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Patent #:
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Issue Dt:
|
01/18/2000
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Application #:
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08698185
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Filing Dt:
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08/15/1996
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Title:
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METHOD AND SYSTEM FOR INCREASING NETWORK INFORMATION CARRIED IN A DATA PACKET VIA PACKET TAGGING
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|
|
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08698828
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Filing Dt:
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08/16/1996
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Title:
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ADVANCED ISOLATION SCHEME FOR DEEP SUBMICRON TECHNOLOGY
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|
|
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Patent #:
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Issue Dt:
|
09/02/1997
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Application #:
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08700129
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Filing Dt:
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08/20/1996
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Title:
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POWER MANAGEMENT CONTROL TECHNIQUE FOR TIMER TICK ACTIVITY WITHIN AN INTERRUPT DRIVEN COMPUTER SYSTEM
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|
|
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Patent #:
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Issue Dt:
|
01/20/1998
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Application #:
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08703273
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Filing Dt:
|
08/26/1996
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Title:
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METHOD OF FORMING A SHALLOW JUNCTION BY DIFFUSION FROM A SILICON-BASED SPACER
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|
|
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Patent #:
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|
Issue Dt:
|
02/10/1998
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Application #:
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08705033
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Filing Dt:
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08/29/1996
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|
Title:
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INTERRUPT HANDLING THAT DISABLES INTERRUPTS SAVING THE REGISTERS
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|
|
|
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Patent #:
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|
Issue Dt:
|
08/05/1997
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Application #:
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08705884
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Filing Dt:
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08/28/1996
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Title:
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HIGH PERFORMANCE DERIVED LOCAL BUS AND COMPUTER SYSTEM EMPLOYING THE SAME
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|
|
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Patent #:
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|
Issue Dt:
|
11/09/1999
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Application #:
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08706317
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Filing Dt:
|
08/30/1996
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|
Title:
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ARRANGEMENT FOR REGULATING PACKET FLOW RATE IN SHARED-MEDIUM, POINT-TO-POINT, AND SWITCHED NETWORKS
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|
|
|
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Patent #:
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Issue Dt:
|
05/18/1999
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Application #:
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08709889
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Filing Dt:
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09/11/1996
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Title:
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ARRANGEMENT FOR INITIATING AND MAINTAINING FLOW CONTROL IN SHARED-MEDIUM, FULL-DUPLEX, AND SWITCHED NETWORKS
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|
|
|
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Patent #:
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|
Issue Dt:
|
09/01/1998
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Application #:
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08710071
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Filing Dt:
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09/10/1996
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|
Title:
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PRODUCTION WORTHY INTERCONNECT PROCESS FOR DEEP SUB-HALF MICROMETER BACK-END-OF-LINE TECHNOLOGY
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|
|
|
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Patent #:
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Issue Dt:
|
03/13/2001
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Application #:
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08710336
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Filing Dt:
|
09/16/1996
|
|
Title:
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METHOD FOR IDENTIFYING AND CORRECTING ERRORS IN A CENTRAL PROCESSING UNIT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/30/1998
|
Application #:
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08710560
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Filing Dt:
|
09/19/1996
|
|
Title:
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CACHE LINE BRANCH PREDICTION SCHEME THAT SHARES AMONG SETS OF A SET ASSOCIATIVE CACHE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
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Application #:
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08711382
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Filing Dt:
|
09/03/1996
|
|
Title:
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METHOD OF MAKING AN ASYMMETRICAL TRANSISTOR WITH LIGHTLY AND HEAVILY DOPED DRAIN REGIONS AND ULTRA-HEAVILY DOPED DRAIN REGIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
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Application #:
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08711880
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Filing Dt:
|
09/12/1996
|
|
Title:
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SUPERSCALAR MICROPROCESSOR EMPLOYING A FUTURE FILE FOR STORING RESULTS INTO MULTIPORTION REGISTERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
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Application #:
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08712867
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Filing Dt:
|
09/12/1996
|
|
Title:
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SYSTEM AND METHOD FOR SIMULATING A MULTIPROCESSOR ENVIRONMENT FOR TESTING A MULTIPROCESSING INTERRUPT CONTROLLER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
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Application #:
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08713063
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Filing Dt:
|
09/12/1996
|
|
Title:
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METHOD AND SYSTEM FOR IDENTIFYING AN ERROR CONDITION DUE TO A FAULTY CABLE CONNECTION IN AN ETHERNET NETWORK
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
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Application #:
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08713281
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Filing Dt:
|
09/12/1996
|
|
Title:
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ULTRA SHORT TRENCH TRANSISTORS AND PROCESS FOR MAKING SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/1997
|
Application #:
|
08713386
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Filing Dt:
|
09/13/1996
|
|
Title:
|
METHOD FOR FABRICATION OF A NON-SYMMETRICAL TRANSISTOR
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|
