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Patent #:
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|
Issue Dt:
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08/05/1997
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Application #:
|
08713388
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Filing Dt:
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09/13/1996
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Title:
|
METHOD FOR FABRICATION OF A NON-SYMMETRICAL TRANSISTOR
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Patent #:
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|
Issue Dt:
|
08/22/2000
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Application #:
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08713489
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Filing Dt:
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09/13/1996
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Title:
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REDUCING THE PIN COURT WITHIN A SWITCHING ELEMENT THROUGH THE USE OF A MULTIPLEXER
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Patent #:
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Issue Dt:
|
09/15/1998
|
Application #:
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08714317
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Filing Dt:
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09/18/1996
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Title:
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SHORT CHANNEL SELF ALIGNED VMOS FIELD EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
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11/02/1999
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Application #:
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08714558
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Filing Dt:
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09/16/1996
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Title:
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ADDRESS ADMINISTRATION FOR 100BASE-T PHY DEVICES
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Patent #:
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Issue Dt:
|
08/25/1998
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Application #:
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08716764
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Filing Dt:
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09/23/1996
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Title:
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PROGRAM COUNTER UPDATE MECHANISM
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Patent #:
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Issue Dt:
|
03/02/1999
|
Application #:
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08717981
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Filing Dt:
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09/23/1996
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Title:
|
METHOD FOR FORMING ADVANCED TRANSISTORS STRUCTURES WITH OPTIMUM SHORT CHANNEL CONTROLS FOR HIGH DENSITY/HIGH PERFORMANCE INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
08/25/1998
|
Application #:
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08718710
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Filing Dt:
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09/24/1996
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Title:
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APPARATUS AND METHOD FOR DETERMINING A NUMBER OF DIGITS LEADING A PARTICULAR DIGIT
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Patent #:
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Issue Dt:
|
07/15/1997
|
Application #:
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08721211
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Filing Dt:
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09/26/1996
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Title:
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PREPAGING DURING PCI MASTER INITIATED WAIT CYCLES
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Patent #:
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Issue Dt:
|
12/28/1999
|
Application #:
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08726113
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Filing Dt:
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10/04/1996
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Title:
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ULTRA SHALLOW JUNCTION FORMATION USING AMORPHOUS SILICON LAYER
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Patent #:
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Issue Dt:
|
01/26/1999
|
Application #:
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08727050
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Filing Dt:
|
10/08/1996
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Title:
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MULTILEVEL TRANSISTOR FABRICATION METHOD HAVING AN INVERTED, UPPER LEVEL TRANSISTOR
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Patent #:
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Issue Dt:
|
06/09/1998
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Application #:
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08727358
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Filing Dt:
|
10/08/1996
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Title:
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INTEGRATED CIRCUIT EMPLOYING SIMULTANEOUSLY FORMED ISOLATION AND TRANSISTOR TRENCHES
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Patent #:
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Issue Dt:
|
06/23/1998
|
Application #:
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08728225
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Filing Dt:
|
10/10/1996
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING WITHOUT UNDERCUTTING CONDUCTIVE LINES
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Patent #:
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Issue Dt:
|
06/30/1998
|
Application #:
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08729638
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Filing Dt:
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10/21/1996
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Title:
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INTERCONNECT BUS CONFIGURED TO IMPLEMENT MULTIPLE TRANSFER PROTOCOLS
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Patent #:
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Issue Dt:
|
03/16/1999
|
Application #:
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08729810
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Filing Dt:
|
10/08/1996
|
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Title:
|
MULTI-LEVEL TRANSISTOR FABRICATION METHOD HAVING AN INVERTED, UPPER LEVEL TRANSISTOR WHICH SHARES A GATE CONDUCTOR WITH A NON-INVERTED, LOWER LEVEL TRANSISTOR
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Patent #:
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Issue Dt:
|
11/17/1998
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Application #:
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08730725
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Filing Dt:
|
10/11/1996
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Title:
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DETERMINING THE NUMBER OF ACTIVE NODES ON AN ETHERNET NETWORK BY COUNTING A NUMBER OF PACKET RECEPTIONS
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Patent #:
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Issue Dt:
|
05/18/1999
|
Application #:
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08731028
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Filing Dt:
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10/08/1996
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Title:
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ELECTRODE RESHAPING IN A SEMICONDUCTOR ETCHING DEVICE
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Patent #:
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Issue Dt:
|
06/02/1998
|
Application #:
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08731825
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Filing Dt:
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10/21/1996
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Title:
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INTER-CHIP BUS WITH FAIR ACCESS FOR MULTIPLE DATA PIPES
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Patent #:
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Issue Dt:
|
10/06/1998
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Application #:
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08731956
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Filing Dt:
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10/23/1996
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Title:
|
ARCHITECTURE FOR A UNIVERSAL SERIAL BUS-BASED PC SPEAKER CONTROLLER
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Patent #:
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Issue Dt:
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05/18/1999
|
Application #:
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08732951
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Filing Dt:
|
10/17/1996
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Title:
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SET-ASSOCIATIVE CACHE MEMORY UTILIZING A SINGLE BANK OF PHYSICAL MEMORY
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Patent #:
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Issue Dt:
|
11/03/1998
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Application #:
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08733998
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Filing Dt:
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10/18/1996
|
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Title:
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ENABLING PCI CONFIGURATION SPACE FOR MULTIPLE FUNCTIONS
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Patent #:
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Issue Dt:
|
09/08/1998
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Application #:
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08735463
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Filing Dt:
|
10/23/1996
|
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Title:
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METHOD OF MAKING A SELECTIVE EPITAXIAL GROWTH CIRCUIT LOAD ELEMENT
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Patent #:
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Issue Dt:
|
10/20/1998
|
Application #:
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08735464
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Filing Dt:
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10/23/1996
|
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Title:
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METHOD OF MANUFACTURING A RAISED SOURCE/DRAIN MOSFET
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Patent #:
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Issue Dt:
|
04/13/1999
|
Application #:
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08735466
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Filing Dt:
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10/23/1996
|
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Title:
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ADDRESS PATH ARCHITECTURE
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Patent #:
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Issue Dt:
|
09/19/2000
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Application #:
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08735683
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Filing Dt:
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10/23/1996
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Title:
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BUS BRIDGE WITH UNIFIED SERIAL BUS CONTROLLER HAVING POWER MANAGEMENT CAPABILITIES
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Patent #:
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Issue Dt:
|
05/26/1998
|
Application #:
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08736623
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Filing Dt:
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10/24/1996
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Title:
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IDDQ TESTING OF INTEGRATED CIRCUITS
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Patent #:
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|
Issue Dt:
|
06/08/1999
|
Application #:
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08736920
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Filing Dt:
|
10/25/1996
|
|
Title:
|
METHOD FOR PERFORMING FLOORPLAN TIMING ANALYSIS USING MULTI-DIMENSIONAL FEEDBACK IN A SPREADSHEET WITH COMPUTED HYPERLINKS TO PHYSICAL LAYOUT GRAPHICS AND INTEGRATED CIRCUIT MADE USING SAME
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Patent #:
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|
Issue Dt:
|
04/20/1999
|
Application #:
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08736928
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Filing Dt:
|
10/25/1996
|
|
Title:
|
METHOD FOR PERFORMING FLOORPLAN TIMING ANALYSIS USING MULTI-DIMENSIONAL FEEDBACK IN A HISTOGRAM AND INTEGRATED CIRCUIT MADE USING SAME
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Patent #:
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|
Issue Dt:
|
05/11/1999
|
Application #:
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08738301
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Filing Dt:
|
10/25/1996
|
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Title:
|
METHOD FOR PERFORMING FLOORPLAN TIMING ANALYSIS BY SELECTIVELY DISPLAYING SIGNAL PATHS BASED ON SLACK TIME CALCULATIONS AND INTEGRATED CIRCUIT MADE USING SAME
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Patent #:
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|
Issue Dt:
|
07/14/1998
|
Application #:
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08739566
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Filing Dt:
|
10/30/1996
|
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Title:
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METHOD OF FORMING TRENCH TRANSISTOR AND ISOLATION TRENCH
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Patent #:
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Issue Dt:
|
09/01/1998
|
Application #:
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08739593
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Filing Dt:
|
10/30/1996
|
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Title:
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METHOD OF FORMING TRENCH TRANSISTOR WITH METAL SPACERS
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Patent #:
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Issue Dt:
|
08/08/2000
|
Application #:
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08739595
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Filing Dt:
|
10/30/1996
|
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Title:
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METHOD OF FORMING A TRENCH TRANSISTOR WITH INSULATIVE SPACERS
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Patent #:
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Issue Dt:
|
03/30/1999
|
Application #:
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08739596
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Filing Dt:
|
10/30/1996
|
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Title:
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TRENCH TRANSISTOR WITH LOCALIZED SOURCE/DRAIN REGIONS IMPLANTED THROUGH SELECTIVELY GROWN OXIDE LAYER
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Patent #:
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Issue Dt:
|
04/10/2001
|
Application #:
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08740017
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Filing Dt:
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10/23/1996
|
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Title:
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NOISE ELIMINATION IN A USB CODEC
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Patent #:
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|
Issue Dt:
|
06/22/1999
|
Application #:
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08740019
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Filing Dt:
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10/23/1996
|
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Title:
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USB BASED MICROPHONE SYSTEM
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Patent #:
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|
Issue Dt:
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03/09/2004
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Application #:
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08743049
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Filing Dt:
|
09/16/1996
|
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Title:
|
OPTIMIZED MII FOR 802.3U (100 BASE-T) FAST ETHERNET PHYS
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Patent #:
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Issue Dt:
|
06/09/1998
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Application #:
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08743522
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Filing Dt:
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11/04/1996
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Title:
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HIGH PERFORMANCE ASYMMETRICAL MOSFET STRUCTURE AND METHOD OF MAKING THE SAME
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Patent #:
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Issue Dt:
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12/07/1999
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Application #:
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08745475
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Filing Dt:
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11/12/1996
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Title:
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SILICIDATION AND DEEP SOURCE-DRAIN FORMATION PRIOR TO SOURCE-DRAIN EXTENSION FORMATION
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Patent #:
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Issue Dt:
|
06/15/1999
|
Application #:
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08748815
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Filing Dt:
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11/14/1996
|
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Title:
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ALTERNATIVE PROCESS FOR BPTEOS/BPSG LAYER FORMATION
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Patent #:
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Issue Dt:
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04/27/1999
|
Application #:
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08752647
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Filing Dt:
|
11/19/1996
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Title:
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MULTIMEDIA DEVICES IN COMPUTER SYSTEM THAT SELECTIVELY EMPLOY A COMMUNICATIONS PROTOCOL BY DETERMINING THE PRESENCE OF THE QUATERNARY INTERFACE
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Patent #:
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Issue Dt:
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08/18/1998
|
Application #:
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08752807
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Filing Dt:
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11/20/1996
|
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Title:
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SELF ALIGNED VIA DUAL DAMASCENE
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Patent #:
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Issue Dt:
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07/14/1998
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Application #:
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08756494
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Filing Dt:
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11/26/1996
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Title:
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ADJUSTABLE BLADE RETICLE ASSEMBLY
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Patent #:
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Issue Dt:
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06/01/1999
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Application #:
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08759025
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Filing Dt:
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12/02/1996
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Title:
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SYSTEM AND METHOD FOR CONDITIONALLY MOVING AN OPERAND FROM A SOURCE REGISTER TO A DESTINATION REGISTER
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Patent #:
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Issue Dt:
|
11/24/1998
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Application #:
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08760029
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Filing Dt:
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12/04/1996
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Title:
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INDIVIDUALLY CONTROLLABLE RADIATION SOURCES FOR PROVIDING AN IMAGE PATTERN IN A PHOTOLITHOGRAPHIC SYSTEM
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Patent #:
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Issue Dt:
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03/30/1999
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Application #:
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08760031
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Filing Dt:
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12/04/1996
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Title:
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METHOD OF MAKING RETICLE THAT COMPENSATES FOR RADIATION-INDUCED LENS ERROR IN A PHOTOLITHOGRAPHIC SYSTEM
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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08760723
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Filing Dt:
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12/05/1996
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Title:
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SEMICONDUCTOR DEVICE HAVING A THIN GATE OXIDE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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08761332
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Filing Dt:
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12/10/1996
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Title:
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TRANSISTOR AND PROCESS OF MAKING A TRANSISTOR HAVING AN IMPROVED LDD MASKING MATERIAL
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08761398
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Filing Dt:
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12/06/1996
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Title:
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NULTIPLE SPACER FORMATION/REMOVAL TECHNIQUE FOR FORMING A GRADED JUNCTION
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Patent #:
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Issue Dt:
|
06/22/1999
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Application #:
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08761586
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Filing Dt:
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12/06/1996
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Title:
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MULTIPLE BUS MASTER COMPUTER SYSTEM EMPLOYING A SHARED ADDRESS TRANSLATION UNIT
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08770016
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Filing Dt:
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12/19/1996
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Title:
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METHOD AND APPARATUS FOR CLOCK SYNCHRONIZATION ACROSS AN ISOCHRONOUS BUS BY ADJUSTMENT OF FRAME CLOCK RATES
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Patent #:
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Issue Dt:
|
08/18/1998
|
Application #:
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08771131
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Filing Dt:
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12/20/1996
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Title:
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SEMICONDUCTOR DEVICE HAVING A GROUP OF HIGH PERFORMANCE TRANSISTORS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
03/02/1999
|
Application #:
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08774581
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Filing Dt:
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12/31/1996
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Title:
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VIRTUAL HARD MASK FOR ETCHING
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Patent #:
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|
Issue Dt:
|
09/08/1998
|
Application #:
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08780615
|
Filing Dt:
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01/08/1997
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Title:
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SEMICONDUCTOR DEVICE HAVING REDUCED OVERLAP CAPACITANCE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
08/11/1998
|
Application #:
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08781443
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Filing Dt:
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01/10/1997
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Title:
|
GRADED MOS TRANSISTOR JUNCTION FORMED BY ALIGNING A SEQUENCE OF IMPLANTS TO A SELECTIVELY REMOVABLE POLYSILICON SIDEWALL SPACE AND OXIDE THERMALLY GROWN THEREON
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Patent #:
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|
Issue Dt:
|
08/11/1998
|
Application #:
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08781445
|
Filing Dt:
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01/10/1997
|
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Title:
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INTEGRATED CIRCUIT HAVING MULTIPLE LDD AND/OR SOURCE/DRAIN IMPLANT STEPS TO ENHANCE CIRCUIT PERFORMANCE
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Patent #:
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|
Issue Dt:
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11/17/1998
|
Application #:
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08781461
|
Filing Dt:
|
01/10/1997
|
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Title:
|
CMOS INTEGRATED CIRCUIT FORMED BY USING REMOVABLE SPACERS TO PRODUCE ASYMMETRICAL NMOS JUNCTIONS BEFORE ASYMMETRICAL PMOS JUNCTIONS FOR OPTIMIZING THERMAL DIFFUSIVITY OF DOPANTS IMPLANTED THEREIN
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Patent #:
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|
Issue Dt:
|
08/03/1999
|
Application #:
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08782271
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Filing Dt:
|
01/13/1997
|
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Title:
|
ADAPTIVE PRIORITY DETERMINATION FOR SERVICING TRANSMIT AND RECEIVE IN NETWORK CONTROLLERS
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Patent #:
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|
Issue Dt:
|
05/18/1999
|
Application #:
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08783887
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Filing Dt:
|
01/16/1997
|
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Title:
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SYSTEM AND METHOD OF ROUTING COMMUNICATIONS DATA WITH MULTIPLE PROTOCOLS USING CROSSBAR SWITCHES
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Patent #:
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|
Issue Dt:
|
06/16/1998
|
Application #:
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08784619
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Filing Dt:
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01/21/1997
|
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Title:
|
CHEMICAL-MECHANICAL POLISHING USING CURVED CARRIERS
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Patent #:
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|
Issue Dt:
|
05/18/1999
|
Application #:
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08785213
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Filing Dt:
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01/17/1997
|
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Title:
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METHOD OF FORMING ASYMMETRICALLY DOPED SOURCE/DRAIN REGIONS
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Patent #:
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|
Issue Dt:
|
03/02/1999
|
Application #:
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08785355
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Filing Dt:
|
01/17/1997
|
|
Title:
|
METHOD OF FORMING ULTRA-THIN OXIDES WITH LOW TEMPERATURE OXIDATION
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Patent #:
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|
Issue Dt:
|
02/01/2000
|
Application #:
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08785909
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Filing Dt:
|
01/21/1997
|
|
Title:
|
METHOD AND SYSTEM FOR USING N2 PLASMA TREATMENT TO ELIMINATE THE OUTGASSING DEFECTS AT THE INTERFACE OF A STOP LAYER AND AN OXIDE LAYER
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Patent #:
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|
Issue Dt:
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06/15/1999
|
Application #:
|
08786004
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Filing Dt:
|
01/21/1997
|
|
Title:
|
METHOD FOR FABRICATING COOPER-ALUMINUM METALLIZATION
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Patent #:
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|
Issue Dt:
|
02/22/2000
|
Application #:
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08787036
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Filing Dt:
|
01/28/1997
|
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Title:
|
METHOD OF MAKING AN IGFET WITH A NON-UNIFORM LATERAL DOPING PROFILE IN THE CHANNEL REGION
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Patent #:
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|
Issue Dt:
|
11/30/1999
|
Application #:
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08787152
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Filing Dt:
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01/31/1997
|
|
Title:
|
REVERSIBLE MEDIA INDEPENDENT CIRCUIT
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|
Patent #:
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|
Issue Dt:
|
05/05/1998
|
Application #:
|
08788124
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Filing Dt:
|
01/23/1997
|
|
Title:
|
METHOD AND APPARATUS FOR WAFER-FOCUSING
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Patent #:
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|
Issue Dt:
|
06/16/1998
|
Application #:
|
08789599
|
Filing Dt:
|
01/24/1997
|
|
Title:
|
SURFACE CONDITIONING INSULATING LAYER FOR FINE LINE CONDUCTIVE PATTERN
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|
Patent #:
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|
Issue Dt:
|
10/06/1998
|
Application #:
|
08789978
|
Filing Dt:
|
01/28/1997
|
|
Title:
|
PERFORMING CHEMICAL MECHANICAL POLISHING OF OXIDES AND METALS USING SEQUENTIAL REMOVAL ON MULTIPLE POLISH PLATENS TO INCREASE EQUIPMENT THROUGHPUT
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|
Patent #:
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|
Issue Dt:
|
10/13/1998
|
Application #:
|
08790394
|
Filing Dt:
|
01/29/1997
|
|
Title:
|
METHOD AND APPARATUS FOR PREDECODING VARIABLE BYTE-LENGTH INSTRUCTIONS WITHIN A SUPERSCALAR MICROPROCESSOR
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08792714
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Filing Dt:
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01/30/1997
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Title:
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SEMICONDUCTOR GATE CONDUCTOR WITH A SUBSTANTIALLY UNIFORM DOPING PROFILE HAVING MINIMAL SUSCEPTIBILITY TO DOPANT PENETRATION INTO THE UNDERLYING GATE DIELECTRIC
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Patent #:
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Issue Dt:
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07/14/1998
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Application #:
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08794526
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Filing Dt:
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02/03/1997
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Title:
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INTERRUPT TRANSMISSION VIA SPECIALIZED BUS CYCLE WITHIN A SYMMETRICAL MULTIPROCESSING SYSTEM
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08797434
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Filing Dt:
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02/10/1997
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Title:
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RESYNCHRONIZATION OF A SUPERSCALAR PROCESSOR
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Patent #:
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Issue Dt:
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01/19/1999
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Application #:
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08798249
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Filing Dt:
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02/11/1997
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Title:
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"MICROCONTROLLER WITH IMPROVED DEBUG CAPABILITY FOR INTERNAL MEMORY"
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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08798581
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Filing Dt:
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02/10/1997
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Title:
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METHOD OF FABRICATING CMOS DEVICES WITH ULTRA-SHALLOW JUNCTIONS AND REDUCED DRAIN AREA
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08799064
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Filing Dt:
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02/10/1997
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Title:
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SUPERSCALAR MICROPROCESSOR INCLUDING FLAG OPERAND RENAMING AND FORWARDING APPARATUS
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Patent #:
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Issue Dt:
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05/09/2000
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Application #:
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08799676
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Filing Dt:
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02/11/1997
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Title:
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TESTABILITY METHOD FOR MODULARIZED INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08801709
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Filing Dt:
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02/14/1997
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Title:
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PIPELINE THROUGHPUT VIA PARALLEL OUT-OF-ORDER EXECUTION OF ADDS AND MOVES IN A SUPPLEMENTAL INTEGER EXECUTION UNIT
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Patent #:
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Issue Dt:
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03/14/2000
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Application #:
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08802738
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Filing Dt:
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02/20/1997
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Title:
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METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE WITH ULTRA-FINE LINE GEOMETRY
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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08805534
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Filing Dt:
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02/25/1997
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Title:
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METHOD OF STITCHING SEGMENTS DEFINED BY ADJACENT IMAGE PATTERNS DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/15/1999
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Application #:
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08805554
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Filing Dt:
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02/26/1997
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Title:
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PROGRAMMABLE CACHE INCLUDING A NON-LOCAKABLE DATA WAY AND A LOCKABLE DATA WAY CONFIGURED TO LOCK REAL-TIME DATA
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Patent #:
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Issue Dt:
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06/29/1999
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Application #:
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08806562
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Filing Dt:
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02/25/1997
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Title:
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METHOD OF CHANNEL DOPING USING DIFFUSION FROM IMPLANTED POLYSILICON
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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08807162
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Filing Dt:
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02/27/1997
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Title:
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SYSTEM AND METHOD FOR HARDWARE EMULATION OF A DIGITAL CIRCUIT
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Patent #:
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Issue Dt:
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07/14/1998
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Application #:
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08808609
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Filing Dt:
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02/04/1997
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Title:
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SYSTEM AND METHOD FOR MAPPING MEMORY TO DRAM AFTER SYSTEM BOOT FROM NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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06/01/1999
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Application #:
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08808729
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Filing Dt:
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02/28/1997
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Title:
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APPARATUS AND METHOD FOR NATIVE MODE PROCESSING IN A RISC-BASED CISC PROCESSOR
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Patent #:
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Issue Dt:
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09/14/1999
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Application #:
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08811415
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Filing Dt:
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03/04/1997
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Title:
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HIGH PERFORMANCE MOSFET WITH A SOURCE REMOVED FROM THE SEMICONDUCTOR SUBSTRATE AND FABRICATION METHOD THEREOF
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Patent #:
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Issue Dt:
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03/30/1999
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Application #:
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08811462
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Filing Dt:
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03/03/1997
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Title:
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METHOD AND SYSTEM FOR GENERATING PRODUCT PERFORMANCE HISTORY
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Patent #:
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Issue Dt:
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02/08/2000
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Application #:
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08812551
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Filing Dt:
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03/07/1997
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Title:
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MICROCONTROLLER HAVING DEDICATED HARDWARE FOR MEMORY ADDRESS SPACE EXPANSION VIA AUXILLIARY ADDRESS SIGNAL GENERATION
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Patent #:
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Issue Dt:
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02/16/1999
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Application #:
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08812740
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Filing Dt:
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03/06/1997
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Title:
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OXIDE FORMATION TECHNIQUE USING THIN FILM SILICON DEPOSITION
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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08813620
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Filing Dt:
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03/07/1997
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Title:
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MICROCONTROLLER HAVING DEDICATED HARDWARE FOR MEMORY ADDRESS SPACE EXPANSION SUPPORTING BOTH STATIC AND DYNAMIC MEMORY DEVICES
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Patent #:
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Issue Dt:
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12/04/2001
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Application #:
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08813728
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Filing Dt:
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03/07/1997
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Title:
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OVERLAPPING PERIPHERAL CHIP SELECT SPACE WITH DRAM ON A MICROCONTROLLER WITH AN INTEGRATED DRAM CONTROLLER
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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08813734
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Filing Dt:
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03/07/1997
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Title:
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METHOD AND APPARATUS FOR ADDRESS MULTIPLEXING TO SUPPORT VARIABLE DRAM SIZES
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08814628
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Filing Dt:
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03/10/1997
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Title:
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INVALID INSTRUCTION SCAN UNIT FOR DETECTING INVALID PREDECODE DATA CORRESPONDING TO INSTRUTIONS BEING FETCHED
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Patent #:
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Issue Dt:
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10/20/1998
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Application #:
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08815764
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Filing Dt:
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03/12/1997
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Title:
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INTERCONNECT DECOUPLING SCHEME
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Patent #:
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Issue Dt:
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10/13/1998
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Application #:
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08819109
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Filing Dt:
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03/17/1997
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Title:
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FUNCTIONAL UNIT WITH A POINTER FOR MISPREDICTED RESOLUTION, AND A SUPERSCALAR MICROPROCESSOR EMPLOYING THE SAME
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Patent #:
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Issue Dt:
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11/09/1999
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Application #:
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08820417
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Filing Dt:
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03/12/1997
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Title:
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SEMICONDUCTOR FABRICATION EMPLOYING A FLOWABLE OXIDE TO ENHANCE PLANARIZATION IN A SHALLOW TRENCH ISOLATION PROCESS
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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08820965
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Filing Dt:
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03/19/1997
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Title:
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MECHANISM FOR STORING SYSTEM LEVEL ATTRIBUTES IN A TRANSLATION LOOKASIDE BUFFER
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Patent #:
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Issue Dt:
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03/14/2000
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Application #:
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08821660
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Filing Dt:
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03/19/1997
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING ADVANCED CONTACT FORMATION
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|
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08822120
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Filing Dt:
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03/21/1997
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Title:
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SUBSTANTIALLY PLANAR SEMICONDUCTOR TOPOGRAPHY USING DIELECTRICS AND CHEMICAL MECHANICAL POLISH
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Patent #:
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Issue Dt:
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04/11/2000
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Application #:
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08822121
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Filing Dt:
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03/21/1997
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Title:
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SEMICONDUCTOR FABRICATION EMPLOYING CONCURRENT DIFFUSION BARRIER AND SALICIDE FORMATION
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Patent #:
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Issue Dt:
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01/19/1999
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Application #:
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08822122
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Filing Dt:
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03/21/1997
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Title:
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SEMICONDUCTOR FABRICATION EMPLOYING A POST-IMPLANT ANNEAL WITHIN A LOW TEMPERATURE HIGH PRESSURE NITROGEN AMBIENT TO IMPROVE CHANNEL AND GATE OXIDE RELIABILITY
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Patent #:
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Issue Dt:
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07/13/1999
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Application #:
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08822223
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Filing Dt:
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03/21/1997
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Title:
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SEMICONDUCTOR DEVICE HAVING FLUORINE BEARING SIDEWALL SPACERS AND METHOD OF MANUFACTURE THEREOF
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