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Patent Assignment Details
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Reel/Frame:051630/0115   Pages: 7
Recorded: 01/27/2020
Attorney Dkt #:LIBERTY
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 26
1
Patent #:
Issue Dt:
06/10/2003
Application #:
09497380
Filing Dt:
02/04/2000
Title:
DUAL POWER SWITCHING NETWORK SYSTEM FOR ISOLATING BETWEEN DIFFERENT POWER SUPPLIES AND APPLYING APPROPRIATE POWER SUPPLY TO A CONNECTED PERIPHERAL DEVICE
2
Patent #:
Issue Dt:
12/04/2001
Application #:
09505448
Filing Dt:
02/16/2000
Title:
Process for the anisotropic etching of an organic dielectric polymer material by a plasma gas and application in microelectronics
3
Patent #:
Issue Dt:
05/04/2004
Application #:
09518318
Filing Dt:
03/03/2000
Title:
METHOD AND APPARATUS FOR CARRYING DIGITAL DATA AS ANALOG VIDEO
4
Patent #:
Issue Dt:
03/25/2003
Application #:
09539693
Filing Dt:
03/31/2000
Title:
APPARATUS, METHOD AND SYSTEM FOR SYNCHRONIZING SLAVE SYSTEM OPERATIONS TO MASTER SYSTEM CLOCKING SIGNALS IN A MASTER-SLAVE ASYNCHRONOUS COMMUNICATION SYSTEM
5
Patent #:
Issue Dt:
04/27/2004
Application #:
09576871
Filing Dt:
05/22/2000
Title:
PROCESSOR ARRAY AND PARALLEL DATA PROCESSING METHODS
6
Patent #:
Issue Dt:
11/06/2001
Application #:
09595366
Filing Dt:
06/15/2000
Title:
Floating gate transistor having buried strained silicon germanium channel layer
7
Patent #:
Issue Dt:
11/06/2001
Application #:
09596006
Filing Dt:
06/15/2000
Title:
Vertical channel floating gate transistor having silicon germanium channel layer
8
Patent #:
Issue Dt:
02/18/2003
Application #:
09619587
Filing Dt:
07/19/2000
Title:
METHOD FOR MAKING INTEGRATED CIRCUIT INCLUDING INTERCONNECTS WITH ENHANCED ELECTROMIGRATION RESISTANCE
9
Patent #:
Issue Dt:
03/18/2003
Application #:
09654811
Filing Dt:
09/05/2000
Title:
CIRCUIT AND METHOD FOR REDUCING POWER CONSUMPTION IN AN INSTRUCTION CACHE
10
Patent #:
Issue Dt:
08/27/2002
Application #:
09672473
Filing Dt:
09/28/2000
Title:
DIFFUSION BARRIERS FOR COPPER INTERCONNECT SYSTEMS
11
Patent #:
Issue Dt:
09/23/2003
Application #:
09676242
Filing Dt:
09/29/2000
Title:
SYSTEM AND METHOD FOR CONTROLLING AND MONITORING FIRST TELECOMMUNICATION TERMINAL DEVICES CONNECTED TO PRIVATE BRANCH EXCHANGES OR SECOND TELECOMMUNICATION TERMINAL DEVICES COUPLED TO LONG DISTANCE NETWORKS
12
Patent #:
Issue Dt:
03/30/2004
Application #:
09677390
Filing Dt:
10/02/2000
Title:
METHOD AND CIRCUITRY FOR SWITCHING FROM A SYNCHRONOUS MODE OF OPERATION TO AN ASYNCHRONOUS MODE OF OPERATION WITHOUT ANY LOSS
13
Patent #:
Issue Dt:
01/21/2003
Application #:
09862760
Filing Dt:
05/21/2001
Publication #:
Pub Dt:
11/22/2001
Title:
SWITCHING AMPLIFIER RESOLUTION ENHANCEMENT APPARATUS AND METHODS
14
Patent #:
Issue Dt:
12/10/2002
Application #:
09929335
Filing Dt:
08/14/2001
Publication #:
Pub Dt:
03/21/2002
Title:
DYNAMIC RANGE ENHANCEMENT TECHNIQUE
15
Patent #:
Issue Dt:
05/13/2003
Application #:
09980662
Filing Dt:
11/15/2001
Title:
DIGITAL AMPLIFIER LINEARIZATION USING ANALOG FEEDBACK
16
Patent #:
Issue Dt:
04/22/2003
Application #:
09997700
Filing Dt:
11/29/2001
Publication #:
Pub Dt:
01/09/2003
Title:
BI-DIRECTIONAL LOW-PASS FILTER FOR USE AT USER END OR OFFICE END IN COMMUNICATION NETWORK
17
Patent #:
Issue Dt:
08/05/2003
Application #:
10008808
Filing Dt:
11/13/2001
Publication #:
Pub Dt:
05/15/2003
Title:
METHOD FOR PATTERNING A MULTILAYERED CONDUCTOR/SUBSTRATE STRUCTURE
18
Patent #:
Issue Dt:
05/30/2006
Application #:
10381466
Filing Dt:
03/24/2003
Publication #:
Pub Dt:
02/26/2004
Title:
VENTILATION DEVICE WITH ELECTROMAGNETIC COUPLING
19
Patent #:
Issue Dt:
12/04/2007
Application #:
10428047
Filing Dt:
05/02/2003
Publication #:
Pub Dt:
11/04/2004
Title:
ESD PROTECTION CIRCUITS FOR MIXED-VOLTAGE BUFFERS
20
Patent #:
Issue Dt:
04/18/2006
Application #:
10739395
Filing Dt:
12/18/2003
Publication #:
Pub Dt:
09/16/2004
Title:
HIGH PERFORMANCE INTERCONNECT ARCHITECTURE FOR FIELD PROGRAMMABLE GATE ARRAYS
21
Patent #:
Issue Dt:
08/17/2010
Application #:
11113454
Filing Dt:
04/22/2005
Title:
METHOD FOR MAKING INTEGRATED CIRCUIT INCLUDING INTERCONNECTS WITH ENHANCED ELECTROMIGRATION RESISTANCE USING DOPED SEED LAYER AND INTEGRATED CIRCUITS PRODUCED THEREBY
22
Patent #:
Issue Dt:
05/18/2010
Application #:
11150597
Filing Dt:
06/10/2005
Title:
OPERATIONAL MONITORING FOR A CONVERTER
23
Patent #:
Issue Dt:
11/14/2006
Application #:
11162972
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
03/09/2006
Title:
APPARATUS AND METHOD FOR GENERATING A VARIABLE-FREQUENCY CLOCK
24
Patent #:
Issue Dt:
09/28/2010
Application #:
11318397
Filing Dt:
12/22/2005
Title:
SEMICONDUCTOR DEVICE WITH COMPENSATED THRESHOLD VOLTAGE AND METHOD FOR MAKING SAME
25
Patent #:
Issue Dt:
03/12/2013
Application #:
11487577
Filing Dt:
07/13/2006
Title:
METHOD FOR PATTERNING A MULTILAYERED CONDUCTOR/SUBSTRATE STRUCTURE
26
Patent #:
Issue Dt:
06/23/2009
Application #:
11606325
Filing Dt:
11/28/2006
Title:
COMPLEX NUMBER MULTIPLIER
Assignor
1
Exec Dt:
12/30/2019
Assignee
1
2325 OAK ALLEY
TYLER, TEXAS 75703
Correspondence name and address
LARRY D. THOMPSON, JR.
4306 YOAKUM BLVD
STE 450
HOUSTON, TX 77006

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