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Reel/Frame:046900/0136   Pages: 125
Recorded: 08/22/2018
Attorney Dkt #:046660-0056
Conveyance: AMENDED AND RESTATED U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS)
Total properties: 1130
Page 9 of 12
Pages: 1 2 3 4 5 6 7 8 9 10 11 12
1
Patent #:
Issue Dt:
04/16/2013
Application #:
12559923
Filing Dt:
09/15/2009
Publication #:
Pub Dt:
04/01/2010
Title:
MOS SOLID-STATE IMAGE PICKUP DEVICE
2
Patent #:
Issue Dt:
12/13/2011
Application #:
12566533
Filing Dt:
09/24/2009
Title:
MIXED COMPOSITION INTERFACE LAYER AND METHOD OF FORMING
3
Patent #:
Issue Dt:
10/02/2012
Application #:
12576489
Filing Dt:
10/09/2009
Publication #:
Pub Dt:
04/15/2010
Title:
IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME
4
Patent #:
NONE
Issue Dt:
Application #:
12607680
Filing Dt:
10/28/2009
Publication #:
Pub Dt:
05/06/2010
Title:
BRIDGE DEVICE HAVING A VIRTUAL PAGE BUFFER
5
Patent #:
Issue Dt:
09/04/2012
Application #:
12615075
Filing Dt:
11/09/2009
Publication #:
Pub Dt:
05/13/2010
Title:
IMAGE SENSOR HAVING DIELECTRIC LAYER WHICH ALLOWS FIRST IMPURITY REGION OF PHOTODIODE TO BE ISOLATED FROM CONTACT PLUG AND SECOND IMPURITY REGION OF THE PHOTODIODE TO CONTACT THE CONTACT PLUG
6
Patent #:
Issue Dt:
06/05/2012
Application #:
12617459
Filing Dt:
11/12/2009
Publication #:
Pub Dt:
05/06/2010
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES
7
Patent #:
Issue Dt:
04/19/2011
Application #:
12619157
Filing Dt:
11/16/2009
Publication #:
Pub Dt:
03/11/2010
Title:
TEMPERATURE DETECTOR IN AN INTEGRATED CIRCUIT
8
Patent #:
Issue Dt:
01/28/2014
Application #:
12619355
Filing Dt:
11/16/2009
Publication #:
Pub Dt:
03/11/2010
Title:
METHOD AND SYSTEM FOR PACKET PROCESSING
9
Patent #:
Issue Dt:
07/19/2011
Application #:
12620749
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/18/2010
Title:
SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
10
Patent #:
Issue Dt:
07/12/2011
Application #:
12621983
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
03/11/2010
Title:
BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT AND DELAY LINE
11
Patent #:
Issue Dt:
10/19/2010
Application #:
12623899
Filing Dt:
11/23/2009
Publication #:
Pub Dt:
06/03/2010
Title:
METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS
12
Patent #:
Issue Dt:
10/28/2014
Application #:
12627574
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/03/2010
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
13
Patent #:
Issue Dt:
03/17/2015
Application #:
12627702
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/03/2010
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
14
Patent #:
Issue Dt:
06/28/2011
Application #:
12633071
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
06/17/2010
Title:
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
15
Patent #:
Issue Dt:
10/25/2011
Application #:
12635280
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
07/08/2010
Title:
NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
16
Patent #:
Issue Dt:
02/22/2011
Application #:
12638309
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
06/24/2010
Title:
DELAY LOCKED LOOP CIRCUIT
17
Patent #:
Issue Dt:
07/10/2012
Application #:
12639531
Filing Dt:
12/16/2009
Publication #:
Pub Dt:
05/06/2010
Title:
INITIALIZATION CIRCUIT FOR DELAY LOCKED LOOP
18
Patent #:
Issue Dt:
02/15/2011
Application #:
12651707
Filing Dt:
01/04/2010
Publication #:
Pub Dt:
04/22/2010
Title:
MEMORY SYSTEM HAVING INCORRUPTED STROBE SIGNALS
19
Patent #:
Issue Dt:
04/02/2013
Application #:
12652897
Filing Dt:
01/06/2010
Publication #:
Pub Dt:
07/08/2010
Title:
CIRCUIT, SYSTEM AND METHOD FOR SELECTIVELY TURNING OFF INTERNAL CLOCK DRIVERS
20
Patent #:
Issue Dt:
06/24/2014
Application #:
12683731
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
04/29/2010
Title:
TELEPHONE OUTLET WITH PACKET TELEPHONY ADAPTER, AND A NETWORK USING SAME
21
Patent #:
Issue Dt:
06/26/2012
Application #:
12684026
Filing Dt:
01/07/2010
Publication #:
Pub Dt:
05/13/2010
Title:
A DOUBLE DATA RATE CONVERTER CIRCUIT INCLUDES A DELAY LOCKED LOOP FOR PROVIDING THE PLURALITY OF CLOCK PHASE SIGNALS
22
Patent #:
Issue Dt:
01/04/2011
Application #:
12687541
Filing Dt:
01/14/2010
Publication #:
Pub Dt:
05/13/2010
Title:
TIMING VERNIER USING A DELAY LOCKED LOOP
23
Patent #:
Issue Dt:
03/27/2012
Application #:
12699627
Filing Dt:
02/03/2010
Publication #:
Pub Dt:
08/12/2010
Title:
MEMORY WITH DATA CONTROL
24
Patent #:
Issue Dt:
01/11/2011
Application #:
12700370
Filing Dt:
02/04/2010
Publication #:
Pub Dt:
06/10/2010
Title:
PHASE-LOCKED LOOP CIRCUITRY USING CHARGE PUMPS WITH CURRENT MIRROR CIRCUITRY
25
Patent #:
Issue Dt:
10/30/2012
Application #:
12705040
Filing Dt:
02/12/2010
Publication #:
Pub Dt:
06/10/2010
Title:
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
26
Patent #:
Issue Dt:
12/13/2011
Application #:
12705345
Filing Dt:
02/12/2010
Publication #:
Pub Dt:
09/16/2010
Title:
SRAM LEAKAGE REDUCTION CIRCUIT
27
Patent #:
Issue Dt:
07/24/2012
Application #:
12709198
Filing Dt:
02/19/2010
Title:
BLOCK PROGRAMMABLE PRIORITY ENCODER IN A CAM
28
Patent #:
Issue Dt:
09/25/2012
Application #:
12710744
Filing Dt:
02/23/2010
Publication #:
Pub Dt:
06/24/2010
Title:
TECHNIQUE FOR PROVIDING STRESS SOURCES IN TRANSISTORS IN CLOSE PROXIMITY TO A CHANNEL REGION BY RECESSING DRAIN AND SOURCE REGIONS
29
Patent #:
Issue Dt:
02/22/2011
Application #:
12714670
Filing Dt:
03/01/2010
Publication #:
Pub Dt:
08/26/2010
Title:
CHARGE PUMP FOR PLL/DLL
30
Patent #:
Issue Dt:
09/20/2011
Application #:
12719413
Filing Dt:
03/08/2010
Publication #:
Pub Dt:
06/24/2010
Title:
FLASH MEMORY PROGRAM INHIBIT SCHEME
31
Patent #:
Issue Dt:
08/16/2011
Application #:
12732745
Filing Dt:
03/26/2010
Publication #:
Pub Dt:
07/22/2010
Title:
METHOD AND SYSTEM FOR ACCESSING A FLASH MEMORY DEVICE
32
Patent #:
Issue Dt:
09/09/2014
Application #:
12741467
Filing Dt:
05/05/2010
Publication #:
Pub Dt:
10/21/2010
Title:
ELECTRONIC DEVICE
33
Patent #:
Issue Dt:
06/18/2013
Application #:
12742793
Filing Dt:
05/13/2010
Publication #:
Pub Dt:
10/28/2010
Title:
SYNTHESIZER, SYNTHESIZER MODULE, AND RECEPTION DEVICE AND ELECTRONIC DEVICE USING SAME
34
Patent #:
Issue Dt:
10/28/2014
Application #:
12753271
Filing Dt:
04/02/2010
Publication #:
Pub Dt:
10/07/2010
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
35
Patent #:
Issue Dt:
10/21/2014
Application #:
12753458
Filing Dt:
04/02/2010
Publication #:
Pub Dt:
10/07/2010
Title:
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
36
Patent #:
Issue Dt:
05/17/2011
Application #:
12757406
Filing Dt:
04/09/2010
Publication #:
Pub Dt:
08/05/2010
Title:
INDEPENDENT LINK AND BANK SELECTION
37
Patent #:
Issue Dt:
03/19/2013
Application #:
12757540
Filing Dt:
04/09/2010
Publication #:
Pub Dt:
03/03/2011
Title:
USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING
38
Patent #:
Issue Dt:
11/22/2011
Application #:
12772604
Filing Dt:
05/03/2010
Publication #:
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT DEVICE AND METHOD FOR FORMING THE SAME
39
Patent #:
Issue Dt:
12/10/2013
Application #:
12773340
Filing Dt:
05/04/2010
Publication #:
Pub Dt:
04/21/2011
Title:
RECONFIGURING THROUGH SILICON VIAS IN STACKED MULTI-DIE PACKAGES
40
Patent #:
Issue Dt:
12/13/2011
Application #:
12773531
Filing Dt:
05/04/2010
Publication #:
Pub Dt:
08/26/2010
Title:
SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE
41
Patent #:
Issue Dt:
08/09/2011
Application #:
12775696
Filing Dt:
05/07/2010
Publication #:
Pub Dt:
09/30/2010
Title:
METHOD AND APPARATUS FOR REDUCING POOL STARVATION IN A SHARED MEMORY SWITCH
42
Patent #:
Issue Dt:
05/31/2011
Application #:
12782047
Filing Dt:
05/18/2010
Publication #:
Pub Dt:
09/09/2010
Title:
MULTIPLE BIT PER CELL NON VOLATILE MEMORY APPARATUS AND SYSTEM HAVING POLARITY CONTROL AND METHOD OF PROGRAMMING SAME
43
Patent #:
Issue Dt:
10/09/2012
Application #:
12784157
Filing Dt:
05/20/2010
Publication #:
Pub Dt:
09/09/2010
Title:
FREQUENCY-DOUBLING DELAY LOCKED LOOP
44
Patent #:
Issue Dt:
09/23/2014
Application #:
12785099
Filing Dt:
05/21/2010
Publication #:
Pub Dt:
09/09/2010
Title:
PARTIAL BLOCK ERASE ARCHITECTURE FOR FLASH MEMORY
45
Patent #:
Issue Dt:
05/22/2012
Application #:
12791290
Filing Dt:
06/01/2010
Publication #:
Pub Dt:
09/23/2010
Title:
REDUCING TRANSISTOR JUNCTION CAPACITANCE BY RECESSING DRAIN AND SOURCE REGIONS
46
Patent #:
Issue Dt:
09/10/2013
Application #:
12812500
Filing Dt:
07/12/2010
Publication #:
Pub Dt:
12/02/2010
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
47
Patent #:
Issue Dt:
12/31/2013
Application #:
12816130
Filing Dt:
06/15/2010
Publication #:
Pub Dt:
04/07/2011
Title:
SYSTEM AND METHOD PROVIDING INTEROPERABILITY BETWEEN CELLULAR AND OTHER WIRELESS SYSTEMS
48
Patent #:
Issue Dt:
10/23/2012
Application #:
12827718
Filing Dt:
06/30/2010
Publication #:
Pub Dt:
10/21/2010
Title:
METHOD OF CONFIGURING NON-VOLATILE MEMORY FOR A HYBRID DISK DRIVE
49
Patent #:
Issue Dt:
03/15/2011
Application #:
12832121
Filing Dt:
07/08/2010
Publication #:
Pub Dt:
10/28/2010
Title:
APPARATUS AND METHOD OF PAGE PROGRAM OPERATION FOR MEMORY DEVICES WITH MIRROR BACK-UP OF DATA
50
Patent #:
Issue Dt:
04/12/2011
Application #:
12852082
Filing Dt:
08/06/2010
Publication #:
Pub Dt:
11/25/2010
Title:
METHOD FOR STACKING SERIALLY-CONNECTED INTEGRATED CIRCUITS AND MULTI-CHIP DEVICE MADE FROM SAME
51
Patent #:
Issue Dt:
02/26/2013
Application #:
12866951
Filing Dt:
08/10/2010
Publication #:
Pub Dt:
12/16/2010
Title:
SYNTHESIZER AND RECEPTION DEVICE USING THE SAME
52
Patent #:
Issue Dt:
06/07/2011
Application #:
12878601
Filing Dt:
09/09/2010
Publication #:
Pub Dt:
12/30/2010
Title:
METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS
53
Patent #:
Issue Dt:
10/16/2012
Application #:
12879566
Filing Dt:
09/10/2010
Publication #:
Pub Dt:
01/20/2011
Title:
NON-VOLATILE MEMORY BANK AND PAGE BUFFER THEREFOR
54
Patent #:
Issue Dt:
06/12/2012
Application #:
12882931
Filing Dt:
09/15/2010
Publication #:
Pub Dt:
01/06/2011
Title:
MEMORY WITH OUTPUT CONTROL
55
Patent #:
Issue Dt:
01/24/2012
Application #:
12884939
Filing Dt:
09/17/2010
Publication #:
Pub Dt:
01/13/2011
Title:
FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
56
Patent #:
Issue Dt:
12/06/2011
Application #:
12888158
Filing Dt:
09/22/2010
Publication #:
Pub Dt:
01/13/2011
Title:
ELECTRONIC EQUIPMENT SYSTEM AND SEMICONDUCTOR INTEGRATED CIRCUIT CONTROLLER
57
Patent #:
Issue Dt:
11/22/2011
Application #:
12903271
Filing Dt:
10/13/2010
Publication #:
Pub Dt:
02/10/2011
Title:
POWER SUPPLIES IN FLASH MEMORY DEVICES AND SYSTEMS
58
Patent #:
Issue Dt:
12/31/2013
Application #:
12912235
Filing Dt:
10/26/2010
Publication #:
Pub Dt:
02/17/2011
Title:
COMMUNICATION SYSTEM AND METHOD OVER LOCAL AREA NETWORK WIRING
59
Patent #:
Issue Dt:
10/11/2011
Application #:
12915796
Filing Dt:
10/29/2010
Publication #:
Pub Dt:
02/24/2011
Title:
DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS
60
Patent #:
Issue Dt:
11/26/2013
Application #:
12922734
Filing Dt:
09/15/2010
Publication #:
Pub Dt:
01/13/2011
Title:
SYNTHESIZER AND RECEPTION DEVICE
61
Patent #:
Issue Dt:
04/03/2012
Application #:
12943549
Filing Dt:
11/10/2010
Publication #:
Pub Dt:
03/10/2011
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT AND DESIGN METHOD THEREOF
62
Patent #:
Issue Dt:
08/21/2012
Application #:
12957878
Filing Dt:
12/01/2010
Publication #:
Pub Dt:
06/09/2011
Title:
SEMICONDUCTOR DEVICE
63
Patent #:
Issue Dt:
04/16/2013
Application #:
12958287
Filing Dt:
12/01/2010
Publication #:
Pub Dt:
03/24/2011
Title:
SEMICONDUCTOR DEVICE HAVING METAL LINES WITH SLITS
64
Patent #:
Issue Dt:
02/24/2015
Application #:
12967918
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
08/25/2011
Title:
SEMICONDUCTOR MEMORY DEVICE WITH PLURAL MEMORY DIE AND CONTROLLER DIE
65
Patent #:
Issue Dt:
11/01/2011
Application #:
12986646
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
05/05/2011
Title:
CHARGE PUMP FOR PLL/DLL
66
Patent #:
Issue Dt:
06/26/2012
Application #:
12986684
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
05/12/2011
Title:
DELAY LOCKED LOOP CIRCUIT
67
Patent #:
Issue Dt:
02/12/2013
Application #:
13004461
Filing Dt:
01/11/2011
Publication #:
Pub Dt:
05/05/2011
Title:
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS
68
Patent #:
Issue Dt:
12/25/2012
Application #:
13005774
Filing Dt:
01/13/2011
Publication #:
Pub Dt:
05/12/2011
Title:
STACKED SEMICONDUCTOR DEVICES INCLUDING A MASTER DEVICE
69
Patent #:
Issue Dt:
04/30/2013
Application #:
13006005
Filing Dt:
01/13/2011
Publication #:
Pub Dt:
05/12/2011
Title:
CLOCK MODE DETERMINATION IN A MEMORY SYSTEM
70
Patent #:
Issue Dt:
10/02/2012
Application #:
13019100
Filing Dt:
02/01/2011
Publication #:
Pub Dt:
05/26/2011
Title:
PRE-CHARGE VOLTAGE GENERATION AND POWER SAVING MODES
71
Patent #:
Issue Dt:
10/23/2012
Application #:
13027076
Filing Dt:
02/14/2011
Publication #:
Pub Dt:
06/09/2011
Title:
CONDUCTOR BUMP METHOD AND APPARATUS
72
Patent #:
Issue Dt:
04/03/2012
Application #:
13032175
Filing Dt:
02/22/2011
Publication #:
Pub Dt:
08/25/2011
Title:
CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP
73
Patent #:
Issue Dt:
03/27/2012
Application #:
13035580
Filing Dt:
02/25/2011
Publication #:
Pub Dt:
09/29/2011
Title:
NON-VOLATILE MEMORY DEVICES AND CONTROL AND OPERATION THEREOF
74
Patent #:
Issue Dt:
08/04/2015
Application #:
13038461
Filing Dt:
03/02/2011
Publication #:
Pub Dt:
09/22/2011
Title:
COMPOSITE SEMICONDUCTOR MEMORY DEVICE WITH ERROR CORRECTION
75
Patent #:
Issue Dt:
08/20/2013
Application #:
13038950
Filing Dt:
03/02/2011
Publication #:
Pub Dt:
06/23/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
76
Patent #:
Issue Dt:
03/11/2014
Application #:
13040254
Filing Dt:
03/03/2011
Publication #:
Pub Dt:
06/23/2011
Title:
HYBRID SOLID-STATE MEMORY SYSTEM HAVING VOLATILE AND NON-VOLATILE MEMORY
77
Patent #:
Issue Dt:
06/11/2013
Application #:
13040324
Filing Dt:
03/04/2011
Publication #:
Pub Dt:
12/15/2011
Title:
SEMICONDUCTOR MEMORY DEVICE WITH SENSE AMPLIFIER AND BITLINE ISOLATION
78
Patent #:
Issue Dt:
08/06/2013
Application #:
13042571
Filing Dt:
03/08/2011
Publication #:
Pub Dt:
03/08/2012
Title:
MULTI-CHIP PACKAGE WITH OFFSET DIE STACKING
79
Patent #:
Issue Dt:
02/26/2013
Application #:
13046197
Filing Dt:
03/11/2011
Publication #:
Pub Dt:
07/07/2011
Title:
METHOD FOR STACKING SERIALLY-CONNECTED INTEGRATED CIRCUITS AND MULTI-CHIP DEVICE MADE FROM SAME
80
Patent #:
Issue Dt:
02/21/2012
Application #:
13049487
Filing Dt:
03/16/2011
Publication #:
Pub Dt:
08/18/2011
Title:
SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE
81
Patent #:
Issue Dt:
03/05/2013
Application #:
13057055
Filing Dt:
02/01/2011
Publication #:
Pub Dt:
06/09/2011
Title:
SYNTHESIZER AND RECEPTION DEVICE AND ELECTRONIC DEVICE USING THE SAME
82
Patent #:
Issue Dt:
10/23/2012
Application #:
13072097
Filing Dt:
03/25/2011
Publication #:
Pub Dt:
07/14/2011
Title:
DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION
83
Patent #:
Issue Dt:
11/12/2013
Application #:
13073150
Filing Dt:
03/28/2011
Publication #:
Pub Dt:
07/14/2011
Title:
NAND FLASH MEMORY HAVING MULTIPLE CELL SUBSTRATES
84
Patent #:
Issue Dt:
08/28/2012
Application #:
13074291
Filing Dt:
03/29/2011
Publication #:
Pub Dt:
10/27/2011
Title:
LOW LEAKAGE AND DATA RETENTION CIRCUITRY
85
Patent #:
Issue Dt:
11/19/2013
Application #:
13090427
Filing Dt:
04/20/2011
Publication #:
Pub Dt:
01/05/2012
Title:
MULTI-CHIP PACKAGE WITH THERMAL FRAME AND METHOD OF ASSEMBLING
86
Patent #:
Issue Dt:
05/27/2014
Application #:
13091465
Filing Dt:
04/21/2011
Publication #:
Pub Dt:
08/11/2011
Title:
BRIDGE DEVICE ARCHITECTURE FOR CONNECTING DISCRETE MEMORY DEVICES TO A SYSTEM
87
Patent #:
Issue Dt:
03/20/2012
Application #:
13091479
Filing Dt:
04/21/2011
Publication #:
Pub Dt:
08/11/2011
Title:
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Patent #:
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10/21/2014
Application #:
13094613
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04/26/2011
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12/22/2011
Title:
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Issue Dt:
05/12/2015
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Pub Dt:
12/22/2011
Title:
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90
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Issue Dt:
10/30/2012
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Filing Dt:
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Title:
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Patent #:
Issue Dt:
01/07/2014
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13099791
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Pub Dt:
05/24/2012
Title:
METHOD AND APPARATUS FOR SHARING INTERNAL POWER SUPPLIES IN INTEGRATED CIRCUIT DEVICES
92
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01/29/2013
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Filing Dt:
05/11/2011
Title:
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93
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09/03/2013
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Pub Dt:
12/29/2011
Title:
PHASE CHANGE MEMORY WORD LINE DRIVER
94
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10/23/2012
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Title:
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09/25/2012
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09/15/2011
Title:
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05/13/2014
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03/13/2012
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01/05/2012
Title:
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100
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13159060
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06/13/2011
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Pub Dt:
10/06/2011
Title:
DUAL FUNCTION COMPATIBLE NON-VOLATILE MEMORY DEVICE
Assignor
1
Exec Dt:
07/31/2018
Assignee
1
ONE QUEEN STREET EAST
TORONTO, CANADA M5C 2W5
Correspondence name and address
LATHAM & WATKINS LLP C/O ANGELA M. AMARU
885 THIRD AVENUE
NEW YORK, NY 10022

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