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Reel/Frame:	046683/0139			Pages:	67
		Recorded:	08/01/2018
Attorney Dkt #:	2068279-5062
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 1156
Page 9 of 12
Pages: 1 2 3 4 5 6 7 8 9 10 11 12

Patent #:	8823152	Issue Dt:	09/02/2014	Application #:	13181248	Filing Dt:	07/12/2011
Title:	SEMICONDUCTOR DEVICE WITH INCREASED I/O LEADFRAME

Patent #:	8653674	Issue Dt:	02/18/2014	Application #:	13233606	Filing Dt:	09/15/2011
Title:	ELECTRONIC COMPONENT PACKAGE FABRICATION METHOD AND STRUCTURE

Patent #:	8633598	Issue Dt:	01/21/2014	Application #:	13236916	Filing Dt:	09/20/2011
Title:	UNDERFILL CONTACTING STACKING BALLS PACKAGE FABRICATION METHOD AND STRUCTURE

Patent #:	8558365	Issue Dt:	10/15/2013	Application #:	13246564	Filing Dt:	09/27/2011
Title:	PACKAGE IN PACKAGE DEVICE FOR RF TRANSCEIVER MODULE

Patent #:	8866278	Issue Dt:	10/21/2014	Application #:	13270000	Filing Dt:	10/10/2011
Title:	SEMICONDUCTOR DEVICE WITH INCREASED I/O CONFIGURATION

Patent #:	9029962	Issue Dt:	05/12/2015	Application #:	13272096	Filing Dt:	10/12/2011
Title:	MOLDED CAVITY SUBSTRATE MEMS PACKAGE FABRICATION METHOD AND STRUCTURE

Patent #:	9123543	Issue Dt:	09/01/2015	Application #:	13274877	Filing Dt:	10/17/2011
Title:	SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Patent #:	8525322	Issue Dt:	09/03/2013	Application #:	13286005	Filing Dt:	10/31/2011
Title:	SEMICONDUCTOR PACKAGE HAVING A PLURALITY OF INPUT/OUTPUT MEMBERS

Patent #:	8828802	Issue Dt:	09/09/2014	Application #:	13286903	Filing Dt:	11/01/2011
Title:	WAFER LEVEL CHIP SCALE PACKAGE AND METHOD OF FABRICATING WAFER LEVEL CHIP SCALE PACKAGE

Patent #:	8227921	Issue Dt:	07/24/2012	Application #:	13290451	Filing Dt:	11/07/2011
Title:	SEMICONDUCTOR PACKAGE WITH INCREASED I/O DENSITY AND METHOD OF MAKING SAME

Patent #:	8552556	Issue Dt:	10/08/2013	Application #:	13302501	Filing Dt:	11/22/2011
Title:	WAFER LEVEL FAN OUT PACKAGE

Patent #:	8552548	Issue Dt:	10/08/2013	Application #:	13306685	Filing Dt:	11/29/2011
Title:	CONDUCTIVE PAD ON PROTRUDING THROUGH ELECTRODE SEMICONDUCTOR DEVICE

Patent #:	8552557	Issue Dt:	10/08/2013	Application #:	13327440	Filing Dt:	12/15/2011
Title:	ELECTRONIC COMPONENT PACKAGE FABRICATION METHOD AND STRUCTURE

Patent #:	8981537	Issue Dt:	03/17/2015	Application #:	13348304	Filing Dt:	01/11/2012
Publication #:	US20120104629	Pub Dt:	05/03/2012
Title:	REVERSIBLE TOP/BOTTOM MEMS PACKAGE

Patent #:	8994860	Issue Dt:	03/31/2015	Application #:	13350619	Filing Dt:	01/13/2012
Publication #:	US20120112042	Pub Dt:	05/10/2012
Title:	MOLDED IMAGE SENSOR PACKAGE AND METHOD

Patent #:	9153543	Issue Dt:	10/06/2015	Application #:	13356330	Filing Dt:	01/23/2012
Title:	SHIELDING TECHNIQUE FOR SEMICONDUCTOR PACKAGE INCLUDING METAL LID AND METALIZED CONTACT AREA

Patent #:	9362209	Issue Dt:	06/07/2016	Application #:	13356349	Filing Dt:	01/23/2012
Title:	SHIELDING TECHNIQUE FOR SEMICONDUCTOR PACKAGE INCLUDING METAL LID

Patent #:	8298866	Issue Dt:	10/30/2012	Application #:	13358947	Filing Dt:	01/26/2012
Title:	WAFER LEVEL PACKAGE AND FABRICATION METHOD

Patent #:	9721872	Issue Dt:	08/01/2017	Application #:	13398646	Filing Dt:	02/16/2012
Title:	METHODS AND STRUCTURES FOR INCREASING THE ALLOWABLE DIE SIZE IN TMV PACKAGES

Patent #:	8982577	Issue Dt:	03/17/2015	Application #:	13399321	Filing Dt:	02/17/2012
Title:	ELECTRONIC COMPONENT PACKAGE HAVING BLEED CHANNEL STRUCTURE AND METHOD

Patent #:	9704725	Issue Dt:	07/11/2017	Application #:	13412848	Filing Dt:	03/06/2012
Title:	SEMICONDUCTOR DEVICE WITH LEADFRAME CONFIGURED TO FACILITATE REDUCED BURR FORMATION

Patent #:	9406580	Issue Dt:	08/02/2016	Application #:	13420188	Filing Dt:	03/14/2012
Publication #:	US20120256280	Pub Dt:	10/11/2012
Title:	PACKAGING FOR FINGERPRINT SENSORS AND METHODS OF MANUFACTURE

Patent #:	9129943	Issue Dt:	09/08/2015	Application #:	13434181	Filing Dt:	03/29/2012
Title:	EMBEDDED COMPONENT PACKAGE AND FABRICATION METHOD

Patent #:	9048298	Issue Dt:	06/02/2015	Application #:	13434217	Filing Dt:	03/29/2012
Title:	BACKSIDE WARPAGE CONTROL STRUCTURE AND FABRICATION METHOD

Patent #:	8664090	Issue Dt:	03/04/2014	Application #:	13447650	Filing Dt:	04/16/2012
Title:	ELECTRONIC COMPONENT PACKAGE FABRICATION METHOD AND STRUCTURE

Patent #:	8986806	Issue Dt:	03/24/2015	Application #:	13452006	Filing Dt:	04/20/2012
Title:	WARPAGE CONTROL STIFFENER RING PACKAGE AND FABRICATION METHOD

Patent #:	9061884	Issue Dt:	06/23/2015	Application #:	13454881	Filing Dt:	04/24/2012
Title:	INTEGRATED CIRCUIT WITH EFFICIENT MEMS ARCHITECTURE

Patent #:	8802494	Issue Dt:	08/12/2014	Application #:	13454972	Filing Dt:	04/24/2012
Publication #:	US20130109135	Pub Dt:	05/02/2013
Title:	METHOD OF FABRICATING A SEMICONDUCTOR DEVICE HAVING AN INTERPOSER

Patent #:	8890329	Issue Dt:	11/18/2014	Application #:	13455539	Filing Dt:	04/25/2012
Publication #:	US20120273946	Pub Dt:	11/01/2012
Title:	SEMICONDUCTOR DEVICE

Patent #:	8786075	Issue Dt:	07/22/2014	Application #:	13458353	Filing Dt:	04/27/2012
Title:	ELECTRICAL CIRCUIT WITH COMPONENT-ACCOMMODATING LID

Patent #:	9025301	Issue Dt:	05/05/2015	Application #:	13459661	Filing Dt:	04/30/2012
Title:	WIRE FENCE FINGERPRINT SENSOR PACKAGE AND FABRICATION METHOD

Patent #:	9472494	Issue Dt:	10/18/2016	Application #:	13466717	Filing Dt:	05/08/2012
Publication #:	US20120299172	Pub Dt:	11/29/2012
Title:	LEAD FRAME FOR SEMICONDUCTOR DEVICE

Patent #:	8501543	Issue Dt:	08/06/2013	Application #:	13472961	Filing Dt:	05/16/2012
Title:	DIRECT-WRITE WAFER LEVEL CHIP SCALE PACKAGE

Patent #:	9433117	Issue Dt:	08/30/2016	Application #:	13475469	Filing Dt:	05/18/2012
Title:	SHIELD LID INTERCONNECT PACKAGE AND METHOD

Patent #:	8633575	Issue Dt:	01/21/2014	Application #:	13479829	Filing Dt:	05/24/2012
Title:	IC PACKAGE WITH INTEGRATED ELECTROSTATIC DISCHARGE PROTECTION

Patent #:	8629546	Issue Dt:	01/14/2014	Application #:	13487705	Filing Dt:	06/04/2012
Title:	STACKED REDISTRIBUTION LAYER (RDL) DIE ASSEMBLY PACKAGE

Patent #:	8368194	Issue Dt:	02/05/2013	Application #:	13487713	Filing Dt:	06/04/2012
Title:	EXPOSED DIE OVERMOLDED FLIP CHIP PACKAGE

Patent #:	8466545	Issue Dt:	06/18/2013	Application #:	13528199	Filing Dt:	06/20/2012
Title:	STACKABLE SEMICONDUCTOR PACKAGE

Patent #:	8704368	Issue Dt:	04/22/2014	Application #:	13528206	Filing Dt:	06/20/2012
Title:	STACKABLE VIA PACKAGE AND METHOD

Patent #:	8940587	Issue Dt:	01/27/2015	Application #:	13546870	Filing Dt:	07/11/2012
Title:	DIE SEAL DESIGN AND METHOD AND APPARATUS FOR INTEGRATED CIRCUIT PRODUCTION

Patent #:	8912051	Issue Dt:	12/16/2014	Application #:	13564567	Filing Dt:	08/01/2012
Title:	DESIGN AND METHOD FOR CONTROLLING MOLDING COMPOUND GEOMETRY AROUND A SEMICONDUCTOR DIE

Patent #:	9018743	Issue Dt:	04/28/2015	Application #:	13566082	Filing Dt:	08/03/2012
Publication #:	US20130039026	Pub Dt:	02/14/2013
Title:	SEMICONDUCTOR DEVICE

Patent #:	8426966	Issue Dt:	04/23/2013	Application #:	13569865	Filing Dt:	08/08/2012
Title:	BUMPED CHIP PACKAGE

Patent #:	9355981	Issue Dt:	05/31/2016	Application #:	13596322	Filing Dt:	08/28/2012
Publication #:	US20130037945	Pub Dt:	02/14/2013
Title:	SEMICONDUCTOR DEVICE

Patent #:	8946891	Issue Dt:	02/03/2015	Application #:	13603039	Filing Dt:	09/04/2012
Title:	MUSHROOM SHAPED BUMP ON REPASSIVATION

Patent #:	8941050	Issue Dt:	01/27/2015	Application #:	13608521	Filing Dt:	09/10/2012
Title:	PROCESSING SOLDERBRACE USING LIGHT WAVELENGTH FILTER AND A BROADBAND LIGHT SOURCE (As amended)

Patent #:	9041229	Issue Dt:	05/26/2015	Application #:	13608544	Filing Dt:	09/10/2012
Title:	MERGED FIDUCIAL FOR SEMICONDUCTOR CHIP PACKAGES

Patent #:	9269872	Issue Dt:	02/23/2016	Application #:	13614631	Filing Dt:	09/13/2012
Title:	MOLDED ELECTRONIC PACKAGE GEOMETRY TO CONTROL WARPAGE AND DIE STRESS

Patent #:	9349613	Issue Dt:	05/24/2016	Application #:	13614648	Filing Dt:	09/13/2012
Title:	Electronic Package With Embedded Materials in a Molded Structure to Control Warpage and Stress

Patent #:	8399348	Issue Dt:	03/19/2013	Application #:	13621076	Filing Dt:	09/15/2012
Publication #:	US20130012015	Pub Dt:	01/10/2013
Title:	SEMICONDUCTOR DEVICE FOR IMPROVING ELECTRICAL AND MECHANICAL CONNECTIVITY OF CONDUCTIVE PILLERS AND METHOD THEREFOR

Patent #:	8486764	Issue Dt:	07/16/2013	Application #:	13627815	Filing Dt:	09/26/2012
Title:	WAFER LEVEL PACKAGE AND FABRICATION METHOD

Patent #:	8853836	Issue Dt:	10/07/2014	Application #:	13662702	Filing Dt:	10/29/2012
Title:	INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING THE SAME

Patent #:	9337137	Issue Dt:	05/10/2016	Application #:	13663001	Filing Dt:	10/29/2012
Title:	METHOD AND SYSTEM FOR SOLDER SHIELDING OF BALL GRID ARRAYS

Patent #:	9324614	Issue Dt:	04/26/2016	Application #:	13663208	Filing Dt:	10/29/2012
Title:	THROUGH VIA NUB REVEAL METHOD AND STRUCTURE

Patent #:	8476748	Issue Dt:	07/02/2013	Application #:	13665295	Filing Dt:	10/31/2012
Title:	EXPOSED DIE OVERMOLDED FLIP CHIP PACKAGE AND FABRICATION METHOD

Patent #:	8796072	Issue Dt:	08/05/2014	Application #:	13678012	Filing Dt:	11/15/2012
Publication #:	US20140134803	Pub Dt:	05/15/2014
Title:	Method And System For A Semiconductor Device Package With A Die-To-Die First Bond

Patent #:	8802499	Issue Dt:	08/12/2014	Application #:	13678026	Filing Dt:	11/15/2012
Publication #:	US20140134800	Pub Dt:	05/15/2014
Title:	METHODS FOR TEMPORARY WAFER MOLDING FOR CHIP-ON-WAFER ASSEMBLY

Patent #:	9040349	Issue Dt:	05/26/2015	Application #:	13678046	Filing Dt:	11/15/2012
Publication #:	US20140134796	Pub Dt:	05/15/2014
Title:	Method And System For A Semiconductor Device Package With A Die To Interposer Wafer First Bond

Patent #:	9136159	Issue Dt:	09/15/2015	Application #:	13678058	Filing Dt:	11/15/2012
Publication #:	US20140134804	Pub Dt:	05/15/2014
Title:	METHOD AND SYSTEM FOR A SEMICONDUCTOR FOR DEVICE PACKAGE WITH A DIE-TO-PACKAGING SUBSTRATE FIRST BOND

Patent #:	9691635	Issue Dt:	06/27/2017	Application #:	13679627	Filing Dt:	11/16/2012
Title:	BUILDUP DIELECTRIC LAYER HAVING METALLIZATION PATTERN SEMICONDUCTOR PACKAGE FABRICATION METHOD

Patent #:	8753730	Issue Dt:	06/17/2014	Application #:	13680687	Filing Dt:	11/19/2012
Title:	MECHANICAL TAPE SEPARATION PACKAGE

Patent #:	8987050	Issue Dt:	03/24/2015	Application #:	13690817	Filing Dt:	11/30/2012
Title:	Method And System For Backside Dielectric Patterning For Wafer Warpage And Stress Control

Patent #:	8981550	Issue Dt:	03/17/2015	Application #:	13725645	Filing Dt:	12/21/2012
Publication #:	US20130214402	Pub Dt:	08/22/2013
Title:	SEMICONDUCTOR PACKAGE WITH ALTERNATING THERMAL INTERFACE AND ADHESIVE MATERIALS AND METHOD FOR MANUFACTURING THE SAME

Patent #:	9000586	Issue Dt:	04/07/2015	Application #:	13726917	Filing Dt:	12/26/2012
Publication #:	US20140131856	Pub Dt:	05/15/2014
Title:	SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Patent #:	8552539	Issue Dt:	10/08/2013	Application #:	13737325	Filing Dt:	01/09/2013
Title:	SHIELDED PACKAGE HAVING SHIELD LID

Patent #:	9524906	Issue Dt:	12/20/2016	Application #:	13738669	Filing Dt:	01/10/2013
Title:	SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Patent #:	8829678	Issue Dt:	09/09/2014	Application #:	13739547	Filing Dt:	01/11/2013
Publication #:	US20130328192	Pub Dt:	12/12/2013
Title:	SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME

Patent #:	9018741	Issue Dt:	04/28/2015	Application #:	13739565	Filing Dt:	01/11/2013
Publication #:	US20130154066	Pub Dt:	06/20/2013
Title:	SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Patent #:	9129975	Issue Dt:	09/08/2015	Application #:	13750022	Filing Dt:	01/25/2013
Publication #:	US20130277815	Pub Dt:	10/24/2013
Title:	METHOD OF FORMING A THIN SUBSTRATE CHIP SCALE PACKAGE DEVICE AND STRUCTURE

Patent #:	9029992	Issue Dt:	05/12/2015	Application #:	13750532	Filing Dt:	01/25/2013
Publication #:	US20130264694	Pub Dt:	10/10/2013
Title:	ELECTRONIC PACKAGE STRUCTURE WITH INSULATED ADHESION PORTION FOR AFFIXING AND ISOLATING LANDS SPACED APART FROM LAND CONNECT BAR WITHIN A LEADFRAME

Patent #:	NONE	Issue Dt:		Application #:	13753120	Filing Dt:	01/29/2013
Publication #:	US20140124949	Pub Dt:	05/08/2014
Title:	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Patent #:	9082833	Issue Dt:	07/14/2015	Application #:	13756167	Filing Dt:	01/31/2013
Title:	THROUGH VIA RECESSED REVEAL STRUCTURE AND METHOD

Patent #:	9219042	Issue Dt:	12/22/2015	Application #:	13758359	Filing Dt:	02/04/2013
Publication #:	US20140131886	Pub Dt:	05/15/2014
Title:	SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Patent #:	9362210	Issue Dt:	06/07/2016	Application #:	13763690	Filing Dt:	02/10/2013
Publication #:	US20130181335	Pub Dt:	07/18/2013
Title:	LEADFRAME AND SEMICONDUCTOR PACKAGE MADE USING THE LEADFRAME

Patent #:	8704369	Issue Dt:	04/22/2014	Application #:	13765152	Filing Dt:	02/12/2013
Title:	FLIP CHIP BUMP STRUCTURE AND FABRICATION METHOD

Patent #:	9245862	Issue Dt:	01/26/2016	Application #:	13765388	Filing Dt:	02/12/2013
Title:	ELECTRONIC COMPONENT PACKAGE FABRICATION METHOD AND STRUCTURE

Patent #:	9758372	Issue Dt:	09/12/2017	Application #:	13766171	Filing Dt:	02/13/2013
Title:	MEMS PACKAGE WITH MEMS DIE, MAGNET, AND WINDOW SUBSTRATE FABRICATION METHOD AND STRUCTURE

Patent #:	9670445	Issue Dt:	06/06/2017	Application #:	13793541	Filing Dt:	03/11/2013
Title:	MICROFLUIDICS SENSOR PACKAGE FABRICATION METHOD AND STRUCTURE

Patent #:	9332164	Issue Dt:	05/03/2016	Application #:	13837283	Filing Dt:	03/15/2013
Publication #:	US20130265486	Pub Dt:	10/10/2013
Title:	MOLDED SEMICONDUCTOR PACKAGE WITH SNAP LID

Patent #:	9159672	Issue Dt:	10/13/2015	Application #:	13861711	Filing Dt:	04/12/2013
Title:	THROUGH VIA CONNECTED BACKSIDE EMBEDDED CIRCUIT FEATURES STRUCTURE AND METHOD

Patent #:	9048125	Issue Dt:	06/02/2015	Application #:	13863457	Filing Dt:	04/16/2013
Publication #:	US20140138817	Pub Dt:	05/22/2014
Title:	SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Patent #:	8541260	Issue Dt:	09/24/2013	Application #:	13864750	Filing Dt:	04/17/2013
Title:	EXPOSED DIE OVERMOLDED FLIP CHIP PACKAGE AND FABRICATION METHOD

Patent #:	9449890	Issue Dt:	09/20/2016	Application #:	13892118	Filing Dt:	05/10/2013
Title:	METHODS FOR TEMPORARY BUSSING OF SEMICONDUCTOR PACKAGE SUBSTRATES

Patent #:	10242956	Issue Dt:	03/26/2019	Application #:	13894403	Filing Dt:	05/14/2013
Title:	SEMICONDUCTOR DEVICE WITH METAL DAM AND FABRICATING METHOD

Patent #:	10257942	Issue Dt:	04/09/2019	Application #:	13896710	Filing Dt:	05/17/2013
Title:	STACKABLE VARIABLE HEIGHT VIA PACKAGE AND METHOD

Patent #:	9368361	Issue Dt:	06/14/2016	Application #:	13901837	Filing Dt:	05/24/2013
Publication #:	US20130330931	Pub Dt:	12/12/2013
Title:	METHOD OF MAKING A SEMICONDUCTOR DEVICE

Patent #:	9484291	Issue Dt:	11/01/2016	Application #:	13903468	Filing Dt:	05/28/2013
Title:	ROBUST PILLAR STRUCTURE FOR SEMICONDCUTOR DEVICE CONTACTS

Patent #:	9496210	Issue Dt:	11/15/2016	Application #:	13912540	Filing Dt:	06/07/2013
Title:	STACKABLE PACKAGE AND METHOD

Patent #:	8691632	Issue Dt:	04/08/2014	Application #:	13918307	Filing Dt:	06/14/2013
Title:	WAFER LEVEL PACKAGE AND FABRICATION METHOD

Patent #:	8900995	Issue Dt:	12/02/2014	Application #:	13927964	Filing Dt:	06/26/2013
Title:	SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Patent #:	9056765	Issue Dt:	06/16/2015	Application #:	13937764	Filing Dt:	07/09/2013
Publication #:	US20140017843	Pub Dt:	01/16/2014
Title:	SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Patent #:	9054089	Issue Dt:	06/09/2015	Application #:	13949186	Filing Dt:	07/23/2013
Publication #:	US20140042605	Pub Dt:	02/13/2014
Title:	LEAD FRAME PACKAGE HAVING DISCHARGE HOLES AND METHOD OF MANUFACTURING THE SAME

Patent #:	9293403	Issue Dt:	03/22/2016	Application #:	13955422	Filing Dt:	07/31/2013
Publication #:	US20140061900	Pub Dt:	03/06/2014
Title:	SEMICONDUCTOR PACKAGE WITH IMPROVED REDISTRIBUTION LAYER DESIGN AND FABRICATING METHOD THEREOF

Patent #:	9406639	Issue Dt:	08/02/2016	Application #:	13962735	Filing Dt:	08/08/2013
Publication #:	US20140042600	Pub Dt:	02/13/2014
Title:	SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Patent #:	8946883	Issue Dt:	02/03/2015	Application #:	13963384	Filing Dt:	08/09/2013
Publication #:	US20140077366	Pub Dt:	03/20/2014
Title:	WAFER LEVEL FAN-OUT PACKAGE WITH A FIDUCIAL DIE

Patent #:	9462690	Issue Dt:	10/04/2016	Application #:	13963635	Filing Dt:	08/09/2013
Title:	FINE PITCH COPPER PILLAR PACKAGE AND METHOD

Patent #:	9162871	Issue Dt:	10/20/2015	Application #:	13969052	Filing Dt:	08/16/2013
Title:	METAL MESH LID MEMS PACKAGE AND METHOD

Patent #:	8847372	Issue Dt:	09/30/2014	Application #:	13972292	Filing Dt:	08/21/2013
Title:	EXPOSED DIE OVERMOLDED FLIP CHIP PACKAGE AND FABRICATION METHOD

Patent #:	9070675	Issue Dt:	06/30/2015	Application #:	13973492	Filing Dt:	08/22/2013
Publication #:	US20140070408	Pub Dt:	03/13/2014
Title:	Plating Structure For Wafer Level Packages

100

Patent #:	9117684	Issue Dt:	08/25/2015	Application #:	13974443	Filing Dt:	08/23/2013
Title:	SEMICONDUCTOR PACKAGE HAVING A PLURALITY OF INPUT/OUTPUT MEMBERS

Assignor

AMKOR TECHNOLOGY, INC.

Exec Dt:

07/13/2018

Assignee

BANK OF AMERICA, N.A., AS AGENT

333 SOUTH HOPE STREET

19TH FLOOR

LOS ANGELES, CALIFORNIA 90071

Correspondence name and address
	MCGUIREWOODS LLP
	1750 TYSONS BOULEVARD
	SUITE 1800
	TYSONS, VA 22102

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