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Patent #:
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Issue Dt:
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10/06/1992
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Application #:
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07622227
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Filing Dt:
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12/03/1990
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Title:
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Patent #:
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Issue Dt:
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04/20/1993
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Filing Dt:
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01/23/1991
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Title:
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Issue Dt:
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01/19/1993
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Filing Dt:
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08/08/1991
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Title:
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Patent #:
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12/15/1998
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Filing Dt:
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04/28/1992
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Title:
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Patent #:
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12/02/1997
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07/11/1994
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Title:
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Patent #:
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06/20/2000
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11/13/1995
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Patent #:
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02/04/1997
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Filing Dt:
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12/19/1995
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Title:
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Patent #:
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06/13/2000
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04/24/1997
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Title:
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Patent #:
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08/22/2000
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08845562
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Filing Dt:
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04/24/1997
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Title:
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MEDIA ACCESS CONTROL ARCHITECTURES AND NETWORK MANAGEMENT SYSTEMS
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Patent #:
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07/04/2000
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08845563
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Filing Dt:
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04/24/1997
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Title:
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MEDIA ACCESS CONTROL TRANSMITTER AND PARALLEL NETWORK MANAGEMENT SYSTEM
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Patent #:
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01/09/2001
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11/12/1997
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Title:
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MEDIA ACCESS CONTROL MICRO-RISC STREAM PROCESSOR AND METHOD FOR IMPLEMENTING THE SAME
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Patent #:
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Issue Dt:
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07/17/2001
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09047888
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03/25/1998
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Title:
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Patent #:
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04/23/2002
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09129662
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08/05/1998
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Title:
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Patent #:
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Issue Dt:
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01/23/2001
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09139252
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Filing Dt:
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08/25/1998
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Title:
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Patent #:
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Issue Dt:
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04/24/2001
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09/28/1998
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Title:
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Patent #:
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12/26/2000
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09179538
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10/26/1998
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Patent #:
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Issue Dt:
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09/05/2000
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Filing Dt:
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11/13/1998
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Title:
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Patent #:
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Issue Dt:
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03/07/2000
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09231101
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01/14/1999
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Patent #:
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04/17/2001
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02/08/1999
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07/04/2000
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02/23/1999
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Title:
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Patent #:
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05/08/2001
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09265725
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03/09/1999
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Patent #:
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05/15/2001
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09322738
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05/28/1999
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Patent #:
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04/02/2002
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07/01/1999
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Title:
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HIGH BANDWIDTH CLOCK BUFFER
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Patent #:
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Issue Dt:
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03/20/2001
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07/31/1999
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Title:
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MULTIPLE-PHASE-INTERPOLATION LC VOLTAGE-CONTROLLED OSCILLATOR
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09365189
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Filing Dt:
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08/02/1999
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Title:
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METHOD AND APPARATUS FOR GENERATING A TIME DELAYED SIGNAL WITH A MINIMUM DATA DEPENDENCY ERROR USING AN OSCILLATOR
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Patent #:
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Issue Dt:
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10/29/2002
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09376763
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Filing Dt:
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08/17/1999
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Title:
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MODULE BASED ADDRESS TRANSLATION ARRANGEMENT AND TRANSACTION OFFLOADING IN A DIGITAL SYSTEM
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Patent #:
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Issue Dt:
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10/08/2002
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09531277
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Filing Dt:
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03/20/2000
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Title:
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MULTIPLE CHANNEL ADAPTIVE DATA RECOVERY SYSTEM
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Patent #:
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Issue Dt:
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02/17/2004
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09586524
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Filing Dt:
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06/02/2000
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Title:
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REED-SOLOMON ENCODER AND DECODER
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Patent #:
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Issue Dt:
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05/18/2004
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09587150
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Filing Dt:
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06/02/2000
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Title:
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PRODUCT CODE BASED FORWARD ERROR CORRECTION SYSTEM
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Patent #:
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Issue Dt:
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10/14/2003
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Application #:
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09593264
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Filing Dt:
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06/13/2000
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Title:
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PULSE CODE SEQUENCE ANALYZER
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Patent #:
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05/21/2002
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09594745
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06/13/2000
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MEDIA ACCESS CONTROL ARCHITECTURES AND NETWORK MANAGEMENT SYSTEMS
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05/18/2004
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09680679
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10/06/2000
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Title:
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A CLOCK RECOVERY UNIT WHICH USES A DETECTED FREQUENCY DIFFERENCE SIGNAL TO HELP ESTABLISH PHASE LOCK BETWEEN A TRANSMITTED DATA SIGNAL AND A RECOVERED CLOCK SIGNAL
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06/17/2003
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09715847
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11/17/2000
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04/27/2004
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04/18/2001
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10/24/2002
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APPARATUS AND METHOD FOR ANGLED COAXIAL TO PLANAR STRUCTURE BROADBAND TRANSITION
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05/20/2003
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09850530
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05/07/2001
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11/07/2002
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Title:
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10/14/2003
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09865008
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05/24/2001
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08/08/2002
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Title:
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CLOCK BUFFER WITH DC OFFSET SUPPRESSION
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08/05/2003
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09870394
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05/30/2001
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12/05/2002
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10/26/2004
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06/04/2001
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04/25/2002
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PRODUCT CODE BASED FORWARD ERROR CORRECTION SYSTEM
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09/20/2005
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09878054
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06/06/2001
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02/21/2002
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06/07/2005
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09882582
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06/14/2001
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02/14/2002
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05/18/2004
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06/26/2001
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08/07/2003
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12/16/2003
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06/28/2001
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01/30/2003
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11/27/2007
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09/11/2001
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04/08/2003
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09955563
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09/17/2001
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01/18/2005
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09956609
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09/18/2001
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03/20/2003
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08/12/2003
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08/22/2002
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03/30/2004
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06/06/2002
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01/09/2007
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12/11/2001
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12/12/2002
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01/24/2006
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09/20/2005
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03/02/2004
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01/14/2002
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05/23/2002
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10/17/2006
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08/15/2002
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10/05/2004
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02/12/2002
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06/20/2002
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HIGH SPEED CROSS POINT SWITCH ROUTING CIRCUIT WITH WORD-SYNCHRONOUS SERIAL BACK PLANE
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02/03/2009
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02/25/2002
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11/14/2002
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06/12/2007
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10/17/2002
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07/18/2002
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10/08/2002
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03/14/2002
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08/01/2002
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05/18/2004
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04/10/2002
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10/16/2003
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01/16/2007
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02/20/2003
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08/30/2011
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11/21/2002
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07/27/2004
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11/13/2003
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08/02/2005
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05/17/2002
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12/12/2002
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05/06/2003
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05/29/2002
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04/03/2007
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02/01/2005
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09/11/2003
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02/07/2006
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02/13/2003
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12/21/2004
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04/29/2004
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06/12/2007
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02/14/2006
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Pub Dt:
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07/31/2003
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Title:
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APPARATUS AND METHOD FOR INTER-CHIP OR CHIP-TO-SUBSTRATE CONNECTION WITH A SUB-CARRIER
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10364075
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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SELF-ALIGNED BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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10/10/2006
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Application #:
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10411993
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Filing Dt:
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04/11/2003
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Publication #:
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Pub Dt:
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10/14/2004
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Title:
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ON-CHIP CALIBRATED SOURCE TERMINATION FOR VOLTAGE MODE DRIVER AND METHOD OF CALIBRATION THEREOF
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Patent #:
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Issue Dt:
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03/04/2008
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Application #:
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10428326
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Filing Dt:
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04/30/2003
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Title:
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GBIT/S TRANSCEIVER WITH BUILT-IN SELF TEST FEATURES
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Patent #:
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Issue Dt:
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04/21/2015
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Application #:
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10429267
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Filing Dt:
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05/02/2003
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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Packet forwarding method and system
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Patent #:
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Issue Dt:
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03/11/2008
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Application #:
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10617884
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Filing Dt:
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07/14/2003
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Publication #:
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Pub Dt:
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04/29/2004
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Title:
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MEANS AND A METHOD FOR SWITCHING DATA PACKETS OR FRAMES
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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10677123
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Filing Dt:
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09/30/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10721910
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Filing Dt:
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11/24/2003
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Publication #:
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Pub Dt:
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02/17/2005
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Title:
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METHOD OF OVERTONE SELECTION AND LEVEL CONTROL IN AN INTEGRATED CIRCUIT CMOS NEGATIVE RESISTANCE OSCILLATOR TO ACHIEVE LOW JITTER
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06/09/2009
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10724957
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12/01/2003
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Title:
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DATA LOOP PORT ACCELERATION CIRCUIT
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Patent #:
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Issue Dt:
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10/19/2010
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10754204
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01/09/2004
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Publication #:
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Pub Dt:
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07/14/2005
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Title:
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OUTPUT CLOCK ADJUSTMENT FOR A DIGITAL I/O BETWEEN PHYSICAL LAYER DEVICE AND MEDIA ACCESS CONTROLLER
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10754250
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Filing Dt:
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01/09/2004
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Publication #:
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Pub Dt:
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07/14/2005
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Title:
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SWITCHING MODE REGULATOR FOR SFP ETHERNET ADAPTOR
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Patent #:
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Issue Dt:
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09/23/2008
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10754256
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01/09/2004
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Publication #:
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Pub Dt:
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09/08/2005
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Title:
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METHOD FOR DETECTING LINK PARTNER STATE DURING AUTO NEGOTIATION AND SWITCHING LOCAL STATE TO ESTABLISH LINK
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Issue Dt:
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01/02/2007
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10810271
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03/26/2004
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Pub Dt:
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01/13/2005
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Title:
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METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED FEC ADAPTIVE EQUALIZATION
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Patent #:
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12/04/2007
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10841948
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05/06/2004
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Pub Dt:
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03/24/2005
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Title:
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OPTICAL DISPERSION CORRECTION IN TRANSIMPEDANCE AMPLIFIERS
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11/07/2006
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10852586
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05/24/2004
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07/13/2006
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Title:
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METHOD AND APPARATUS FOR CONFIGURING THE OPERATION OF AN INTEGRATED CIRCUIT
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Issue Dt:
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12/30/2008
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10872108
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06/17/2004
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Publication #:
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Pub Dt:
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12/22/2005
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Title:
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POWER AND AREA EFFICIENT ADAPTIVE EQUALIZATION
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11/28/2006
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10872307
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06/17/2004
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Pub Dt:
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12/22/2005
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Title:
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INTEGRATED CIRCUIT IMPLEMENTATION FOR POWER AND AREA EFFICIENT ADAPTIVE EQUALIZATION
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04/12/2011
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11029297
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01/04/2005
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Pub Dt:
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07/06/2006
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Title:
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ADAPTIVE EQUALIZATION WITH GROUP DELAY
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02/02/2010
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11060061
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02/16/2005
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03/02/2006
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Title:
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VARIABLE BANDWIDTH TRANSIMPEDANCE AMPLIFIER WITH ONE-WIRE INTERFACE
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07/29/2008
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11218331
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09/01/2005
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06/15/2006
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DATA DE-SKEW METHOD AND SYSTEM
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04/14/2009
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11221609
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09/07/2005
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Title:
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DIGITAL AUTOMATIC POWER CONTROL LOOP FOR CONTINUOUS AND BURST MODE APPLICATIONS
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06/26/2007
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11231320
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09/20/2005
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Pub Dt:
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05/11/2006
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Title:
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CROSSPOINT SWITCH WITH SWITCH MATRIX MODULE
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06/05/2007
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11330497
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01/11/2006
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DIFFERENTIAL OPTO-ELECTRONICS TRANSMITTER
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12/22/2009
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11508361
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08/22/2006
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02/28/2008
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MAINTAINING FILTERING DATABASE CONSISTENCY
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02/19/2008
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11555168
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10/31/2006
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09/13/2007
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HIGH-SPEED DATA INTERFACE FOR CONNECTING NETWORK DEVICES
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06/15/2010
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11943569
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11/20/2007
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10/23/2008
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METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
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NONE
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12029195
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02/11/2008
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08/13/2009
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SYSTEM AND METHOD FOR DETECTING EARLY LINK FAILURE IN AN ETHERNET NETWORK
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05/15/2012
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12029230
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02/11/2008
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08/13/2009
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SYSTEM AND METHOD FOR SQUELCHING A RECOVERED CLOCK IN AN ETHERNET NETWORK
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11/23/2010
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12207321
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09/09/2008
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03/11/2010
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FUSES FOR MEMORY REPAIR
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10/26/2010
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12239418
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09/26/2008
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04/01/2010
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DIFFERENTIAL VOLTAGE MODE DRIVER AND DIGITAL IMPEDANCE CALIBERATION OF SAME
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09/25/2012
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12270774
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11/13/2008
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05/13/2010
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CONTINUOUSLY INTERLEAVED ERROR CORRECTION
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04/22/2014
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12366544
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02/05/2009
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11/05/2009
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ADAPTIVE DATA RECOVERY SYSTEM WITH INPUT SIGNAL EQUALIZATION
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