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Reel/Frame:028407/0179   Pages: 16
Recorded: 06/14/2012
Attorney Dkt #:TIPI 5.2-025
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT NAME OF CONVEYING PARTIES PREVIOUSLY RECORDED ON REEL 026725, FRAME 0852.
Total properties: 34
1
Patent #:
Issue Dt:
02/28/1995
Application #:
07991769
Filing Dt:
12/17/1992
Title:
CIRCUIT FOR ELIMINATING OFF-CHIP TO ON-CHIP CLOCK SKEW
2
Patent #:
Issue Dt:
09/17/1996
Application #:
08042306
Filing Dt:
04/02/1993
Title:
CACHING FIFO AND METHOD THEREFOR
3
Patent #:
Issue Dt:
06/13/1995
Application #:
08142839
Filing Dt:
10/25/1993
Title:
METHOD OF MAKING AN INTEGRATED CIRCUIT WITH VARIABLE PAD PITCH
4
Patent #:
Issue Dt:
07/09/1996
Application #:
08298989
Filing Dt:
08/31/1994
Title:
DIGITAL COMPUTER SYSTEM HAVING AN IMPROVED DIRECT-MAPPED CACHE CONTROLLER (WITH FLAG MODIFICATION) FOR A CPU WITH ADDRES PIPELINING AND METHOD THEREFOR
5
Patent #:
Issue Dt:
12/17/1996
Application #:
08315465
Filing Dt:
09/30/1994
Title:
ARITHMETIC LOGIC UNIT WITH ZERO SUM PREDICTION
6
Patent #:
Issue Dt:
01/28/1997
Application #:
08328939
Filing Dt:
10/25/1994
Title:
ELECTRICALLY AND THERMALLY ENHANCED PACKAGE USING A SEPARATE SILICON SUBSTRATE
7
Patent #:
Issue Dt:
03/11/1997
Application #:
08415183
Filing Dt:
04/03/1995
Title:
INTEGRATED CIRCUIT WITH VARIABLE PAD PITCH
8
Patent #:
Issue Dt:
02/18/1997
Application #:
08653010
Filing Dt:
05/24/1996
Title:
ARITHMETIC LOGIC UNIT WITH ZERO-RESULT PREDICTION
9
Patent #:
Issue Dt:
06/16/1998
Application #:
08705356
Filing Dt:
08/29/1996
Title:
SYSTEM AND METHOD FOR ALTERING THE CLOCK FREQUENCY TO A LOGIC CONTROLLER CONTROLLING A LOGIC DEVICE RUNNING AT A FIXED FREQUENCY SLOWER THAN A COMPUTER SYSTEM RUNNING THE LOGIC DEVICE
10
Patent #:
Issue Dt:
08/17/1999
Application #:
08719149
Filing Dt:
09/24/1996
Title:
SCAN FLIP-FLOP AND METHODS FOR CONTROLLING THE ENTRY OF DATA THEREIN
11
Patent #:
Issue Dt:
04/21/1998
Application #:
08773099
Filing Dt:
12/24/1996
Title:
INTEGRATED CIRCUIT WITH VARIABLE PAD PITCH
12
Patent #:
Issue Dt:
04/25/2000
Application #:
09116768
Filing Dt:
07/16/1998
Title:
SEMICONDUCTOR DEVICE ASSEMBLIES AND CIRCUITS
13
Patent #:
Issue Dt:
03/06/2001
Application #:
09121957
Filing Dt:
07/24/1998
Title:
CMOS WAVESHAPING BUFFER
14
Patent #:
Issue Dt:
10/30/2001
Application #:
09215019
Filing Dt:
12/17/1998
Title:
HIGH PERFORMANCE CHIP/PACKAGE INDUCTOR INTEGRATION
15
Patent #:
Issue Dt:
11/27/2001
Application #:
09275370
Filing Dt:
03/24/1999
Title:
DATA CARRIER HAVING AN IMPLANTED MODULE BASED ON A METAL LEAD FRAME
16
Patent #:
Issue Dt:
03/16/2004
Application #:
09351053
Filing Dt:
07/12/1999
Publication #:
Pub Dt:
12/13/2001
Title:
BUFFERING SYSTEM BUS FOR EXTERNAL-MEMORY ACCESS
17
Patent #:
Issue Dt:
03/01/2005
Application #:
09505985
Filing Dt:
02/16/2000
Title:
SYSTEM AND METHOD FOR ELIMINATING WRITE BACK TO REGISTER USING DEAD FIELD INDICATOR
18
Patent #:
Issue Dt:
02/01/2005
Application #:
09505986
Filing Dt:
02/16/2000
Title:
SYSTEM AND METHOD FOR ELIMINATING WRITE BACKS WITH BUFFER FOR EXCEPTION PROCESSING
19
Patent #:
Issue Dt:
07/23/2002
Application #:
09671889
Filing Dt:
09/28/2000
Title:
SEMICONDUCTOR DEVICES CONFIGURED TO TOLERATE CONNETION MISALIGNMENT
20
Patent #:
Issue Dt:
05/11/2004
Application #:
09891449
Filing Dt:
06/26/2001
Publication #:
Pub Dt:
01/31/2002
Title:
INTEGRATED CIRCUIT WITH FLASH MEMORY INCLUDING DEDICATED FLASH BUS AND FLASH BRIDGE
21
Patent #:
Issue Dt:
03/30/2004
Application #:
09947430
Filing Dt:
09/05/2001
Publication #:
Pub Dt:
02/14/2002
Title:
HIGH PERFORMANCE CHIP/PACKAGE INDUCTOR INTEGRATION
22
Patent #:
Issue Dt:
05/04/2004
Application #:
10294011
Filing Dt:
11/12/2002
Publication #:
Pub Dt:
05/13/2004
Title:
FOLDED-FLEX BONDWIRE-LESS MULTICHIP POWER PACKAGE
23
Patent #:
Issue Dt:
01/12/2010
Application #:
10381216
Filing Dt:
09/02/2003
Publication #:
Pub Dt:
09/29/2005
Title:
PROCESSOR BUS ARRANGEMENT
24
Patent #:
Issue Dt:
07/17/2007
Application #:
10478269
Filing Dt:
11/17/2003
Publication #:
Pub Dt:
09/09/2004
Title:
LEAD-FRAME CONFIGURATION FOR CHIPS
25
Patent #:
Issue Dt:
11/18/2008
Application #:
10525804
Filing Dt:
02/25/2005
Publication #:
Pub Dt:
10/20/2005
Title:
VERSION-PROGRAMMABLE CIRCUIT MODULE
26
Patent #:
Issue Dt:
04/22/2008
Application #:
10534165
Filing Dt:
05/05/2005
Publication #:
Pub Dt:
07/20/2006
Title:
DATA CARRIER WITH A MODULE WITH A REINFORCEMENT STRIP
27
Patent #:
Issue Dt:
08/25/2009
Application #:
10538281
Filing Dt:
06/10/2005
Publication #:
Pub Dt:
01/26/2006
Title:
WIREBONDING METHOD AND APPARATUS
28
Patent #:
Issue Dt:
07/24/2007
Application #:
10538378
Filing Dt:
06/13/2005
Publication #:
Pub Dt:
05/25/2006
Title:
COARSE DELAY TUNER CIRCUITS WITH EDGE SUPPRESSORS IN DELAY LOCKED LOOPS
29
Patent #:
Issue Dt:
03/18/2008
Application #:
10566552
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
08/24/2006
Title:
INTERGRATED CIRCUIT WITH DYNAMIC COMMUNICATION SERVICE SELECTION
30
Patent #:
Issue Dt:
11/04/2008
Application #:
10576570
Filing Dt:
04/19/2006
Publication #:
Pub Dt:
06/28/2007
Title:
METHOD AND SYSTEM FOR POWERING AN INTEGRATED CIRCUIT
31
Patent #:
Issue Dt:
04/01/2008
Application #:
11165859
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
01/11/2007
Title:
HIERARCHICAL MEMORY ACCESS VIA PIPELINING WITH DEFERRED ARBITRATION
32
Patent #:
Issue Dt:
09/29/2009
Application #:
11575068
Filing Dt:
03/09/2007
Publication #:
Pub Dt:
12/25/2008
Title:
INTERCONNECTIONS IN SIMD PROCESSOR ARCHITECTURES
33
Patent #:
Issue Dt:
03/02/2010
Application #:
11817019
Filing Dt:
04/22/2008
Publication #:
Pub Dt:
10/30/2008
Title:
INTEGRATED CIRCUIT PACKAGE DEVICE WITH IMPROVED BOND PAD CONNECTIONS, A LEAD-FRAME AND AN ELECTRONIC DEVICE
34
Patent #:
Issue Dt:
07/02/2013
Application #:
12506065
Filing Dt:
07/20/2009
Publication #:
Pub Dt:
11/12/2009
Title:
WIREBONDING METHOD AND APPARATUS
Assignor
1
Exec Dt:
06/30/2011
Assignee
1
3025 ORCHARD PARKWAY
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
DARLY K. NEFF
LERNER, DAVID, LITTENBERG, KRUMHOLZ & MENTLIK, LLP
600 SOUTH AVENUE WEST
WESTFIELD, NJ 07090

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