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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08360331
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Filing Dt:
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12/21/1994
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Title:
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METHOD AND APPARATUS FOR TRANSFERRING INFORMATION BETWEEN A PROCESSOR AND A MEMORY SYSTEM
|
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|
|
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Patent #:
|
|
Issue Dt:
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11/03/1998
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Application #:
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08550777
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Filing Dt:
|
10/31/1995
|
|
Title:
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METHOD AND APPARATUS FOR MAINTAINING CACHE COHERENCY USING A SINGLE CONTROLLER FOR MULTIPLE CACHE MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
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Application #:
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08673452
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Filing Dt:
|
06/28/1996
|
|
Title:
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ADJUSTING CLOCK FREQUENCY AND VOLTAGE SUPPLIED TO A PROCESSOR IN A COMPUTER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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05/11/1999
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Application #:
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08731546
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Filing Dt:
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10/15/1996
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Title:
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METHOD AND APPARATUS FOR MAINTAINING CACHE COHERENCY USING A SINGLE CONTROLLER FOR MULTIPLE CACHE MEMORIES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/1997
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Application #:
|
08757959
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Filing Dt:
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11/25/1996
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|
Title:
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MEMORY SUBSYSTEM WHEREIN A SINGLE PROCESSOR CHIP CONTROLS MULTIPLE CACHE MEMORY CHIPS
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|
|
|
Patent #:
|
|
Issue Dt:
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09/15/1998
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Application #:
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08822044
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Filing Dt:
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03/24/1997
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|
Title:
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METHOD AND APPARATUS FOR CACHE MEMORY REPLACEMENT LINE INDENTIFICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2001
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Application #:
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08851845
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Filing Dt:
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05/06/1997
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|
Title:
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PROCESSOR-CACHE PROTOCOL USING SIMPLE COMMANDS TO IMPLEMENT A RANGE OF CACHE CONFIGURATIONS
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Patent #:
|
|
Issue Dt:
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10/12/1999
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Application #:
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08891303
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Filing Dt:
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07/10/1997
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|
Title:
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METHOD AND APPARATUS FOR CONTROLLING MULTIPLE DICE WITH A SINGLE DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
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Application #:
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08940865
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Filing Dt:
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09/30/1997
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|
Publication #:
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Pub Dt:
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08/02/2001
| | | | |
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Title:
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SOFTWARE-CONTROLLED CACHE MEMORY COMPARTMENTALIZATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
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05/07/2002
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Application #:
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08990526
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Filing Dt:
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12/15/1997
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|
Title:
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METHOD AND APPARATUS FOR LIMITING PROCESSOR CLOCK FREQUENCY
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|
|
|
|
Patent #:
|
|
Issue Dt:
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03/27/2001
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Application #:
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08999242
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Filing Dt:
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12/29/1997
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|
Title:
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READ LINE BUFFER AND SIGNALING PROTOCOL FOR PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
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Application #:
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09052749
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Filing Dt:
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03/31/1998
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Title:
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METHOD AND APPARATUS FOR SELF-CALIBRATION AND FIXED-PATTERN NOISE REMOVAL IN IMAGER INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2001
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Application #:
|
09151177
|
Filing Dt:
|
09/10/1998
|
|
Title:
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METHOD AND APPARATUS FOR REDUCING STANDBY LEAKAGE CURRENT USING A TRANSISTOR STACK EFFECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2001
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Application #:
|
09151827
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Filing Dt:
|
09/11/1998
|
|
Publication #:
|
|
Pub Dt:
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01/03/2002
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|
Title:
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METHOD AND APPARATUS FOR REDUCING STANDBY LEAKAGE CURRENT USING A LEAKAGE CONTROL TRANSISTOR THAT RECEIVES BOOSTED GATE DRIVE DURING AN ACTIVE MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2001
|
Application #:
|
09204896
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Filing Dt:
|
12/03/1998
|
|
Publication #:
|
|
Pub Dt:
|
06/07/2001
| | | | |
|
Title:
|
MANAGING A SYSTEM'S PERFORMANCE STATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2002
|
Application #:
|
09205647
|
Filing Dt:
|
12/03/1998
|
|
Title:
|
SPECULATIVE REQUEST POINTER ADVANCE FOR FAST BACK-TO-BACK READS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
|
Application #:
|
09210641
|
Filing Dt:
|
12/14/1998
|
|
Title:
|
SNOOP BLOCKING FOR CACHE COHERENCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
09212023
|
Filing Dt:
|
12/16/1998
|
|
Title:
|
METHOD AND DEVICE FOR FILTERING EVENTS IN AN EVENT NOTIFICATION SERVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09223297
|
Filing Dt:
|
12/30/1998
|
|
Title:
|
METHOD AND SYSTEM FOR BYPASSING A FILL BUFFER LOCATED ALONG A FIRST INSTRUCTION PATH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09224573
|
Filing Dt:
|
12/30/1998
|
|
Publication #:
|
|
Pub Dt:
|
03/07/2002
| | | | |
|
Title:
|
SOFTWARE CONTROL OF TRANSISTOR BODY BIAS IN CONTROLLING CHIP PARAMETERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2002
|
Application #:
|
09281237
|
Filing Dt:
|
03/30/1999
|
|
Title:
|
PROGRAMMABLE THERMAL MANAGEMENT OF AN INTEGRATED CIRCUIT DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2002
|
Application #:
|
09302168
|
Filing Dt:
|
04/29/1999
|
|
Title:
|
CIRCUIT FOR I/O CLOCK GENERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09302729
|
Filing Dt:
|
04/30/1999
|
|
Title:
|
INTEGRATED CIRCUIT LOW LEAKAGE POWER CIRCUITRY FOR USE WITH AN ADVANCED CMOS PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
|
09316683
|
Filing Dt:
|
05/21/1999
|
|
Title:
|
PROCESSOR SYSTEM WITH POWER SUPPLY SELECTION MECHANISM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
09371751
|
Filing Dt:
|
08/10/1999
|
|
Title:
|
SYSTEM AND METHOD FOR DYNAMICALLY ADJUSTING TO CPU PERFORMANCE CHANGES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2003
|
Application #:
|
09434973
|
Filing Dt:
|
11/05/1999
|
|
Title:
|
SLEEP STATE TRANSITIONING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
09461395
|
Filing Dt:
|
12/15/1999
|
|
Title:
|
ERROR CHARACTER GENERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
09465520
|
Filing Dt:
|
12/16/1999
|
|
Title:
|
METHOD AND APPARATUS THAT COMPENSATES FOR PHASE SHIFT MASK MANUFACTURING DEFECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09467342
|
Filing Dt:
|
12/20/1999
|
|
Title:
|
RADIO-FREQUENCY MIXER FOR WIRELESS APPLICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09470274
|
Filing Dt:
|
12/22/1999
|
|
Title:
|
CACHE STATES FOR MULTIPROCESSOR CACHE COHERENCY PROTOCOLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09470541
|
Filing Dt:
|
12/22/1999
|
|
Title:
|
ARBITRATING COMMAND REQUESTS IN A PARALLEL MULTI-THREADED PROCESSING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
09474182
|
Filing Dt:
|
12/29/1999
|
|
Title:
|
ADDRESSING OF MONOLITHIC TEXTURE MAPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09534187
|
Filing Dt:
|
03/24/2000
|
|
Title:
|
METHOD AND APPARATUS TO CONTROL PROCESSOR POWER AND PERFORMANCE FOR SINGLE PHASE LOCK LOOP (PLL) PROCESSOR SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
09603451
|
Filing Dt:
|
06/23/2000
|
|
Title:
|
METHOD AND APPARATUS FOR MOBILE DEVICE LOCATION VIA A NETWORK BASED LOCAL AREA AUGMENTATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
|
Application #:
|
09606848
|
Filing Dt:
|
06/28/2000
|
|
Title:
|
SNOOP FILTER LINE REPLACEMENT FOR REDUCTION OF BACK INVALIDATES IN MULTI-NODE ARCHITECTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2002
|
Application #:
|
09676728
|
Filing Dt:
|
09/29/2000
|
|
Title:
|
METHOD AND APPARATUS FOR INTEGRATED CIRCUIT POWER UP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09717465
|
Filing Dt:
|
11/20/2000
|
|
Title:
|
METHOD AND APPARATUS FOR FULLY-DIFFERENTIAL HALF-CIRCULATOR FOR BI-DIRECTIONAL SMALL-SIGNAL SIGNALING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
09733821
|
Filing Dt:
|
12/07/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
LOW-POWER PROCESSOR HINT, SUCH AS FROM A PAUSE INSTRUCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09739930
|
Filing Dt:
|
12/18/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/20/2002
| | | | |
|
Title:
|
METHOD OF COPPER ELECTROPLATING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
09746089
|
Filing Dt:
|
02/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
|
Title:
|
EXTERNAL ATTACHED HEAT SINK FOLD OUT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
09750839
|
Filing Dt:
|
12/28/2000
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
WAFER POLISHING PAD CENTERING APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2004
|
Application #:
|
09751530
|
Filing Dt:
|
12/29/2000
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
DYNAMICALLY CHANGING THE PERFORMANCE OF DEVICES IN A COMPUTER PLATFORM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
09752627
|
Filing Dt:
|
12/29/2000
|
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
|
Title:
|
COMPUTER PERIPHERAL DEVICE THAT REMAINS OPERABLE WHEN CENTRAL PROCESSOR OPERATIONS ARE SUSPENDED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
09784255
|
Filing Dt:
|
02/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2001
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR THERMAL MANAGEMENT OF AN INTEGRATED CIRCUIT DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09852442
|
Filing Dt:
|
05/09/2001
|
|
Title:
|
DOUBLE DATA RATE DYNAMIC LOGIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09887069
|
Filing Dt:
|
06/25/2001
|
|
Title:
|
THERMAL MANAGEMENT SYSTEM FOR A MULTIPLE PROCESSOR COMPUTER APPLIANCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
09899659
|
Filing Dt:
|
07/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
UPLOADING PERSONAL AGENTS TO PERSONALIZE NETWORK SERVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
09968565
|
Filing Dt:
|
09/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR ADJUSTING THE VOLTAGE AND FREQUENCY TO MINIMIZE POWER DISSIPATION IN A MULTIPROCESSOR SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2005
|
Application #:
|
10027939
|
Filing Dt:
|
12/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR ENABLING A LOW POWER MODE FOR A PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10033337
|
Filing Dt:
|
12/26/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
ACTIVE LEAKAGE CONTROL IN SINGLE-ENDED FULL-SWING CACHES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
10041092
|
Filing Dt:
|
12/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2003
| | | | |
|
Title:
|
DIGITAL THROTTLE FOR MULTIPLE OPERATING POINTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
10046768
|
Filing Dt:
|
01/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
PSEUDO LEAST-RECENTLY-USED (PLRU) REPLACEMENT METHOD FOR A MULTI-NODE SNOOP FILTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2003
|
Application #:
|
10051051
|
Filing Dt:
|
01/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR LIMITING PROCESSOR CLOCK FREQUENCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
10097055
|
Filing Dt:
|
03/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
|
Title:
|
SET PARTITIONING FOR CACHES MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10099099
|
Filing Dt:
|
03/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
|
Title:
|
ADAPTIVE RECEIVER FOR MULTIPLEX/MULTI-ACCESS COMMUNICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
10109762
|
Filing Dt:
|
03/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/02/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR TESTING A CIRCUIT USING A DIE FRAME LOGIC ANALYZER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10121922
|
Filing Dt:
|
04/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
A METHOD AND AN APPARATUS FOR REDUCTION OF QOS IMPAIRMENTS IN MULTI-MEDIA SERVICES DURING HAND-OVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2005
|
Application #:
|
10138345
|
Filing Dt:
|
05/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/06/2003
| | | | |
|
Title:
|
ALTERING OPERATING FREQUENCY AND VOLTAGE SET POINT OF A CIRCUIT IN RESPONSE TO THE OPERATING TEMPERATURE AND INSTANTANEOUS OPERATING VOLTAGE OF THE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10141829
|
Filing Dt:
|
05/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR LOADING AND INTEGRATING A FIRMWARE EXTENSION ONTO EXECUTABLE BASE SYSTEM FIRMWARE DURING INITIALIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10159536
|
Filing Dt:
|
05/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR REDUCING THE POWER CONSUMED BY A COMPUTER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10165379
|
Filing Dt:
|
06/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
|
Title:
|
METHOD FOR ELIMINATING REDUNDANT METHOD CALLS IN AN OBJECT ORIENTED PROGRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
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10178608
|
Filing Dt:
|
06/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2003
| | | | |
|
Title:
|
IDENTIFYING PURE POINTERS TO DISAMBIGUATE MEMORY REFERENCES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2003
|
Application #:
|
10194617
|
Filing Dt:
|
07/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS TO CONTROL PROCESSOR POWER AND PERFORMANCE FOR SINGLE PHASE LOCK LOOP (PLL) PROCESSOR SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10207262
|
Filing Dt:
|
07/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
|
Title:
|
DETECTING DEADLOCKS IN MULTITHREADED PROGRAMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
10215599
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
SNOOP BLOCKING FOR CACHE COHERENCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2005
|
Application #:
|
10226478
|
Filing Dt:
|
08/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR SHARED CACHE COHERENCY FOR A CHIP MULTIPROCESSOR OR MULTIPROCESSOR SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2005
|
Application #:
|
10227125
|
Filing Dt:
|
08/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
|
Title:
|
APPARATUS FOR THERMAL MANAGEMENT OF MULTIPLE CORE MICROPROCESSORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10272149
|
Filing Dt:
|
10/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR PERFORMANCE EFFECTIVE POWER THROTTLING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10272154
|
Filing Dt:
|
10/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
|
Title:
|
METHOD AND APPARATUS TO DYNAMICALLY CHANGE AN OPERATING FREQUENCY AND OPERATING VOLTAGE OF AN ELECTRONIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
10278400
|
Filing Dt:
|
10/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/29/2004
| | | | |
|
Title:
|
CONTROLLING THE TIMING OF TEST MODES IN A MULTIPLE PROCESSOR SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
|
Application #:
|
10307146
|
Filing Dt:
|
11/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/03/2004
| | | | |
|
Title:
|
METHOD FOR MANAGING VIRTUAL AND ACTUAL PERFORMANCE STATES OF LOGICAL PROCESSORS IN A MULTITHREADED PROCESSOR USING SYSTEM MANAGEMENT MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2006
|
Application #:
|
10335111
|
Filing Dt:
|
12/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/01/2004
| | | | |
|
Title:
|
ACTIVE STATE LINK POWER MANAGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
10339221
|
Filing Dt:
|
01/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
PARALLEL MULTI-THREADED PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10352946
|
Filing Dt:
|
01/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SNOOP BLOCKING FOR CACHE COHERENCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2004
|
Application #:
|
10361542
|
Filing Dt:
|
02/10/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
CACHE STATES FOR MULTIPROCESSOR CACHE COHERENCY PROTOCOLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10386749
|
Filing Dt:
|
03/12/2003
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
|
Title:
|
METHOD OF INITIALIZING A MEMORY CONTROLLER BY EXECUTING SOFTWARE IN A SECOND MEMORY TO WAKE UP A SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2004
|
Application #:
|
10413905
|
Filing Dt:
|
04/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
|
Title:
|
SNOOP FILTER LINE REPLACEMENT FOR REDUCTION OF BACK INVALIDATES IN MULTI-NODE ARCHITECTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10421204
|
Filing Dt:
|
04/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
|
Title:
|
FILTER BASED THROTTLING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
10424084
|
Filing Dt:
|
04/25/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
|
Title:
|
METHOD FOR READ ONCE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2006
|
Application #:
|
10461038
|
Filing Dt:
|
06/13/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/16/2004
| | | | |
|
Title:
|
POWER MANAGEMENT FOR CLUSTERED COMPUTING PLATFORMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2010
|
Application #:
|
10609814
|
Filing Dt:
|
06/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/30/2004
| | | | |
|
Title:
|
A METHOD TO REMOVE STALE BRANCH PREDICTIONS FOR AN INSTRUCTION PRIOR TO EXECUTION WITHIN A MICROPROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2006
|
Application #:
|
10640752
|
Filing Dt:
|
08/13/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR LIMITING PROCESSOR CLOCK FREQUENCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10654847
|
Filing Dt:
|
09/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
METHODS AND APPARATUS TO ENABLE CONSOLE REDIRECTION IN A MULTIPLE EXECUTION ENVIRONMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
10684770
|
Filing Dt:
|
10/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/12/2005
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR ALLOCATING REGISTER LOCATIONS IN A MEMORY DURING COMPILATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
10696469
|
Filing Dt:
|
10/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/28/2005
| | | | |
|
Title:
|
METHOD, SYSTEM, AND APPARATUS FOR DYNAMICALLY CONFIGURING THE OPERATING POINT UTILIZED FOR THERMAL MANAGEMENT OF AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
10718102
|
Filing Dt:
|
11/19/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/19/2005
| | | | |
|
Title:
|
WAFER REUSE TECHNIQUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10738216
|
Filing Dt:
|
12/18/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/23/2005
| | | | |
|
Title:
|
METHOD AND APPARATUS TO CLAMP SRAM SUPPLY VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
10745428
|
Filing Dt:
|
12/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/23/2005
| | | | |
|
Title:
|
OFFSET CANCELLATION AND SLICE ADJUST AMPLIFIER CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10759455
|
Filing Dt:
|
01/16/2004
|
|
Publication #:
|
|
Pub Dt:
|
07/29/2004
| | | | |
|
Title:
|
LOW-POWER PROCESSOR HINT, SUCH AS FROM A PAUSE INSTRUCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2005
|
Application #:
|
10821292
|
Filing Dt:
|
04/09/2004
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR THERMAL MANAGEMENT OF AN INTEGRATED CIRCUIT DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10821822
|
Filing Dt:
|
04/09/2004
|
|
Publication #:
|
|
Pub Dt:
|
10/07/2004
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR THERMAL MANAGEMENT OF AN INTEGRATED CIRCUIT DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2007
|
Application #:
|
10855268
|
Filing Dt:
|
05/26/2004
|
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
|
Title:
|
METHOD AND APPARATUS TO DYNAMICALLY CHANGE AN OPERATING FREQUENCY AND OPERATING VOLTAGE OF AN ELECTRONIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
10880978
|
Filing Dt:
|
06/29/2004
|
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
|
Title:
|
SYSTEMS AND METHODS FOR PROVISIONING AND TRACKING A COMMUNICATION PLATFORM WITH A RADIO-FREQUENCY TAG
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
10881607
|
Filing Dt:
|
06/29/2004
|
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
|
Title:
|
PUSHING OF CLEAN DATA TO ONE OR MORE PROCESSORS IN A SYSTEM HAVING A COHERENCY PROTOCOL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
10934034
|
Filing Dt:
|
09/03/2004
|
|
Publication #:
|
|
Pub Dt:
|
03/09/2006
| | | | |
|
Title:
|
COORDINATING IDLE STATE TRANSITIONS IN MULTI-CORE PROCESSORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2010
|
Application #:
|
10976428
|
Filing Dt:
|
10/29/2004
|
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
|
Title:
|
OPERATION AND CONTROL OF WIRELESS APPLIANCE NETWORKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
10980737
|
Filing Dt:
|
11/02/2004
|
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR IMPROVED PERFORMANCE FOR PRIORITY AGENT REQUESTS WHEN SYMMETRIC AGENT BUS PARKING IS ENABLED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
10996760
|
Filing Dt:
|
11/23/2004
|
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
|
Title:
|
METHOD, APPARATUS, AND SYSTEM FOR MEMORY READ TRANSACTION BIASING IN MIRRORED MODE TO PROVIDE THERMAL MANAGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
11035467
|
Filing Dt:
|
01/13/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/18/2005
| | | | |
|
Title:
|
APPARATUS FOR THERMAL MANAGEMENT OF MULTIPLE CORE MICROPROCESSORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
11096152
|
Filing Dt:
|
03/31/2005
|
|
Title:
|
COMPRESSING MICROCODE
|
|
