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Total properties:
55
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Patent #:
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Issue Dt:
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08/19/2014
|
Application #:
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11307382
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Filing Dt:
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02/03/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
|
Title:
|
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FACE TO FACE STACK CONFIGURATION
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|
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|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
11307904
|
Filing Dt:
|
02/27/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/30/2007
| | | | |
|
Title:
|
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
12051469
|
Filing Dt:
|
03/19/2008
|
|
Publication #:
|
|
Pub Dt:
|
09/24/2009
| | | | |
|
Title:
|
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
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|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
12239774
|
Filing Dt:
|
09/27/2008
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTING STRUCTURE
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|
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Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
12242011
|
Filing Dt:
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09/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2010
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming a Protective Layer on a Backside of the Wafer
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|
|
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|
Patent #:
|
|
Issue Dt:
|
08/26/2014
|
Application #:
|
12404279
|
Filing Dt:
|
03/13/2009
|
|
Publication #:
|
|
Pub Dt:
|
09/24/2009
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-IN-PACKAGE AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
12467146
|
Filing Dt:
|
05/15/2009
|
|
Publication #:
|
|
Pub Dt:
|
11/18/2010
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND TRANSPOSER AND METHOD OF MANUFACTURE THEREOF
|
|
|
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|
Patent #:
|
|
Issue Dt:
|
06/10/2014
|
Application #:
|
12563475
|
Filing Dt:
|
09/21/2009
|
|
Publication #:
|
|
Pub Dt:
|
03/24/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
12572590
|
Filing Dt:
|
10/02/2009
|
|
Publication #:
|
|
Pub Dt:
|
06/17/2010
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH A VERTICAL INTERCONNECT STRUCTURE FOR 3-D FO-WLCSP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
12579299
|
Filing Dt:
|
10/14/2009
|
|
Publication #:
|
|
Pub Dt:
|
02/11/2010
| | | | |
|
Title:
|
MINIATURIZED WIDE-BAND BALUNS FOR RF APPLICATIONS
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|
|
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|
Patent #:
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|
Issue Dt:
|
07/01/2014
|
Application #:
|
12629879
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Filing Dt:
|
12/02/2009
|
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLIP CHIP AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
12710995
|
Filing Dt:
|
02/23/2010
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING TMV AND TSV IN WLCSP USING SAME CARRIER
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|
|
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Patent #:
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Issue Dt:
|
07/29/2014
|
Application #:
|
12726880
|
Filing Dt:
|
03/18/2010
|
|
Publication #:
|
|
Pub Dt:
|
07/18/2013
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming an Inductor on Polymer Matrix Composite Substrate
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|
|
|
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Patent #:
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|
Issue Dt:
|
07/29/2014
|
Application #:
|
12750517
|
Filing Dt:
|
03/30/2010
|
|
Publication #:
|
|
Pub Dt:
|
10/06/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH-ATTENUATION BALANCED BAND-PASS FILTER
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|
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|
Patent #:
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|
Issue Dt:
|
08/05/2014
|
Application #:
|
12822488
|
Filing Dt:
|
06/24/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/29/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING RDL ALONG SLOPED SIDE SURFACE OF SEMICONDUCTOR DIE FOR Z-DIRECTION INTERCONNECT
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|
|
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|
Patent #:
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|
Issue Dt:
|
08/12/2014
|
Application #:
|
12889911
|
Filing Dt:
|
09/24/2010
|
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PROTECTIVE COATING AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2014
|
Application #:
|
12890161
|
Filing Dt:
|
09/24/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/29/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE CONTROL AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
12944351
|
Filing Dt:
|
11/11/2010
|
|
Publication #:
|
|
Pub Dt:
|
05/12/2011
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
12967223
|
Filing Dt:
|
12/14/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT MOUNTING SYSTEM WITH PADDLE INTERLOCK AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2014
|
Application #:
|
13021856
|
Filing Dt:
|
02/07/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
|
Title:
|
METHOD OF FABRICATING SEMICONDUCTOR DIE WITH THROUGH-HOLE VIA ON SAW STREETS AND THROUGH-HOLE VIA IN ACTIVE AREA OF DIE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2014
|
Application #:
|
13030022
|
Filing Dt:
|
02/17/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming a Dual UBM Structure for Lead Free Bump Connections
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/22/2014
|
Application #:
|
13052588
|
Filing Dt:
|
03/21/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A THERMALLY REINFORCED SEMICONDUCTOR DIE
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|
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Patent #:
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Issue Dt:
|
08/12/2014
|
Application #:
|
13069980
|
Filing Dt:
|
03/23/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
13071228
|
Filing Dt:
|
03/24/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER SHIELD AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2014
|
Application #:
|
13098426
|
Filing Dt:
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04/30/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER OVER ACTIVE SURFACE OF SEMICONDUCTOR DIE
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|
|
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|
Patent #:
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Issue Dt:
|
05/27/2014
|
Application #:
|
13102044
|
Filing Dt:
|
05/05/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/08/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTED CIRCUIT LEAD ARRAY AND METHOD OF MANUFACTURE THEREOF
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/24/2014
|
Application #:
|
13102047
|
Filing Dt:
|
05/05/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/08/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ELECTRICAL INTERFACE AND METHOD OF MANUFACTURE THEREOF
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|
|
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|
Patent #:
|
|
Issue Dt:
|
07/01/2014
|
Application #:
|
13162566
|
Filing Dt:
|
06/16/2011
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2012
| | | | |
|
Title:
|
METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT PACKAGING SYSTEM INCLUDING LASERING THROUGH ENCAPSULANT OVER INTERPOSER
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Patent #:
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Issue Dt:
|
06/10/2014
|
Application #:
|
13165658
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Filing Dt:
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06/21/2011
|
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDERFILL AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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05/20/2014
|
Application #:
|
13171341
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Filing Dt:
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06/28/2011
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|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street
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Patent #:
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Issue Dt:
|
08/12/2014
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Application #:
|
13188456
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Filing Dt:
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07/21/2011
|
|
Publication #:
|
|
Pub Dt:
|
01/26/2012
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISLAND TERMINALS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
06/24/2014
|
Application #:
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13197215
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Filing Dt:
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08/03/2011
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Publication #:
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|
Pub Dt:
|
11/24/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKED DIE
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Patent #:
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Issue Dt:
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08/26/2014
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Application #:
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13234902
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Filing Dt:
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09/16/2011
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Publication #:
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|
Pub Dt:
|
03/21/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING STACKED SEMICONDUCTOR DIE AND CONDUCTIVE INTERCONNECT STRUCTURE THROUGH AN ENCAPSULANT
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Patent #:
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Issue Dt:
|
08/26/2014
|
Application #:
|
13242656
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Filing Dt:
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09/23/2011
|
|
Publication #:
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|
Pub Dt:
|
08/22/2013
| | | | |
|
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FORMED UNDER-FILL AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
06/24/2014
|
Application #:
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13306768
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Filing Dt:
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11/29/2011
|
|
Publication #:
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|
Pub Dt:
|
10/24/2013
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPOSITE BUMP-ON-LEAD INTERCONNECTION
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Patent #:
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Issue Dt:
|
06/03/2014
|
Application #:
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13324349
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Filing Dt:
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12/13/2011
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Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Conductive Pillars Having Recesses or Protrusions to Detect Interconnect Continuity Between Semiconductor Die and Substrate
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Patent #:
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Issue Dt:
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08/19/2014
|
Application #:
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13324446
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Filing Dt:
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12/13/2011
|
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Publication #:
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|
Pub Dt:
|
06/13/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING UBM STRUCTURE ON BACK SURFACE OF TSV SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
|
06/03/2014
|
Application #:
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13333395
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Filing Dt:
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12/21/2011
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Insulating Layer in Notches Around Conductive TSV for Stress Relief
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Patent #:
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Issue Dt:
|
07/15/2014
|
Application #:
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13345589
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Filing Dt:
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01/06/2012
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Publication #:
|
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Pub Dt:
|
05/03/2012
| | | | |
|
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATION LOCK
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Patent #:
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Issue Dt:
|
08/19/2014
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Application #:
|
13366560
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Filing Dt:
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02/06/2012
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Publication #:
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Pub Dt:
|
05/31/2012
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKED DIE
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Patent #:
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|
Issue Dt:
|
08/19/2014
|
Application #:
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13367214
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Filing Dt:
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02/06/2012
|
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Publication #:
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Pub Dt:
|
05/31/2012
| | | | |
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Title:
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SOLDER JOINT FLIP CHIP INTERCONNECTION
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Patent #:
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Issue Dt:
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06/03/2014
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Application #:
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13405094
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Filing Dt:
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02/24/2012
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Publication #:
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Pub Dt:
|
06/21/2012
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE
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Patent #:
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Issue Dt:
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07/29/2014
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Application #:
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13426552
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Filing Dt:
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03/21/2012
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Publication #:
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Pub Dt:
|
09/26/2013
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL OVER BUMP INTERCONNECT CONDUCTIVE LAYER FOR STRESS RELIEF
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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13429119
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Filing Dt:
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03/23/2012
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Publication #:
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Pub Dt:
|
09/26/2013
| | | | |
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Title:
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SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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13536321
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HAVING PLATED TERMINAL LEADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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07/08/2014
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Application #:
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13536382
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
10/25/2012
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MOLD FLASH PREVENTION TECHNOLOGY
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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13571020
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Filing Dt:
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08/09/2012
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Publication #:
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Pub Dt:
|
11/29/2012
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER OVER SEMICONDUCTOR DIE MOUNTED TO TSV INTERPOSER
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Patent #:
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Issue Dt:
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07/22/2014
|
Application #:
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13664626
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Filing Dt:
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10/31/2012
|
|
Publication #:
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|
Pub Dt:
|
03/07/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING REPASSIVATION LAYER WITH REDUCED OPENING TO CONTACT PAD OF SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
06/03/2014
|
Application #:
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13727116
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Filing Dt:
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12/26/2012
|
|
Publication #:
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|
Pub Dt:
|
05/30/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE HAVING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON RECESSED AND RAISED BOND FINGERS
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Patent #:
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Issue Dt:
|
06/24/2014
|
Application #:
|
13782618
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Filing Dt:
|
03/01/2013
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|
Publication #:
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|
Pub Dt:
|
07/11/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
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Patent #:
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Issue Dt:
|
07/29/2014
|
Application #:
|
13791375
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Filing Dt:
|
03/08/2013
|
|
Publication #:
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|
Pub Dt:
|
10/03/2013
| | | | |
|
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE CIRCUITRY AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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|
Issue Dt:
|
07/29/2014
|
Application #:
|
13845329
|
Filing Dt:
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03/18/2013
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Publication #:
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Pub Dt:
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08/15/2013
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Title:
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Semiconductor Device and Method of Forming a Shielding Layer Over a Semiconductor Die After Forming a Build-up Interconnect Structure
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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13896608
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Filing Dt:
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05/17/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLATED LEADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/03/2014
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Application #:
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13905845
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Filing Dt:
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05/30/2013
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Publication #:
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Pub Dt:
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10/10/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL DURING REFLOW WITH SOLDER MASK PATCH
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Patent #:
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Issue Dt:
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07/22/2014
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Application #:
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14020996
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/02/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
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