Total properties:
499
Page
3
of
5
Pages:
1 2 3 4 5
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
10447893
|
Filing Dt:
|
05/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/08/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10454404
|
Filing Dt:
|
06/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
|
Title:
|
SEMICONDUCTOR APPARATUS WHICH PREVENTS GENERATING NOISE AND BEING INFLUENCED BY NOISE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
10493443
|
Filing Dt:
|
08/11/2005
|
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
|
Title:
|
VERTICAL MISFET MANUFACTURING METHOD, VERTICAL MISFET, SEMICONDUCTOR MEMORY DEVICE MANUFACTURING METHOD, AND SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10534049
|
Filing Dt:
|
05/06/2005
|
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
|
Title:
|
SENSE AMPLIFIER FOR SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10617040
|
Filing Dt:
|
07/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/15/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH ERROR CORRECTING CODE CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
10618508
|
Filing Dt:
|
07/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/22/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10620504
|
Filing Dt:
|
07/16/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
|
METHOD OF RECOVERING MEMORY MODULE, MEMORY MODULE AND VOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
10626431
|
Filing Dt:
|
07/23/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/01/2004
| | | | |
|
Title:
|
METHOD AND CIRCUIT FOR CHARGING A SIGNAL VOLTAGE THROUGH A SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10627713
|
Filing Dt:
|
07/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
|
Title:
|
DYNAMIC RAM-AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2005
|
Application #:
|
10627769
|
Filing Dt:
|
07/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
|
Title:
|
A SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED ARRANGEMENT FOR REPLACING FAILED BIT LINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
10628517
|
Filing Dt:
|
07/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
|
Title:
|
MEMORY MODULE AND MEMORY SYSTEM HAVING AN EXPANDABLE SIGNAL TRANSMISSION, INCREASED SIGNAL TRANSMISSION AND/OR HIGH CAPACITY MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
|
Application #:
|
10630444
|
Filing Dt:
|
07/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
ALD PROCESS FOR CAPACITOR DIELECTRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
10630695
|
Filing Dt:
|
07/31/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10647157
|
Filing Dt:
|
08/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/03/2004
| | | | |
|
Title:
|
MEMORY SYSTEM AND DATA TRANSMISSION METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
10648883
|
Filing Dt:
|
08/27/2003
|
|
Publication #:
|
|
Pub Dt:
|
08/05/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
10658396
|
Filing Dt:
|
09/10/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING A HIERARCHICAL I/O STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10669304
|
Filing Dt:
|
09/24/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE USING CURRENT MIRROR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
10676110
|
Filing Dt:
|
10/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/29/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE USING OPEN DATA LINE ARRANGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10680239
|
Filing Dt:
|
10/08/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/08/2004
| | | | |
|
Title:
|
DATA INVERSION CIRCUIT AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
10699223
|
Filing Dt:
|
10/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
|
Title:
|
DRAM WITH SUPER SELF-REFRESH AND ERROR CORRECTION FOR EXTENDED PERIOD BETWEEN REFRESH OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10731747
|
Filing Dt:
|
12/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/24/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE USING SHALLOW TRENCH ISOLATION AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10743882
|
Filing Dt:
|
12/24/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/15/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
10755393
|
Filing Dt:
|
01/13/2004
|
|
Publication #:
|
|
Pub Dt:
|
07/22/2004
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND THE PROCESS OF MANUFACTURING THE SAME HAVING POLY-SILICON PLUG, WIRING TRENCHES AND BIT LINES FORMED IN THE WIRING TRENCHES HAVING A WIDTH FINER THAN A PREDETERMINED SIZE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10763337
|
Filing Dt:
|
01/26/2004
|
|
Publication #:
|
|
Pub Dt:
|
08/05/2004
| | | | |
|
Title:
|
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10777704
|
Filing Dt:
|
02/13/2004
|
|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
|
Title:
|
A MEMORY WITH MEMORY CELLS THAT INCLUDE A MIM TYPE CAPACITOR WITH A LOWER ELECTRODE MADE FOR REDUCED RESISTANCE AT AN INTERFACE WITH A METAL FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
10808193
|
Filing Dt:
|
03/24/2004
|
|
Publication #:
|
|
Pub Dt:
|
09/30/2004
| | | | |
|
Title:
|
METHOD FOR FORMING A METAL OXIDE FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
10808285
|
Filing Dt:
|
03/25/2004
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
METHOD OF DECIDING ERROR RATE AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10813761
|
Filing Dt:
|
03/30/2004
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
|
Title:
|
BOOSTING CIRCUIT AND SEMICONDUCTOR DEVICE USING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2007
|
Application #:
|
10817860
|
Filing Dt:
|
04/06/2004
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
SEMICONDUCTOR STORAGE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
10828189
|
Filing Dt:
|
04/21/2004
|
|
Publication #:
|
|
Pub Dt:
|
12/23/2004
| | | | |
|
Title:
|
MEMORY MODULE AND MEMORY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2009
|
Application #:
|
10836098
|
Filing Dt:
|
04/29/2004
|
|
Publication #:
|
|
Pub Dt:
|
01/06/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MODULE IN WHICH A SEMICONDUCTOR PACKAGE IS BONDED ON A MOUNT SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10843694
|
Filing Dt:
|
05/12/2004
|
|
Publication #:
|
|
Pub Dt:
|
01/06/2005
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING OXIDE FILMS WITH DIFFERENT THICKNESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2005
|
Application #:
|
10875209
|
Filing Dt:
|
06/25/2004
|
|
Publication #:
|
|
Pub Dt:
|
11/18/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING A HIERARCHICAL I/O STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10878266
|
Filing Dt:
|
06/29/2004
|
|
Publication #:
|
|
Pub Dt:
|
11/25/2004
| | | | |
|
Title:
|
DYNAMIC RAM-AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2007
|
Application #:
|
10923718
|
Filing Dt:
|
08/24/2004
|
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
|
Application #:
|
10933290
|
Filing Dt:
|
09/03/2004
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
10938794
|
Filing Dt:
|
09/13/2004
|
|
Publication #:
|
|
Pub Dt:
|
02/10/2005
| | | | |
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORY(DRAM) CAPABLE OF CANCELING OUT COMPLIMENTARY NOISE DEVELOPED IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
10956142
|
Filing Dt:
|
10/04/2004
|
|
Publication #:
|
|
Pub Dt:
|
04/21/2005
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10958358
|
Filing Dt:
|
10/06/2004
|
|
Publication #:
|
|
Pub Dt:
|
04/21/2005
| | | | |
|
Title:
|
ANTIFUSE PROGRAMMING CIRCUIT IN WHICH ONE STAGE OF TRANSISTOR IS INTERPOSED IN A SERIES WITH ANTIFUSE BETWEEN POWER SUPPLIES DURING PROGRAMMING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
10958572
|
Filing Dt:
|
10/06/2004
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
10958700
|
Filing Dt:
|
10/05/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/02/2005
| | | | |
|
Title:
|
HEAT RADIATION DEVICE FOR MEMORY MODULE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10972486
|
Filing Dt:
|
10/26/2004
|
|
Publication #:
|
|
Pub Dt:
|
04/28/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE OF HIERARCHY WORD TYPE AND SUB WORD DRIVER CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
10981676
|
Filing Dt:
|
11/05/2004
|
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10990990
|
Filing Dt:
|
11/18/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/02/2005
| | | | |
|
Title:
|
4N PRE-FETCH MEMORY DATA TRANSFER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
10995134
|
Filing Dt:
|
11/24/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/02/2005
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10998804
|
Filing Dt:
|
11/30/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/02/2005
| | | | |
|
Title:
|
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
11000005
|
Filing Dt:
|
12/01/2004
|
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
|
Title:
|
INPUT/OUTPUT CIRCUIT, REFERENCE-VOLTAGE GENERATING CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11019618
|
Filing Dt:
|
12/23/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING LAYERED CHIPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
11060391
|
Filing Dt:
|
02/17/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
|
Title:
|
SEMICONDUCTOR CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2009
|
Application #:
|
11063877
|
Filing Dt:
|
02/24/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING IMPROVED SOLDER JOINT AND INTERNAL LEAD LIFETIMES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11087688
|
Filing Dt:
|
03/24/2005
|
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
|
Title:
|
LEVEL-CONVERSION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
11088808
|
Filing Dt:
|
03/25/2005
|
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
|
Title:
|
OSCILLATOR CIRCUIT HAVING A TEMPERATURE DEPENDENCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11099609
|
Filing Dt:
|
04/06/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/13/2005
| | | | |
|
Title:
|
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A W/WN/POLYSILICON LAYERED FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
11105546
|
Filing Dt:
|
04/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
|
Title:
|
BGA SEMICONDUCTOR DEVICE HAVING A DUMMY BUMP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
|
Application #:
|
11116036
|
Filing Dt:
|
04/27/2005
|
|
Publication #:
|
|
Pub Dt:
|
09/08/2005
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11148413
|
Filing Dt:
|
06/09/2005
|
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
|
Title:
|
WORD LINE DRIVING CIRCUIT WITH A WORD LINE DETECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
11151213
|
Filing Dt:
|
06/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
|
Title:
|
STACKED SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11151417
|
Filing Dt:
|
06/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
11154625
|
Filing Dt:
|
06/17/2005
|
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11176292
|
Filing Dt:
|
07/08/2005
|
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
|
Title:
|
STACKED SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY MODULE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
11180552
|
Filing Dt:
|
07/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
|
Title:
|
REFRESH PERIOD GENERATING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
11194683
|
Filing Dt:
|
08/02/2005
|
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11198357
|
Filing Dt:
|
08/08/2005
|
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORY (DRAM) CAPABLE OF CANCELING OUT COMPLEMENTARY NOISE DEVELOPMENT IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11203980
|
Filing Dt:
|
08/16/2005
|
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT COMPRISING FIRST AND SECOND TRANSMISSION SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2007
|
Application #:
|
11221721
|
Filing Dt:
|
09/09/2005
|
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND TEST METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2008
|
Application #:
|
11242021
|
Filing Dt:
|
10/04/2005
|
|
Publication #:
|
|
Pub Dt:
|
04/06/2006
| | | | |
|
Title:
|
FUSE CIRCUIT AND SEMICONDUCTOR DEVICE USING FUSE CIRCUIT THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
11247215
|
Filing Dt:
|
10/12/2005
|
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
|
Title:
|
FINE PITCH GRID ARRAY TYPE SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11249400
|
Filing Dt:
|
10/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
|
Title:
|
MOS TRANSISTOR IN AN ACTIVE REGION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11254050
|
Filing Dt:
|
10/20/2005
|
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
|
Title:
|
PREVENTION OF THE PROPAGATION OF JITTERS IN A CLOCK DELAY CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
11262801
|
Filing Dt:
|
11/01/2005
|
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH COLUMN SELECTING SWITCHES IN HIERARCHICAL STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
11264092
|
Filing Dt:
|
11/02/2005
|
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
|
Application #:
|
11280170
|
Filing Dt:
|
11/17/2005
|
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2009
|
Application #:
|
11281743
|
Filing Dt:
|
11/18/2005
|
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT FOR HIGH-SPEED, HIGH-FREQUENCY SIGNAL TRANSMISSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11285057
|
Filing Dt:
|
11/23/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A BONDING PAD STRUCTURE INCLUDING AN ANNULAR CONTACT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
11287368
|
Filing Dt:
|
11/28/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
|
Application #:
|
11290394
|
Filing Dt:
|
12/01/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
|
Title:
|
PLL CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11297646
|
Filing Dt:
|
12/09/2005
|
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
|
Title:
|
SELF-REFRESH TIMER CIRCUIT AND METHOD OF ADJUSTING SELF-REFRESH TIMER PERIOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2007
|
Application #:
|
11299765
|
Filing Dt:
|
12/13/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH HIERARCHICAL I/O LINE ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11302325
|
Filing Dt:
|
12/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MAKING DESIGN CHANGE TO SEMICONDUCTOR CHIP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11304625
|
Filing Dt:
|
12/16/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
|
Title:
|
MODULE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2007
|
Application #:
|
11315698
|
Filing Dt:
|
12/22/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2007
|
Application #:
|
11318526
|
Filing Dt:
|
12/28/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
|
Title:
|
DELAY CIRCUIT AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
11327425
|
Filing Dt:
|
01/09/2006
|
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
|
Title:
|
OUTPUT CIRCUIT FOR SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE HAVING OUTPUT CIRCUIT, AND METHOD OF ADJUSTING CHARACTERISTICS OF OUTPUT CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11329224
|
Filing Dt:
|
01/11/2006
|
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
|
Title:
|
PHASE-CHANGE-TYPE SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2007
|
Application #:
|
11340633
|
Filing Dt:
|
01/27/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/03/2006
| | | | |
|
Title:
|
PLL CIRCUIT AND PROGRAM FOR SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11341717
|
Filing Dt:
|
01/30/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORIES AND METHOD FOR TESTING PERFORMANCE OF THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
11347293
|
Filing Dt:
|
02/06/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE THAT REQUIRES REFRESH OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11349091
|
Filing Dt:
|
02/08/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND STRESS TESTING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11349200
|
Filing Dt:
|
02/08/2006
|
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A MOUNT BOARD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11349979
|
Filing Dt:
|
02/09/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
|
Title:
|
SEMICONDUCTOR CHIP AND METHOD OF TESTING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2008
|
Application #:
|
11360522
|
Filing Dt:
|
02/24/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
|
Title:
|
POWER SUPPLY VOLTAGE STEP-DOWN CIRCUIT, DELAY CIRCUIT, AND SEMICONDUCTOR DEVICE HAVING THE DELAY CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2009
|
Application #:
|
11365668
|
Filing Dt:
|
03/02/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
|
Title:
|
POWER SUPPLY CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2007
|
Application #:
|
11365857
|
Filing Dt:
|
03/02/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11365885
|
Filing Dt:
|
03/02/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
|
Title:
|
ADJUSTMENT OF TERMINATION RESISTANCE IN AN ON-DIE TERMINATION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2008
|
Application #:
|
11373133
|
Filing Dt:
|
03/13/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
|
Title:
|
OVERDRIVE PERIOD CONTROL DEVICE AND OVERDRIVE PERIOD DETERMINING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11376297
|
Filing Dt:
|
03/16/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE TEST METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11389104
|
Filing Dt:
|
03/27/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH DELAY SECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11392689
|
Filing Dt:
|
03/30/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/03/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2008
|
Application #:
|
11392805
|
Filing Dt:
|
03/30/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
|
Title:
|
SEMICONDUCTOR STORAGE DEVICE HAVING A PLURALITY OF STACKED MEMORY CHIPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2008
|
Application #:
|
11399485
|
Filing Dt:
|
04/07/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
|
Title:
|
DATA STORING METHOD OF DYNAMIC RAM AND SEMICONDUCTOR MEMORY DEVICE
|
|
