|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
|
Application #:
|
11116036
|
Filing Dt:
|
04/27/2005
|
Publication #:
|
|
Pub Dt:
|
09/08/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11132258
|
Filing Dt:
|
05/19/2005
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
11134476
|
Filing Dt:
|
05/23/2005
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11148413
|
Filing Dt:
|
06/09/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
WORD LINE DRIVING CIRCUIT WITH A WORD LINE DETECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
11151213
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
STACKED SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11151417
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
11151553
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
REFRESH COUNTER CIRCUIT AND CONTROL METHOD FOR REFRESH OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11152386
|
Filing Dt:
|
06/15/2005
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND ERROR CORRECTION METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11152762
|
Filing Dt:
|
06/15/2005
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND REFRESH PERIOD CONTROLLING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
11153321
|
Filing Dt:
|
06/16/2005
|
Publication #:
|
|
Pub Dt:
|
12/22/2005
| | | | |
Title:
|
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING POLYSILICON PLUGS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
|
Application #:
|
11154467
|
Filing Dt:
|
06/17/2005
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
11154625
|
Filing Dt:
|
06/17/2005
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2007
|
Application #:
|
11165034
|
Filing Dt:
|
06/24/2005
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
HEMISPHERICAL SILICON GRAIN CAPACITOR WITH VARIABLE GRAIN SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11176292
|
Filing Dt:
|
07/08/2005
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
STACKED SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
11180552
|
Filing Dt:
|
07/14/2005
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
REFRESH PERIOD GENERATING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11191013
|
Filing Dt:
|
07/28/2005
|
Publication #:
|
|
Pub Dt:
|
02/02/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY TEST APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
11194683
|
Filing Dt:
|
08/02/2005
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11196267
|
Filing Dt:
|
08/04/2005
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11198357
|
Filing Dt:
|
08/08/2005
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY (DRAM) CAPABLE OF CANCELING OUT COMPLEMENTARY NOISE DEVELOPMENT IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11203980
|
Filing Dt:
|
08/16/2005
|
Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT COMPRISING FIRST AND SECOND TRANSMISSION SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11211531
|
Filing Dt:
|
08/26/2005
|
Publication #:
|
|
Pub Dt:
|
03/02/2006
| | | | |
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2007
|
Application #:
|
11221721
|
Filing Dt:
|
09/09/2005
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND TEST METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2008
|
Application #:
|
11242021
|
Filing Dt:
|
10/04/2005
|
Publication #:
|
|
Pub Dt:
|
04/06/2006
| | | | |
Title:
|
FUSE CIRCUIT AND SEMICONDUCTOR DEVICE USING FUSE CIRCUIT THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11246046
|
Filing Dt:
|
10/07/2005
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
MEMORY CIRCUIT WITH FLEXIBLE BITLINE-RELATED AND/OR WORDLINE-RELATED DEFECT MEMORY CELL SUBSTITUTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
11247215
|
Filing Dt:
|
10/12/2005
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
FINE PITCH GRID ARRAY TYPE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11249400
|
Filing Dt:
|
10/14/2005
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
MOS TRANSISTOR IN AN ACTIVE REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11254050
|
Filing Dt:
|
10/20/2005
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
PREVENTION OF THE PROPAGATION OF JITTERS IN A CLOCK DELAY CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2008
|
Application #:
|
11254703
|
Filing Dt:
|
10/21/2005
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
MULTILAYER SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
11254722
|
Filing Dt:
|
10/21/2005
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
REFRESH CONTROL METHOD OF A SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2006
|
Application #:
|
11260233
|
Filing Dt:
|
10/28/2005
|
Publication #:
|
|
Pub Dt:
|
03/23/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A TEST CIRCUIT FOR TESTING AN OUTPUT CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
11262801
|
Filing Dt:
|
11/01/2005
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH COLUMN SELECTING SWITCHES IN HIERARCHICAL STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11262989
|
Filing Dt:
|
11/01/2005
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
SEMICONDUCTOR CHIP INSPECTION SUPPORTING APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
11264092
|
Filing Dt:
|
11/02/2005
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
11270608
|
Filing Dt:
|
11/10/2005
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11272792
|
Filing Dt:
|
11/15/2005
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND REFRESH METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
|
Application #:
|
11280170
|
Filing Dt:
|
11/17/2005
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2010
|
Application #:
|
11281590
|
Filing Dt:
|
11/18/2005
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
DESIGN METHOD, DESIGN APPARATUS, AND COMPUTER PROGRAM FOR SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2009
|
Application #:
|
11281743
|
Filing Dt:
|
11/18/2005
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT FOR HIGH-SPEED, HIGH-FREQUENCY SIGNAL TRANSMISSION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11285057
|
Filing Dt:
|
11/23/2005
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A BONDING PAD STRUCTURE INCLUDING AN ANNULAR CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
11287368
|
Filing Dt:
|
11/28/2005
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
|
Application #:
|
11290394
|
Filing Dt:
|
12/01/2005
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
PLL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11296287
|
Filing Dt:
|
12/08/2005
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING INPUT CIRCUITS ACTIVATED BY CLOCKS HAVING DIFFERENT PHASES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11297646
|
Filing Dt:
|
12/09/2005
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
SELF-REFRESH TIMER CIRCUIT AND METHOD OF ADJUSTING SELF-REFRESH TIMER PERIOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2007
|
Application #:
|
11299765
|
Filing Dt:
|
12/13/2005
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH HIERARCHICAL I/O LINE ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2010
|
Application #:
|
11300408
|
Filing Dt:
|
12/15/2005
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE EMPLOYING FUSE CIRCUIT AND METHOD FOR SELECTING FUSE CIRCUIT SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11302325
|
Filing Dt:
|
12/14/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MAKING DESIGN CHANGE TO SEMICONDUCTOR CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11304168
|
Filing Dt:
|
12/13/2005
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
INTEGRATOR-BASED CURRENT SENSING CIRCUIT FOR READING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11304625
|
Filing Dt:
|
12/16/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2007
|
Application #:
|
11315698
|
Filing Dt:
|
12/22/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2007
|
Application #:
|
11318526
|
Filing Dt:
|
12/28/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
DELAY CIRCUIT AND SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
11327425
|
Filing Dt:
|
01/09/2006
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
OUTPUT CIRCUIT FOR SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE HAVING OUTPUT CIRCUIT, AND METHOD OF ADJUSTING CHARACTERISTICS OF OUTPUT CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11329224
|
Filing Dt:
|
01/11/2006
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
Title:
|
PHASE-CHANGE-TYPE SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
11339799
|
Filing Dt:
|
01/26/2006
|
Publication #:
|
|
Pub Dt:
|
10/26/2006
| | | | |
Title:
|
SEMICONDUCTOR APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11340623
|
Filing Dt:
|
01/27/2006
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2007
|
Application #:
|
11340633
|
Filing Dt:
|
01/27/2006
|
Publication #:
|
|
Pub Dt:
|
08/03/2006
| | | | |
Title:
|
PLL CIRCUIT AND PROGRAM FOR SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11340798
|
Filing Dt:
|
01/27/2006
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11341717
|
Filing Dt:
|
01/30/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORIES AND METHOD FOR TESTING PERFORMANCE OF THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11346416
|
Filing Dt:
|
02/03/2006
|
Publication #:
|
|
Pub Dt:
|
08/03/2006
| | | | |
Title:
|
DUTY DETECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
11347293
|
Filing Dt:
|
02/06/2006
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE THAT REQUIRES REFRESH OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11349091
|
Filing Dt:
|
02/08/2006
|
Publication #:
|
|
Pub Dt:
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08/31/2006
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND STRESS TESTING METHOD THEREOF
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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11349200
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Filing Dt:
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02/08/2006
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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SEMICONDUCTOR DEVICE HAVING A MOUNT BOARD
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Patent #:
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Issue Dt:
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04/10/2007
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Application #:
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11349979
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Filing Dt:
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02/09/2006
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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SEMICONDUCTOR CHIP AND METHOD OF TESTING THE SAME
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11353257
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Filing Dt:
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02/14/2006
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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11354131
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Filing Dt:
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02/15/2006
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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11356100
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Filing Dt:
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02/17/2006
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Publication #:
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Pub Dt:
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06/29/2006
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUITS WITH POWER REDUCTION MECHANISM
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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11360418
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Filing Dt:
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02/24/2006
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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METHOD AND APPARATUS FOR PAD ALIGNED MULTIPROBE WAFER TESTING
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Patent #:
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Issue Dt:
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11/25/2008
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Application #:
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11360522
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Filing Dt:
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02/24/2006
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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POWER SUPPLY VOLTAGE STEP-DOWN CIRCUIT, DELAY CIRCUIT, AND SEMICONDUCTOR DEVICE HAVING THE DELAY CIRCUIT
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Patent #:
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Issue Dt:
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12/15/2009
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Application #:
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11365668
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Filing Dt:
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03/02/2006
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Publication #:
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Pub Dt:
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09/07/2006
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Title:
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POWER SUPPLY CIRCUIT
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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11365857
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Filing Dt:
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03/02/2006
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Publication #:
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Pub Dt:
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09/07/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/24/2008
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Application #:
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11365885
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Filing Dt:
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03/02/2006
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Publication #:
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Pub Dt:
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09/07/2006
| | | | |
Title:
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ADJUSTMENT OF TERMINATION RESISTANCE IN AN ON-DIE TERMINATION CIRCUIT
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Patent #:
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Issue Dt:
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01/08/2008
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Application #:
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11373133
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Filing Dt:
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03/13/2006
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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OVERDRIVE PERIOD CONTROL DEVICE AND OVERDRIVE PERIOD DETERMINING METHOD
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Patent #:
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Issue Dt:
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06/30/2009
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Application #:
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11374074
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Filing Dt:
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03/14/2006
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Publication #:
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Pub Dt:
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09/21/2006
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Title:
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MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
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Patent #:
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Issue Dt:
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04/08/2008
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Application #:
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11375565
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Filing Dt:
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03/15/2006
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Publication #:
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Pub Dt:
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09/21/2006
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Title:
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HEAT SINK FOR SURFACE-MOUNTED SEMICONDUCTOR DEVICES AND MOUNTING METHOD
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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11376169
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Filing Dt:
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03/16/2006
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Publication #:
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Pub Dt:
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09/21/2006
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Title:
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SEMICONDUCTOR STORAGE DEVICE
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Patent #:
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Issue Dt:
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09/25/2007
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Application #:
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11376297
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Filing Dt:
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03/16/2006
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE TEST METHOD
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Patent #:
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Issue Dt:
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06/09/2009
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Application #:
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11378368
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Filing Dt:
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03/20/2006
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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DRAM STACKED PACKAGE, DIMM, AND SEMICONDUCTOR MANUFACTURING METHOD
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Patent #:
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Issue Dt:
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12/14/2010
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Application #:
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11384277
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Filing Dt:
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03/21/2006
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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MULTICHIP PACKAGE OR SYSTEM-IN PACKAGE
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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11389104
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Filing Dt:
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03/27/2006
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Publication #:
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Pub Dt:
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10/12/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE WITH DELAY SECTION
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Patent #:
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Issue Dt:
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07/28/2009
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Application #:
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11392583
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Filing Dt:
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03/30/2006
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Publication #:
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Pub Dt:
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10/19/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE AND TESTING METHOD THEREOF
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Patent #:
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Issue Dt:
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03/25/2008
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Application #:
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11392689
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Filing Dt:
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03/30/2006
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Publication #:
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Pub Dt:
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08/03/2006
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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12/16/2008
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Application #:
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11392805
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Filing Dt:
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03/30/2006
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Publication #:
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Pub Dt:
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10/19/2006
| | | | |
Title:
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SEMICONDUCTOR STORAGE DEVICE HAVING A PLURALITY OF STACKED MEMORY CHIPS
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Patent #:
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Issue Dt:
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07/01/2008
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Application #:
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11399334
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Filing Dt:
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04/07/2006
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Publication #:
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Pub Dt:
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10/19/2006
| | | | |
Title:
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LOGIC GATE WITH REDUCED SUB-THRESHOLD LEAK CURRENT
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Patent #:
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Issue Dt:
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01/08/2008
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Application #:
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11399485
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Filing Dt:
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04/07/2006
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Publication #:
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Pub Dt:
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09/07/2006
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Title:
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DATA STORING METHOD OF DYNAMIC RAM AND SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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07/07/2009
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Application #:
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11401293
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Filing Dt:
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04/11/2006
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Publication #:
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Pub Dt:
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10/12/2006
| | | | |
Title:
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SEMICONDUCTOR DEVICE HAVING A COMPENSATION CAPACITOR IN A MESH STRUCTURE
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Patent #:
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Issue Dt:
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08/26/2008
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Application #:
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11401889
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Filing Dt:
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04/12/2006
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Publication #:
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Pub Dt:
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10/19/2006
| | | | |
Title:
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DUTY DETECTION CIRCUIT AND METHOD FOR CONTROLLING THE SAME
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11409088
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Filing Dt:
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04/24/2006
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Publication #:
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Pub Dt:
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10/26/2006
| | | | |
Title:
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SEMICONDUCTOR STORAGE APPARATUS
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Patent #:
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Issue Dt:
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07/08/2008
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Application #:
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11409097
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Filing Dt:
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04/24/2006
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Publication #:
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Pub Dt:
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11/09/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY APPARATUS AND METHOD FOR WRITING IN THE MEMORY
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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11410118
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Filing Dt:
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04/25/2006
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Publication #:
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Pub Dt:
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10/26/2006
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11412977
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Filing Dt:
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04/28/2006
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Publication #:
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Pub Dt:
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11/02/2006
| | | | |
Title:
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SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND CONNECTION METHOD OF CIRCUIT BOARD
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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11418017
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Filing Dt:
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05/05/2006
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Publication #:
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Pub Dt:
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10/05/2006
| | | | |
Title:
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NON-VOLATILE MULTI-LEVEL SEMICONDUCTOR FLASH MEMORY DEVICE AND METHOD OF DRIVING SAME
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11418074
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Filing Dt:
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05/05/2006
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Publication #:
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Pub Dt:
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11/16/2006
| | | | |
Title:
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HARD MASK TECHNIQUE IN FORMING A PLUG
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Patent #:
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Issue Dt:
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06/29/2010
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Application #:
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11418094
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Filing Dt:
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05/05/2006
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Publication #:
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Pub Dt:
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11/30/2006
| | | | |
Title:
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SEMICONDUCTOR DEVICE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS AND A PLURALITY OF THROUGH-LINE GROUPS
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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11434715
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Filing Dt:
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05/17/2006
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Publication #:
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Pub Dt:
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11/30/2006
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Title:
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TERMINATION CIRCUIT AND SEMICONDUCTOR DEVICE COMPRISING THAT TERMINATION CIRCUIT
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Patent #:
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Issue Dt:
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06/23/2009
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Application #:
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11434897
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Filing Dt:
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05/17/2006
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Publication #:
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Pub Dt:
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11/23/2006
| | | | |
Title:
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SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/30/2008
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Application #:
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11435894
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Filing Dt:
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05/18/2006
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Publication #:
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Pub Dt:
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11/30/2006
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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11/25/2008
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Application #:
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11439230
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Filing Dt:
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05/24/2006
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Publication #:
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Pub Dt:
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11/30/2006
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Title:
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SEMICONDUCTOR DEVICE HAVING CELL TRANSISTOR WITH RECESS CHANNEL STRUCTURE
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Patent #:
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Issue Dt:
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06/09/2009
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Application #:
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11440398
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Filing Dt:
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05/25/2006
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Publication #:
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Pub Dt:
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01/04/2007
| | | | |
Title:
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SEMICONDUCTOR STORAGE DEVICE
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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11443348
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Filing Dt:
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05/31/2006
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Publication #:
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Pub Dt:
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01/11/2007
| | | | |
Title:
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SEMICONDUCTOR DEVICE
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|
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Patent #:
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Issue Dt:
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02/09/2010
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Application #:
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11445236
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Filing Dt:
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06/02/2006
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Publication #:
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Pub Dt:
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12/07/2006
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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11/11/2008
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Application #:
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11465390
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Filing Dt:
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08/17/2006
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Publication #:
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Pub Dt:
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05/10/2007
| | | | |
Title:
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DUTY RATIO ADJUSTMENT
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|