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Reel/Frame:033102/0270   Pages: 90
Recorded: 06/06/2014
Attorney Dkt #:040981-0072
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 3258
Page 13 of 33
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
Patent #:
Issue Dt:
05/08/2001
Application #:
09384850
Filing Dt:
08/27/1999
Title:
RATE 32/34 (D=0, G=9/I=9) MODULATION CODE WITH PARITY FOR A RECORDING CHANNEL
2
Patent #:
Issue Dt:
11/06/2001
Application #:
09385190
Filing Dt:
08/30/1999
Title:
VITERBI DETECTOR WITH PARTIAL ERASURE COMPENSATION FOR READ CHANNELS
3
Patent #:
Issue Dt:
11/19/2002
Application #:
09385588
Filing Dt:
08/27/1999
Title:
COMPENSATING FOR INITIAL SIGNAL INTERFERENCE EXHIBITED BY DIFFERENTIAL TRANSMISSION LINES
4
Patent #:
Issue Dt:
04/24/2001
Application #:
09386029
Filing Dt:
08/30/1999
Title:
ARCHITECTURE TO REDUCE ERRORS DUE TO METASTABILITY IN ANALOG TO DIGITAL CONVERTERS
5
Patent #:
Issue Dt:
08/07/2001
Application #:
09387448
Filing Dt:
09/01/1999
Title:
SUPPLY INDEPENDENT BIASING SCHEME
6
Patent #:
Issue Dt:
01/02/2001
Application #:
09388036
Filing Dt:
09/01/1999
Title:
DIFFERENTIAL CHARGE PUMP WITH REDUCED CHARGE-COUPLING EFFECTS
7
Patent #:
Issue Dt:
11/19/2002
Application #:
09388037
Filing Dt:
09/01/1999
Title:
ERROR SIGNAL CALCULATION FROM A VITERBI OUTPUT
8
Patent #:
Issue Dt:
02/06/2001
Application #:
09388996
Filing Dt:
09/01/1999
Title:
MAGNITUDE AND GROUP DELAY SHAPING CIRCUIT IN CONTINUOUS-TIME READ CHANNEL FILTERS
9
Patent #:
Issue Dt:
03/28/2006
Application #:
09390090
Filing Dt:
09/03/1999
Publication #:
Pub Dt:
09/11/2003
Title:
TIME-SHIFTED VIDEO SIGNAL PROCESSING
10
Patent #:
Issue Dt:
12/16/2003
Application #:
09391973
Filing Dt:
09/08/1999
Title:
METHOD AND APPARATUS FOR PILOT-AIDED CARRIER ACQUISITION OF VESTIGIAL SIDEBAND SIGNAL
11
Patent #:
Issue Dt:
06/11/2002
Application #:
09392039
Filing Dt:
09/08/1999
Title:
METHOD AND APPARATUS FOR INCREASING DATA RATES BETWEEN NODES OF A SERIAL BUS
12
Patent #:
Issue Dt:
07/31/2001
Application #:
09393208
Filing Dt:
09/09/1999
Title:
PROGRAMMABLE WRITE SIGNAL GENERATOR
13
Patent #:
Issue Dt:
04/01/2003
Application #:
09393388
Filing Dt:
09/10/1999
Title:
FORWARD ERROR CORRECTION APPARATUS AND METHODS
14
Patent #:
Issue Dt:
09/03/2002
Application #:
09393399
Filing Dt:
09/10/1999
Title:
FORWARD ERROR CORRECTION APPARATUS AND METHODS
15
Patent #:
Issue Dt:
12/11/2001
Application #:
09395507
Filing Dt:
09/14/1999
Title:
METHOD AND APPARATUS FOR DETERMINING TEMPERATURE OF A SEMICONDUCTOR WAFER DURING FABRICATION THEREOF
16
Patent #:
Issue Dt:
06/29/2004
Application #:
09397542
Filing Dt:
09/16/1999
Title:
DETECTING FAULTS IN DUAL PORT FIFO MEMORIES
17
Patent #:
Issue Dt:
07/09/2002
Application #:
09400686
Filing Dt:
09/22/1999
Title:
SILICON VERIFICATION WITH EMBEDDED TESTBENCHES
18
Patent #:
Issue Dt:
12/11/2001
Application #:
09400767
Filing Dt:
09/22/1999
Title:
UNIFORM AXIAL LOADING GROUND GLASS JOINT CLAMP
19
Patent #:
Issue Dt:
01/09/2001
Application #:
09404889
Filing Dt:
09/24/1999
Title:
ENHANCED PULSE WIDTH MODULATOR
20
Patent #:
Issue Dt:
05/01/2001
Application #:
09405805
Filing Dt:
09/24/1999
Title:
METHOD FOR ENHANCING ANTIREFLECTIVE COATINGS USED IN PHOTOLIGHOGRAPHY OF ELECTRONIC DEVICES
21
Patent #:
Issue Dt:
01/17/2006
Application #:
09405901
Filing Dt:
09/24/1999
Title:
MACROBLOCK LEVEL INTRAREFRESH TECHNIQUE FOR ENCODED VIDEO
22
Patent #:
Issue Dt:
10/23/2001
Application #:
09406308
Filing Dt:
09/27/1999
Title:
METHOD FOR IMPROVING BALL JOINTS IN SEMICONDUCTOR PACKAGES
23
Patent #:
Issue Dt:
05/01/2001
Application #:
09407357
Filing Dt:
09/29/1999
Title:
VACUUM VALVE INTERFACE
24
Patent #:
Issue Dt:
09/18/2001
Application #:
09408016
Filing Dt:
09/29/1999
Title:
DIGITAL-TO-ANALOG CONVERTER USING WEIGHTS STORED IN A WEIGHT TABLE
25
Patent #:
Issue Dt:
11/26/2002
Application #:
09410187
Filing Dt:
09/30/1999
Title:
METHODS AND SYSTEMS FOR DYNAMIC SELECTION OF ERROR RECOVERY PROCEDUREDS IN A MANAGED DEVICE
26
Patent #:
Issue Dt:
05/07/2002
Application #:
09410405
Filing Dt:
10/01/1999
Title:
FLEXIBLE WIDTH CELL LAYOUT ARCHITECTURE
27
Patent #:
Issue Dt:
08/14/2001
Application #:
09411342
Filing Dt:
10/01/1999
Title:
DIGITALLY CALIBRATED BANDGAP REFERENCE
28
Patent #:
Issue Dt:
03/12/2002
Application #:
09413667
Filing Dt:
10/06/1999
Title:
SUBTRACTIVE OXIDATION METHOD OF FABRICATING A SHORT-LENGTH AND VERTICALLY-ORIENTED CHANNEL,DUAL-GATE,CMOS FET
29
Patent #:
Issue Dt:
07/30/2002
Application #:
09417255
Filing Dt:
10/12/1999
Title:
METHOD FOR ASSEMBLING TAPE BALL GRID ARRAYS
30
Patent #:
Issue Dt:
12/30/2003
Application #:
09420636
Filing Dt:
10/21/1999
Title:
ASYNCHRONOUS BIST FOR EMBEDDED MULTIPORT MEMORIES
31
Patent #:
Issue Dt:
05/04/2004
Application #:
09421844
Filing Dt:
10/20/1999
Title:
METHOD OF AUTOMATICALLY MIGRATING INFORMATION FROM A SOURCE TO AN ASSEMBLAGE OF STRUCTURED DATA CARRIERS AND ASSOCIATED SYSTEM AND ASSEMBLAGE OF DATA CARRIERS
32
Patent #:
Issue Dt:
06/03/2003
Application #:
09423596
Filing Dt:
12/01/1999
Title:
IMPROVEMENTS IN MICROPROCESSOR DEVELOPMENT SYSTEMS
33
Patent #:
Issue Dt:
07/23/2002
Application #:
09425552
Filing Dt:
10/22/1999
Title:
METHOD FOR FORMING INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT MATERIAL AND HAVING SILICON OXYNITRIDE CAPS OVER CLOSELY SPACED APART METAL LINES
34
Patent #:
Issue Dt:
12/17/2002
Application #:
09426034
Filing Dt:
10/25/1999
Title:
BUILT-IN SELF REPAIR CIRCUIT WITH PAUSE FOR DATA RETENTION COVERAGE
35
Patent #:
Issue Dt:
05/21/2002
Application #:
09426056
Filing Dt:
10/22/1999
Title:
LOW K DIELECTRIC COMPOSITE LAYER FOR INTERGRATED CIRCUIT STRUCTURE WHICH PROVIDES VOID-FREE LOW K DIELECTRIC MATERIAL BETWEEN METAL LINES WHILE MITIGATING VIA POISONING
36
Patent #:
Issue Dt:
06/29/2004
Application #:
09426061
Filing Dt:
10/22/1999
Title:
LOW DIELECTRIC CONSTANT SILICON OXIDE-BASED DIELECTRIC LAYER FOR INTEGRATED CIRCUIT STRUCTURES HAVING IMPROVED COMPATIBILITY WITH VIA FILLER MATERIALS, AND METHOD OF MAKING SAME
37
Patent #:
Issue Dt:
11/13/2001
Application #:
09428344
Filing Dt:
10/26/1999
Title:
PROCESS FOR REMOVING RESIST MASK OF INTEGRATED CIRCUIT STRUCTURE WHICH MITIGATES DAMAGE TO UNDERLYING LOW DIELECTRIC CONSTANT SILICON OXIDE DIELECTRIC LAYER
38
Patent #:
Issue Dt:
01/07/2003
Application #:
09428799
Filing Dt:
10/28/1999
Title:
FAST BUILT-IN SELF-REPAIR CIRCUIT
39
Patent #:
Issue Dt:
01/21/2003
Application #:
09431606
Filing Dt:
11/01/1999
Title:
METHOD FOR OUT-OF-BAND NETWORK COMMUNICATION
40
Patent #:
Issue Dt:
07/18/2000
Application #:
09434340
Filing Dt:
11/05/1999
Title:
DEPLETION FREE POLYSILICON GATE ELECTRODES
41
Patent #:
Issue Dt:
04/29/2003
Application #:
09436535
Filing Dt:
11/09/1999
Title:
COMMUNICATIONS RECEIVER HAVING ADAPTIVE DYNAMIC RANGE
42
Patent #:
Issue Dt:
11/11/2003
Application #:
09437454
Filing Dt:
11/10/1999
Title:
METHOD AND APPARATUS FOR MULTI-CHANNEL DATA DELAY EQUALIZATION
43
Patent #:
Issue Dt:
05/06/2003
Application #:
09437464
Filing Dt:
11/10/1999
Title:
SYSTEM FOR MEASURING DELAY OF DIGITAL SIGNAL USING CLOCK GENERATOR AND DELAY UNIT WHEREIN A SET OF DIGITAL ELEMENTS OF CLOCK GENERATOR IDENTICAL TO A SET OF DIGITAL ELEMENTS OF DELAY UNIT
44
Patent #:
Issue Dt:
11/05/2002
Application #:
09437559
Filing Dt:
11/10/1999
Title:
METHOD OF USING BOTH A NON-FILLED FLUX UNDERFILL AND A FILLED FLUX UNDERFILL TO MANUFACTURE A FLIP-CHIP
45
Patent #:
Issue Dt:
11/14/2000
Application #:
09438642
Filing Dt:
11/12/1999
Title:
PROCESS FOR FORMING LOW K SILICON OXIDE DIELECTRIC MATERIAL WHILE SUPPRESSING PRESSURE SPIKING AND INHIBITING INCREASE IN DIELECTRIC CONSTANT
46
Patent #:
Issue Dt:
04/16/2002
Application #:
09440492
Filing Dt:
11/15/1999
Title:
METHOD OF ADDING FILLER INTO A NON-FILLED UNDERFILL SYSTEM BY USING A HIGHLY FILLED FILLET
47
Patent #:
Issue Dt:
08/14/2001
Application #:
09441250
Filing Dt:
11/16/1999
Title:
ADAPTIVE CANCELLATION OF TIME VARIANT DC OFFSET
48
Patent #:
Issue Dt:
05/06/2003
Application #:
09441543
Filing Dt:
11/16/1999
Title:
BACKSIDE LIQUID CRYSTAL ANALYSIS TECHNIQUE FOR FLIP-CHIP PACKAGES
49
Patent #:
Issue Dt:
09/25/2001
Application #:
09443036
Filing Dt:
11/18/1999
Title:
DUAL-THICKNESS SOLDER MASK IN INTEGRATED CIRCUIT PACKAGE
50
Patent #:
Issue Dt:
07/24/2001
Application #:
09444424
Filing Dt:
11/19/1999
Title:
PREDRIVER FOR HIGH FREQUENCY DATA TRANSCEIVER
51
Patent #:
Issue Dt:
10/09/2001
Application #:
09448307
Filing Dt:
11/24/1999
Title:
INTEGRATED CIRCUIT I/O BUFFER WITH SERIES P-CHANNEL AND FLOATING WELL
52
Patent #:
Issue Dt:
01/30/2001
Application #:
09448677
Filing Dt:
11/24/1999
Title:
VOLTAGE TOLERANT OSCILLATOR INPUT CELL
53
Patent #:
Issue Dt:
09/17/2002
Application #:
09448793
Filing Dt:
11/23/1999
Title:
METHOD AND APPARATUS FOR SWITCHING CLOCKS PRESENTED TO SYNCHRONOUS SRAMS
54
Patent #:
Issue Dt:
04/01/2003
Application #:
09449324
Filing Dt:
11/24/1999
Title:
CAPACITANCE ESTIMATION
55
Patent #:
Issue Dt:
01/28/2003
Application #:
09449403
Filing Dt:
11/26/1999
Title:
MIRROR ADDRESSING IN A DSP
56
Patent #:
Issue Dt:
10/14/2003
Application #:
09452272
Filing Dt:
11/30/1999
Title:
METHOD FOR SYNCHRONIZING TIMING SIGNALS
57
Patent #:
Issue Dt:
10/02/2001
Application #:
09454257
Filing Dt:
12/02/1999
Title:
SLURRY FILLING A RECESS FORMED DURING SEMICONDUCTOR FABRICATION
58
Patent #:
Issue Dt:
04/04/2006
Application #:
09457021
Filing Dt:
12/07/1999
Title:
SPECULATIVE PACKET SELECTION FOR TRANSMISSION OF ISOCHRONOUS DATA
59
Patent #:
Issue Dt:
08/06/2002
Application #:
09457117
Filing Dt:
12/07/1999
Title:
METHOD AND APPARATUS FOR AUDIO AND VIDEO END-TO-END SYNCHRONIZATION
60
Patent #:
Issue Dt:
01/15/2002
Application #:
09459507
Filing Dt:
12/13/1999
Title:
METHOD AND APPARATUS FOR OPTIMIZING CROSSOVER VOLTAGE FOR DIFFERENTIAL PAIR SWITCHES IN A CURRENT-STEERING DIGITAL-TO-ANALOG CONVERTER OR THE LIKE
61
Patent #:
Issue Dt:
07/06/2004
Application #:
09464297
Filing Dt:
12/15/1999
Title:
PROCESS FOR ETCHING A CONTROLLABLE THICKNESS OF OXIDE ON AN INTEGRATED CIRCUIT STRUCTURE ON A SEMICONDUCTOR SUBSTRATE USING NITROGEN PLASMA AND PLASMA AND AN RF BIAS APPLIED TO THE SUBSTRATE
62
Patent #:
Issue Dt:
07/01/2003
Application #:
09464623
Filing Dt:
12/16/1999
Title:
PROGRAMMABLE ASIC
63
Patent #:
Issue Dt:
08/13/2002
Application #:
09464741
Filing Dt:
12/16/1999
Title:
METHOD FOR PROGRAMMING AN FPGA AND IMPLEMENTING AN FPGA INTERCONNECT USING CLOCK CONTROLS
64
Patent #:
Issue Dt:
11/08/2005
Application #:
09465131
Filing Dt:
12/16/1999
Title:
METHOD AND APPARATUS FOR THERMAL PROFILING OF FLIP-CHIP PACKAGES
65
Patent #:
Issue Dt:
05/28/2002
Application #:
09465132
Filing Dt:
12/16/1999
Title:
METHOD AND APPARATUS FOR CLEANING AND REMOVING FLUX FROM AN ELECTRONIC COMPONENT PACKAGE
66
Patent #:
Issue Dt:
11/20/2001
Application #:
09465425
Filing Dt:
12/20/1999
Title:
METHOD AND STRUCTURE FOR REDUCING THE INCIDENCE OF VOIDING IN AN UNDERFILL LAYER OF AN ELECTRONIC COMPONENT PACKAGE
67
Patent #:
Issue Dt:
01/07/2003
Application #:
09466389
Filing Dt:
12/17/1999
Title:
MULTI-CONDITION BISR TEST MODE FOR MEMORIES WITH REDUNDANCY
68
Patent #:
Issue Dt:
10/09/2001
Application #:
09466519
Filing Dt:
12/17/1999
Title:
FAST COMPARATOR SUITABLE FOR BIST AND BISR APPLICATIONS
69
Patent #:
Issue Dt:
12/30/2003
Application #:
09467461
Filing Dt:
12/20/1999
Title:
METHODOLOGY FOR PROVIDING PERSISTENT TARGET IDENTIFICATION IN A FIBRE CHANNEL ENVIRONMENT
70
Patent #:
Issue Dt:
04/23/2002
Application #:
09467622
Filing Dt:
12/20/1999
Title:
METHOD AND APPARATUS FOR DETECTING PRESENCE OF RESIDUAL POLISHING SLURRY SUBSEQUENT TO POLISHING OF A SEMICONDUCTOR WAFER
71
Patent #:
Issue Dt:
11/26/2002
Application #:
09468577
Filing Dt:
12/21/1999
Title:
REED-SOLOMON DECODER
72
Patent #:
Issue Dt:
03/01/2005
Application #:
09468746
Filing Dt:
12/21/1999
Title:
RECEIVE DESERIALIZER CIRCUIT FOR FRAMING PARALLEL DATA
73
Patent #:
Issue Dt:
01/29/2002
Application #:
09469579
Filing Dt:
12/22/1999
Title:
METHOD OF FABRICATING AN INDIUM FIELD IMPLANT FOR PUNCHTHROUGH PROTECTION IN SEMICONDUCTOR DEVICES
74
Patent #:
Issue Dt:
09/11/2001
Application #:
09469730
Filing Dt:
12/21/1999
Title:
RECEIVE DESERIALIZER FOR REGENERATING PARALLEL DATA SERIALLY TRANSMITTED OVER MULTIPLE CHANNELS
75
Patent #:
Issue Dt:
09/23/2003
Application #:
09470004
Filing Dt:
12/22/1999
Title:
SYNCHRONIZATION OF SUPER FRAMES IN AN INTEGRATED SERVICES DIGITAL BROADCASTING FOR SATELLITIES ISDB-S SYSTEM
76
Patent #:
Issue Dt:
09/23/2003
Application #:
09470362
Filing Dt:
12/22/1999
Title:
CYCLE MODELING IN CYCLE ACCURATE SOFTWARE SIMULATORS OF HARDWARE MODULES FOR SOFTWARE/SOFTWARE CROSS-SIMULATION AND HARDWARE/SOFTWARE CO-SIMULATION
77
Patent #:
Issue Dt:
07/22/2003
Application #:
09471642
Filing Dt:
12/23/1999
Title:
DUAL-PORT SCSI SUB-SYSTEM WITH FAIL-OVER CAPABILITIES
78
Patent #:
Issue Dt:
08/14/2001
Application #:
09471842
Filing Dt:
12/23/1999
Title:
METHOD AND APPARATUS FOR MAINTAINING TEST DATA DURING FABRICATION OF A SEMICONDUCTOR WAFER
79
Patent #:
Issue Dt:
11/01/2005
Application #:
09472630
Filing Dt:
12/27/1999
Title:
SYSTEM AND METHOD FOR COMMUNICATING IMAGES TO A REMOVABLE MEDIA DEVICE
80
Patent #:
Issue Dt:
07/01/2003
Application #:
09472670
Filing Dt:
12/27/1999
Title:
FADING OF MAIN VIDEO SIGNAL WITHOUT AFFECTING DISPLAY OF SUPERIMPOSED VIDEO SIGNAL
81
Patent #:
Issue Dt:
04/27/2004
Application #:
09473382
Filing Dt:
12/28/1999
Title:
SIMULTANEOUS MULTIPLE-ANGLE PRESENTATION OF DVD AUDIO/VISUAL CONTENT
82
Patent #:
Issue Dt:
06/24/2003
Application #:
09473777
Filing Dt:
12/29/1999
Title:
POWER CONTROL DURING INTER-GENERATION SOFT HANDOFFS
83
Patent #:
Issue Dt:
11/27/2001
Application #:
09474666
Filing Dt:
12/29/1999
Title:
DUAL NITROGEN IMPLANTATION TECHNIQUES FOR OXYNITRIDE FORMATION IN SEMICONDUCTOR DEVICES
84
Patent #:
Issue Dt:
08/03/2004
Application #:
09476395
Filing Dt:
12/30/1999
Title:
METHOD AND FORMAT FOR READING AND WRITING IN A MULTILEVEL OPTICAL DATA SYSTEM
85
Patent #:
Issue Dt:
03/30/2004
Application #:
09477317
Filing Dt:
01/04/2000
Title:
INTEGRATED SERVICES DIGITAL BROADCASTING DEINTERLEAVER ARCHITECTURE
86
Patent #:
Issue Dt:
04/27/2004
Application #:
09477658
Filing Dt:
01/05/2000
Title:
LOWER-JITTER PHASE-LOCKED LOOP
87
Patent #:
Issue Dt:
01/28/2003
Application #:
09477692
Filing Dt:
01/06/2000
Title:
SYSTEM FOR MODELIING A PROCESSOR -ENCODER INTERFACE BY COUNTING NUMBER OF FAST CLOCK CYCLES OCCURING IN ONE SLOWER CLOCK CYCLE AND TRIGGERING A DOMAIN MODULE IF FAST CLOCK REACHES THE CORRESPONDING NUMBER OF CYCLES
88
Patent #:
Issue Dt:
02/12/2002
Application #:
09478164
Filing Dt:
01/05/2000
Title:
SUBSTRATE POSITION LOCATION SYSTEM LSI LOGIC CORPORATION
89
Patent #:
Issue Dt:
08/06/2002
Application #:
09478972
Filing Dt:
01/06/2000
Title:
INTERPOSER TAPE FOR SEMICONDUCTOR PACKAGE
90
Patent #:
Issue Dt:
05/25/2004
Application #:
09480220
Filing Dt:
01/10/2000
Title:
HYBRID STATE MACHINE FOR FRAME SYNCHRONIZATION
91
Patent #:
Issue Dt:
07/03/2001
Application #:
09481891
Filing Dt:
01/12/2000
Title:
BUILT-IN SELF-TEST UNIT HAVING A RECONFIGURABLE DATA RETENTION TEST
92
Patent #:
Issue Dt:
06/11/2002
Application #:
09482291
Filing Dt:
01/13/2000
Title:
CURRENT-MODE PEAK DETECTOR
93
Patent #:
Issue Dt:
08/24/2004
Application #:
09484630
Filing Dt:
01/18/2000
Title:
METHOD AND APPARATUS FOR ESTIMATING THE LENGTH OF A TRANSMISSION LINE
94
Patent #:
Issue Dt:
09/10/2002
Application #:
09487984
Filing Dt:
01/20/2000
Title:
MULTIPLE METAL ETCHANT SYSTEM FOR INTEGRATED CIRCUITS
95
Patent #:
Issue Dt:
08/28/2001
Application #:
09488438
Filing Dt:
01/20/2000
Title:
Loose die fixture
96
Patent #:
Issue Dt:
04/09/2002
Application #:
09489302
Filing Dt:
01/21/2000
Title:
VERTICALLY INTEGRATED FLIP CHIP SEMICONDUCTOR PACKAGE
97
Patent #:
Issue Dt:
09/03/2002
Application #:
09493467
Filing Dt:
01/28/2000
Title:
SPARE CELLS PLACEMENT METHODOLOGY
98
Patent #:
Issue Dt:
06/04/2002
Application #:
09494070
Filing Dt:
01/28/2000
Title:
HEAT DISSIPATING APPARATUS AND METHOD FOR ELECTRONIC COMPONENTS
99
Patent #:
Issue Dt:
07/23/2002
Application #:
09494605
Filing Dt:
01/31/2000
Title:
SYSTEMATIC SKEW REDUCTION THROUGH BUFFER RESIZING
100
Patent #:
Issue Dt:
02/25/2003
Application #:
09496031
Filing Dt:
02/02/2000
Title:
RAID LUN CREATION USING PROPORTIONAL DISK MAPPING
Assignor
1
Exec Dt:
04/06/2007
Assignee
1
1320 RIDDER PARK DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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