|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
09741568
|
Filing Dt:
|
12/19/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/20/2002
| | | | |
|
Title:
|
CARBON-DOPED HARD MASK AND METHOD OF PASSIVATING STRUCTURES DURING SEMICONDUCTOR DEVICE FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09746748
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
OPTICAL DISK INITIALIZATION METHOD AND APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
09746796
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
MICROCODE BASED HARDWARE TRANSLATOR TO SUPPORT A MULTITUDE OF PROCESSORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09747638
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
INTEGRATED CIRCUIT FABRICATION DUAL PLASMA PROCESS WITH SEPARATE INTRODUCTION OF DIFFERENT GASES INTO GAS FLOW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2006
|
Application #:
|
09748029
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
USE OF INTERNAL GENERAL PURPOSE REGISTERS OF A PROCESSOR AS A JAVA VIRTUAL MACHINE TOP OF STACK AND DYNAMIC ALLOCATION OF THE REGISTERS ACCORDING TO STACK STATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
09748030
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
USE OF LIMITED PROGRAM SPACE OF GENERAL PURPOSE PROCESSOR FOR UNLIMITED SEQUENCE OF TRANSLATED INSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
09748324
|
Filing Dt:
|
12/26/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
METHODS AND SYSTEMS FOR INTELLIGENT I/O CONTROLLER WITH CHANNEL EXPANDABILITY VIA MASTER/SLAVE CONFIGURATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
09748641
|
Filing Dt:
|
12/22/2000
|
|
Title:
|
INTERRUPT HANDLING MECHANISM IN TRANSLATOR FROM ONE INSTRUCTION SET TO ANOTHER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09750639
|
Filing Dt:
|
12/28/2000
|
|
Title:
|
ARRANGEMENT AND METHOD FOR POLISHING A SURFACE OF A SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
09751760
|
Filing Dt:
|
12/29/2000
|
|
Title:
|
METHOD AND APPARATUS FOR A MULTIPURPOSE CONFIGURABLE BUS INDEPENDENT SIMULATION BUS FUNCTIONAL MODEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2002
|
Application #:
|
09752357
|
Filing Dt:
|
12/29/2000
|
|
Title:
|
Dual threshold voltage sense amplifier
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2003
|
Application #:
|
09752626
|
Filing Dt:
|
12/28/2000
|
|
Title:
|
SIX-TO-ONE SIGNAL/POWER RATIO BUMP AND TRACE PATTERN FOR FLIP CHIP DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2002
|
Application #:
|
09753000
|
Filing Dt:
|
12/30/2000
|
|
Title:
|
IRREGULAR GRID BOND PAD LAYOUT ARRANGEMENT FOR A FLIP CHIP PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09754429
|
Filing Dt:
|
01/04/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2001
| | | | |
|
Title:
|
Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical system
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
09756506
|
Filing Dt:
|
01/08/2001
|
|
Title:
|
FLIP CHIP TRACE LIBRARY GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2004
|
Application #:
|
09758603
|
Filing Dt:
|
01/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
|
Title:
|
ROUTING TECHNIQUE TO ADJUST CLOCK SKEW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
09758909
|
Filing Dt:
|
01/10/2001
|
|
Title:
|
METHOD AND APPARATUS FOR MANAGING ACCOUNTS PAYABLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
09758972
|
Filing Dt:
|
01/10/2001
|
|
Title:
|
METHOD AND APPARATUS FOR MANAGING MULTIPLE PROJECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
09759921
|
Filing Dt:
|
01/12/2001
|
|
Title:
|
AUTOMATIC DEADLOCK PREVENTION VIA ARBITRATION SWITCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
09761172
|
Filing Dt:
|
01/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
|
Title:
|
MULTISTAGE DIGITAL CROSS CONNECT WITH INTEGRAL FRAME TIMING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
09761538
|
Filing Dt:
|
01/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2001
| | | | |
|
Title:
|
MULTISTAGE DIGITAL CROSS CONNECT WITH SYNCHRONIZED CONFIGURATION SWITCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
09761539
|
Filing Dt:
|
01/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
|
Title:
|
TIME SLOT INTERCHANGER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
|
Application #:
|
09766104
|
Filing Dt:
|
01/19/2001
|
|
Title:
|
HEAT SINK WITH CHIP DIE EMC GROUND INTERCONNECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
09767585
|
Filing Dt:
|
01/22/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
|
Title:
|
BUILT-IN SELF-REPAIR WRAPPER METHODOLOGY, DESIGN FLOW AND DESIGN ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
09773033
|
Filing Dt:
|
02/01/2001
|
|
Title:
|
METHOD AND APPARATUS FOR DECODING M-PSK TURBO CODE USING NEW APPROXIMATION TECHNIQUE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
09774501
|
Filing Dt:
|
01/31/2001
|
|
Title:
|
PARALLEL/SERIAL SCSI WITH LEGACY SUPPORT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
09776000
|
Filing Dt:
|
02/02/2001
|
|
Title:
|
STRUCTURE AND METHOD FOR WAFER COMPRISING DIELECTRIC AND SEMICONDUCTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
09776989
|
Filing Dt:
|
02/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/31/2002
| | | | |
|
Title:
|
ELECTRODE FOR PTC THERMISTOR AND METHOD FOR PRODUCING THE SAME, AND PTC THERMISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
09777996
|
Filing Dt:
|
02/06/2001
|
|
Title:
|
CLUSTER TOOL REPORTING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2005
|
Application #:
|
09779530
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/29/2001
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR IMPLEMENTING AN END-TO-END ERROR-CORRECTING PROTOCOL IN A VOICE BAND DATA RELAY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
09779564
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/09/2003
| | | | |
|
Title:
|
METHOD FOR ELIMINATING MULTIPLE MODULATING AND DEMODULATING OF GROUP 3 FAX OVER PACKET AND LOW DATA RATE DIGITAL NETWORKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
09779749
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
FAX TRANMISSION OVER CONGESTED OR CORRUPTED WIDEBAND NETWORK, OR NARROWBAND NETWORK, USING ECM ERROR BLOCK FLOW CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09779750
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR OPTIMIZED FACSIMILE TRANSMISSION SPEED OVER A BANDWIDTH LIMITED NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2004
|
Application #:
|
09780061
|
Filing Dt:
|
02/09/2001
|
|
Title:
|
SIMPLE MECHANISM FOR GUARANTEEING IN ORDER READ DATA RETURN ON A SPLIT TRANSACTION BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2002
|
Application #:
|
09782806
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
LOW-POWER DATA SERIALIZER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2002
|
Application #:
|
09782842
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
RESISTIVELY-LOADED CURRENT-MODE OUTPUT BUFFER WITH SLEW RATE CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2002
|
Application #:
|
09783231
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
DATA SERIALIZER WITH SLEW-RATE CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09783653
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
SINGLE CHANNEL FOUR TRANSISTOR SRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2002
|
Application #:
|
09783690
|
Filing Dt:
|
02/14/2001
|
|
Title:
|
REDUCED-SWING DIFFERENTIAL OUTPUT BUFFER WITH IDLE FUNCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09784548
|
Filing Dt:
|
02/15/2001
|
|
Title:
|
SIMPLE AND SCALABLE RAID XOR ASSIST LOGIC WITH OVERLAPPED OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
09784587
|
Filing Dt:
|
02/15/2001
|
|
Title:
|
AMBA BUS OFF-CHIP BRIDGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09788257
|
Filing Dt:
|
02/15/2001
|
|
Title:
|
BALANCED CLOCK PLACEMENT FOR INTEGRATED CIRCUITS CONTAINING MEGACELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09789108
|
Filing Dt:
|
02/20/2001
|
|
Title:
|
PLACEMENT-BASED INTEGRATED CIRCUIT RE-SYNTHESIS TOOL USING ESTIMATED MAXIMUM INTERCONNECT CAPACITANCES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
09790088
|
Filing Dt:
|
02/20/2001
|
|
Title:
|
INSTALLATION AND ACCESS OF A DEVICE HANDLER FOR A PERIPHERAL DEVICE IN A COMPUTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
09792100
|
Filing Dt:
|
02/23/2001
|
|
Title:
|
VERSATILE WRITE BUFFER FOR A MICROPROCESSOR AND METHOD USING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
|
Application #:
|
09792321
|
Filing Dt:
|
02/23/2001
|
|
Title:
|
METHOD OF PROTECTING ACID-CATALYZED PHOTORESIST FROM CHIP-GENERATED BASIC CONTAMINANTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2003
|
Application #:
|
09792683
|
Filing Dt:
|
02/23/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/29/2002
| | | | |
|
Title:
|
PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2005
|
Application #:
|
09792685
|
Filing Dt:
|
02/23/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/29/2002
| | | | |
|
Title:
|
PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
09792691
|
Filing Dt:
|
02/23/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/29/2002
| | | | |
|
Title:
|
PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2003
|
Application #:
|
09794852
|
Filing Dt:
|
02/27/2001
|
|
Title:
|
FIELD FREEZE FILTER IMPLEMENTATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2005
|
Application #:
|
09795767
|
Filing Dt:
|
02/28/2001
|
|
Title:
|
SYSTEM AND METHOD FOR MEASURING BUS FREQUENCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2003
|
Application #:
|
09795770
|
Filing Dt:
|
02/28/2001
|
|
Title:
|
PCI-X BUS SYSTEM TESTING AND VERIFICATION APPARATUS AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
09800532
|
Filing Dt:
|
03/06/2001
|
|
Title:
|
METHOD FOR MINIMIZING CLOCK SKEW FOR AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09801007
|
Filing Dt:
|
03/07/2001
|
|
Title:
|
METHOD FOR MANUFACTURING A DUAL CHIP IN PACKAGE WITH A FLIP CHIP DIE MOUNTED ON A WIRE BONDED DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09801392
|
Filing Dt:
|
03/07/2001
|
|
Title:
|
CELL INTERCONNECT DELAY LIBRARY FOR INTEGRATED CIRCUIT DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09802043
|
Filing Dt:
|
03/08/2001
|
|
Title:
|
GRIDLESS ROUTER USING MAZE AND LINE PROBE TECHNIQUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09802424
|
Filing Dt:
|
03/09/2001
|
|
Title:
|
SUBSTRATE PROCESSING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2002
|
Application #:
|
09804118
|
Filing Dt:
|
03/12/2001
|
|
Title:
|
Integrated circuit having radially varying power bus grid architecture
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
09804783
|
Filing Dt:
|
03/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
|
Title:
|
METAL PLANARIZATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2003
|
Application #:
|
09804939
|
Filing Dt:
|
03/13/2001
|
|
Title:
|
CHANNEL ROUTER WITH BUFFER INSERTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09805642
|
Filing Dt:
|
03/13/2001
|
|
Title:
|
METHOD OF DATAPATH CELL PLACEMENT FOR AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09808441
|
Filing Dt:
|
03/14/2001
|
|
Title:
|
POWER MESH BRIDGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09808510
|
Filing Dt:
|
03/14/2001
|
|
Title:
|
METHOD FOR ESTIMATING POROSITY OF HARDMACS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09808549
|
Filing Dt:
|
03/14/2001
|
|
Title:
|
FULL-CHIP EXTRACTION OF INTERCONNECT PARASITIC DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
09814417
|
Filing Dt:
|
03/21/2001
|
|
Title:
|
DRIVER WAVEFORM MODELING WITH MULTIPLE EFFECTIVE CAPACITANCES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
09815519
|
Filing Dt:
|
03/23/2001
|
|
Title:
|
BUILT-IN SELF TEST FOR SPEED AND TIMING MARGIN FOR A SOURCE SYNCHRONOUS IO INTER FACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2005
|
Application #:
|
09815987
|
Filing Dt:
|
03/22/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
|
Title:
|
MINIMAL LATENCY SERIAL MEDIA INDEPENDENT INTERFACE TO MEDIA INDEPENDENT INTERFACE CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2002
|
Application #:
|
09817642
|
Filing Dt:
|
03/26/2001
|
|
Title:
|
CONCENTRIC METAL DENSITY POWER ROUTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2002
|
Application #:
|
09820059
|
Filing Dt:
|
03/28/2001
|
|
Title:
|
DISTRIBUTION DEPENDENT CLUSTERING IN BUFFER INSERTION OF HIGH FANOUT NETS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2006
|
Application #:
|
09820477
|
Filing Dt:
|
03/28/2001
|
|
Title:
|
DATA PACKET CONGESTION MANAGEMENT TECHNIQUE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09820577
|
Filing Dt:
|
03/28/2001
|
|
Title:
|
SOURCE PULSED, LOW VOLTAGE CMOS SRAM CELL FOR FAST, STABLE OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2005
|
Application #:
|
09821226
|
Filing Dt:
|
03/28/2001
|
|
Title:
|
JTAG TEST ACCESS PORT CONTROLLER USED TO CONTROL INPUT/OUTPUT PAD FUNCTIONALITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
09821555
|
Filing Dt:
|
03/28/2001
|
|
Title:
|
ADAPTIVE NOISE CANCELLATION (ANC) FOR DVD SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/2005
|
Application #:
|
09821886
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
DIGITAL CLOCK RECOVERY PPL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
09822041
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
DIGITAL CLOCK RECOVERY PLL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
09822112
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
DIGITAL CLOCK RECOVERY PLL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
09822665
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
GRANT REMOVAL VIA DUMMY MASTER ARBITRATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
09822969
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
EDITING PROTOCOL FOR FLEXIBLE SEARCH ENGINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
09823184
|
Filing Dt:
|
03/29/2001
|
|
Title:
|
METHOD OF DATAPATH CELL PLACEMENT FOR BITWISE AND NON-BITWISE INTEGRATED CIRCUIT DESIGNS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
09823852
|
Filing Dt:
|
03/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/08/2001
| | | | |
|
Title:
|
HIGH DENSITY ANALOG RECORDING USING WRITE SYMBOLS HAVING DISTINGUISHABLE READOUT WAVEFORMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2005
|
Application #:
|
09827434
|
Filing Dt:
|
04/06/2001
|
|
Title:
|
WIRE DELAY DISTRIBUTED MODEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
09828311
|
Filing Dt:
|
04/06/2001
|
|
Title:
|
DIGITAL AUTOMATIC GAIN CONTROL OF A MULTILEVEL OPTICAL DISC READ SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
09828553
|
Filing Dt:
|
04/05/2001
|
|
Title:
|
BUFFER CELL INSERTION AND ELECTRONIC DESIGN AUTOMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
09829373
|
Filing Dt:
|
04/09/2001
|
|
Title:
|
APPARATUS AND METHOD FOR SYSTEM ACCESS TO TAP CONTROLLED BIST OF RANDOM ACCESS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2001
|
Application #:
|
09829377
|
Filing Dt:
|
04/09/2001
|
|
Title:
|
Synchronizing data operations across a synchronization boundary between different clock domains using two-hot encoding
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
|
09833142
|
Filing Dt:
|
04/11/2001
|
|
Title:
|
PROCESS FOR SOLVING ASSIGNMENT PROBLEMS IN INTEGRATED CIRCUIT DESIGNS WITH UNIMODAL OBJECT PENALTY FUNCTIONS AND LINEARLY ORDERED SET OF BOXES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
09834013
|
Filing Dt:
|
04/12/2001
|
|
Title:
|
BUS SEQUENCE OPERATION WITH AUTOMATIC LINKING FROM CURRENT I/O INFORMATION TO SUBSEQUENT I/O INFORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
09834368
|
Filing Dt:
|
04/13/2001
|
|
Title:
|
WRITE-AHEAD LOG IN DIRECTORY MANAGEMENT FOR CONCURRENT I/O ACCESS FOR BLOCK STORAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
09836075
|
Filing Dt:
|
04/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
|
Title:
|
DIRECT MEMORY ACCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
|
Application #:
|
09836129
|
Filing Dt:
|
04/16/2001
|
|
Title:
|
STATIC TIMING ANALYSIS VALIDATION TOOL FOR ASIC CORES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
09836895
|
Filing Dt:
|
04/17/2001
|
|
Title:
|
SCSI PHASE SPECIFIC BUS RESET GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
09837492
|
Filing Dt:
|
04/18/2001
|
|
Title:
|
CHIP CORE SIZE ESTIMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09838784
|
Filing Dt:
|
04/19/2001
|
|
Title:
|
BANDWIDTH MANAGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09839441
|
Filing Dt:
|
04/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR GENERATING AND CONTROLLING INTEGRATED CIRCUIT MEMORY WRITE SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
09839897
|
Filing Dt:
|
04/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR IMPLEMENTING LOW LATENCY CROSSBAR SWITCHES WITH INTEGRATED STORAGE SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09839925
|
Filing Dt:
|
04/20/2001
|
|
Title:
|
CONTACT ESCAPE PATTERN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2003
|
Application #:
|
09841824
|
Filing Dt:
|
04/25/2001
|
|
Title:
|
ASSIGNMENT OF CELL COORDINATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2003
|
Application #:
|
09841825
|
Filing Dt:
|
04/25/2001
|
|
Title:
|
TIMING RECOMPUTATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2005
|
Application #:
|
09842214
|
Filing Dt:
|
04/25/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2002
| | | | |
|
Title:
|
METHOD OF FABRICATING SUB-MICRON HEMISPHERICAL AND HEMICYLIDRICAL STRUCTURES FROM NON-SPHERICALLY SHAPED TEMPLATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2002
|
Application #:
|
09842350
|
Filing Dt:
|
04/25/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
|
Title:
|
PARALLELIZATION OF RESYNTHESIS
|
|
