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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09843443
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Filing Dt:
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04/26/2001
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Title:
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DUAL CHIP IN PACKAGE WITH A WIRE BONDED DIE MOUNTED TO A SUBSTRATE
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Patent #:
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03/04/2003
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09844299
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Filing Dt:
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04/26/2001
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Title:
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SUPPLY DEGRADATION COMPENSATION FOR MEMORY SELF TIME CIRCUITS
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Issue Dt:
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07/27/2004
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09844352
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Filing Dt:
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04/27/2001
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Title:
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IN SITU LINER BARRIER
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Patent #:
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Issue Dt:
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01/28/2003
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09844361
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Filing Dt:
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04/27/2001
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Title:
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DENSITY DRIVEN ASSIGNMENT OF COORDINATES
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Patent #:
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Issue Dt:
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07/22/2003
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09844531
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Filing Dt:
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04/27/2001
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Title:
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ANALOG CAPACITOR DUAL DAMASCENE PROCESS
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Patent #:
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Issue Dt:
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02/17/2004
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09845909
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Filing Dt:
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04/30/2001
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Title:
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METHOD AND APPARATUS FOR LOADING/STORING MULTIPLE DATA SOURCES TO COMMON MEMORY UNIT
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Issue Dt:
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08/13/2002
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09846435
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Filing Dt:
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05/01/2001
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Title:
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TEST FIXTURE FOR FLIP CHIP BALL GRID ARRAY CIRCUITS
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Patent #:
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Issue Dt:
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12/31/2002
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09847460
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Filing Dt:
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05/02/2001
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Title:
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CIRCUIT MODELING
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09847838
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Filing Dt:
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04/30/2001
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Publication #:
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Pub Dt:
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10/31/2002
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Title:
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RTL ANNOTATION TOOL FOR LAYOUT INDUCED NETLIST CHANGES
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Issue Dt:
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05/11/2004
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09847848
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Filing Dt:
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04/30/2001
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Title:
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PARAMETERIZABLE QUEUED MEMORY ACCESS SYSTEM
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Patent #:
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Issue Dt:
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12/10/2002
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09848489
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Filing Dt:
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05/03/2001
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Title:
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METHOD AND APPARATUS FOR INDENTIFYING CAUSES OF POOR SILICON-TO-SIMULATION CORRELATION
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Issue Dt:
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10/26/2004
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09848569
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Filing Dt:
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05/02/2001
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Title:
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METHOD AND APPARATUS FOR PROCESSING CHAIN MESSAGES (SGL CHAINING)
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Patent #:
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01/07/2003
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09848758
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Filing Dt:
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05/02/2001
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Publication #:
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Pub Dt:
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11/07/2002
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Title:
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PROCESS FOR FORMING METAL-FILLED OPENINGS IN LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL WHILE INHIBITING VIA POISONING
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Patent #:
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Issue Dt:
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12/31/2002
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09848942
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Filing Dt:
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05/04/2001
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Title:
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HIGH SPEED INPUT BUFFER CIRCUIT
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Patent #:
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Issue Dt:
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09/16/2003
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09849640
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Filing Dt:
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05/04/2001
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Title:
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CONTROL CIRCUIT FOR POWER
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Issue Dt:
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07/11/2006
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09849691
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Filing Dt:
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05/04/2001
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Title:
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MINIMAL BENDS CONNECTION MODELS FOR WIRE DENSITY CALCULATION
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Issue Dt:
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11/26/2002
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09849919
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Filing Dt:
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05/04/2001
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Title:
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PROCESS, APPARATUS AND PROGRAM FOR TRANSFORMING PROGRAM LANGUAGE DESCRIPTION OF AN IC TO AN RTL DESCRIPTION
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Issue Dt:
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04/12/2005
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09850865
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Filing Dt:
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05/08/2001
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Title:
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PIPELINED PROCESSOR AND METHOD USING A PROFILE REGISTER STORING THE RETURN FROM EXCEPTION ADDRESS OF AN EXECUTED INSTRUCTION SUPPLIED BY AN EXCEPTION PROGRAM COUNTER CHAIN FOR CODE PROFILING
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Issue Dt:
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05/09/2006
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09851181
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05/08/2001
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Title:
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APPLICATION SPECIFIC INTEGRATED CIRCUIT HAVING A PROGRAMMABLE LOGIC CORE AND A METHOD OF OPERATION THEREOF
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Patent #:
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Issue Dt:
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11/18/2008
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09851504
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Filing Dt:
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05/08/2001
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Title:
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FIELD PROGRAMMABLE NETWORK APPLICATION SPECIFIC INTEGRATED CIRCUIT AND A METHOD OF OPERATION THEREOF
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09851712
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Filing Dt:
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05/09/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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BURST SIGNAL GENERATION FOR PIPELINED ACCESS TO AMBA BUS
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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09851860
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Filing Dt:
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05/09/2001
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Publication #:
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Pub Dt:
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07/04/2002
| | | | |
Title:
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BIT REDUCTION USING DITHER, ROUNDING AND ERROR FEEDBACK
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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09852437
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Filing Dt:
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05/10/2001
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Title:
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BUS SNOOPING FOR CACHE COHERENCY FOR A BUS WITHOUT BUILT-IN BUS SNOOPING CAPABILITIES
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Patent #:
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Issue Dt:
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08/03/2004
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09853562
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Filing Dt:
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05/11/2001
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Title:
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DATA TIMELINE MANAGEMENT USING SNAPSHOT VOLUMES
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Patent #:
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Issue Dt:
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03/27/2007
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09855011
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Filing Dt:
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05/14/2001
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Title:
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VIDEO HORIZONTAL AND VERTICAL VARIABLE SCALING FILTER
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09858166
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Filing Dt:
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05/15/2001
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Title:
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NET DELAY OPTIMIZATION WITH RAMPTIME VIOLATION REMOVAL
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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09858686
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Filing Dt:
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05/15/2001
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Title:
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MINIMUM METAL CONSUMPTION POWER DISTRIBUTION NETWORK ON A BONDED DIE
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09859149
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Filing Dt:
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05/15/2001
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Title:
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MODELING DELAYS FOR SMALL NETS IN AN INTEGRATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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09859880
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Filing Dt:
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05/17/2001
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Publication #:
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Pub Dt:
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02/06/2003
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Title:
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HEXADECAGONAL ROUTING
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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09860149
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Filing Dt:
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05/17/2001
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Publication #:
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Pub Dt:
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01/09/2003
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Title:
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PROGRAMMABLE COUNTERS FOR SETTING BUS ARBITRATION DELAYS INVOLVES COUNTING CLOCK CYCLES EQUAL TO A COUNT NUMBER LOADED FROM A MEMORY
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09862000
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Filing Dt:
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05/04/2001
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Title:
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PREFIX COMPARATOR
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Patent #:
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Issue Dt:
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12/16/2003
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Application #:
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09862045
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Filing Dt:
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05/21/2001
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Title:
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IDDQ TEST METHODOLOGY BASED ON THE SENSITIVITY OF FAULT CURRENT TO POWER SUPPLY VARIATIONS
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Patent #:
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Issue Dt:
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02/28/2006
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09862261
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Filing Dt:
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05/21/2001
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Pub Dt:
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07/25/2002
| | | | |
Title:
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CYCLIC BUFFER FOR INFRARED
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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09862531
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Filing Dt:
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05/22/2001
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Publication #:
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Pub Dt:
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06/13/2002
| | | | |
Title:
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APPARATUS AND METHOD FOR DETECTING A PREDETERMINED PATTERN OF BITS IN A BITSTREAM
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Patent #:
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Issue Dt:
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08/08/2006
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Application #:
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09863736
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Filing Dt:
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05/22/2001
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Publication #:
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Pub Dt:
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05/16/2002
| | | | |
Title:
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DEVICE AND METHOD FOR EFFICIENT DECODING WITH TIME REVERSED DATA
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Patent #:
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Issue Dt:
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07/13/2004
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Application #:
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09863744
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Filing Dt:
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05/23/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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APPARATUS AND METHOD OF INTERRUPT DETECTION IN AN OPTICAL DISC ENVIRONMENT
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09864760
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Filing Dt:
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05/24/2001
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Title:
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MESSAGE INDEX DESCRIPTOR
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09865900
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Filing Dt:
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05/25/2001
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Publication #:
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Pub Dt:
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11/28/2002
| | | | |
Title:
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SELF ALIGNED GATE
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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09866525
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Filing Dt:
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05/25/2001
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Title:
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LINE INTERFACE, APPARATUS AND METHOD FOR COUPLING TRANSCEIVER AND TRANSMISSION LINE
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09866661
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Filing Dt:
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05/30/2001
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Title:
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RTL CODE OPTIMIZATION FOR RESOURCE SHARING STRUCTURES
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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09867052
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Filing Dt:
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05/29/2001
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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METHOD AND APPARATUS FOR REDUCING NOISE IN A TRACKING ERROR SIGNAL
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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09870136
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Filing Dt:
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05/30/2001
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Title:
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MULTI-CHANNEL INTERFACE CONTROLLER FOR ENABLING A HOST TO INTERFACE WITH ONE OR MORE HOST DEVICES
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09870851
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Filing Dt:
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05/30/2001
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Title:
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SLOPED SIDEWALL VIA FOR INTEGRATED CIRCUIT STRUCTURE TO SUPPRESS VIA POISONING AND PROCESS FOR FORMING SAME
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09870949
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Filing Dt:
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05/31/2001
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Title:
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METHOD AND APPARATUS FOR TESTING HIGH FREQUENCY DELAY LOCKED LOOPS
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09871023
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Filing Dt:
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05/31/2001
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Title:
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PROGRAMMABLE SELF TIME CIRCUITRY FOR MEMORIES
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09871129
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Filing Dt:
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05/31/2001
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Title:
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IC TIMING ANALYSIS WITH KNOWN FALSE PATHS
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Patent #:
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Issue Dt:
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01/27/2004
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Application #:
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09871177
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Filing Dt:
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05/31/2001
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Title:
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OUT OF ORDER EXECUTION MEMORY ACCESS REQUEST FIFO
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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09872058
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Filing Dt:
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05/31/2001
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Title:
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PROCESS FOR FORMING A LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL ON AN INTEGRATED CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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09872246
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Filing Dt:
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05/31/2001
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Title:
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DYNAMIC BREAK LOOP FOR CLOSED LOOP UNMANAGED STACKING SWITCHES
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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09872327
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Filing Dt:
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06/01/2001
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Title:
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THERMAL AND MECHANICAL ATTACHMENT OF A HEATSPREADER TO A FLIP-CHIP INTEGRATED CIRCUIT STRUCTURE USING UNDERFILL
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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09872486
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Filing Dt:
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05/31/2001
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Title:
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CREATION OF SYNCHRONIZATION MARKS IN MULTILEVEL OPTICAL DATA STORAGE
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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09872582
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Filing Dt:
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06/04/2001
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Title:
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TESTING IMPLEMENTATION SUITABLE FOR BUILT-IN SELF-REPAIR (BISR) MEMORIES
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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09872643
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Filing Dt:
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06/01/2001
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Title:
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METHOD TO PROTECT AND RECOVER A WRITE AHEAD LOG FROM INTERRUPTIONS
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Patent #:
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Issue Dt:
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11/11/2003
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Application #:
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09872883
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Filing Dt:
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06/01/2001
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Title:
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ADDRESS TRANSLATION CIRCUIT FOR PROCESSORS UTILIZING A SINGLE CODE IMAGE
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09873043
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Filing Dt:
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05/31/2001
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Title:
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PROCESS FOR REMOVAL OF RESIST MASK OVER LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL OF AN INTEGRATED CIRCUIT STRUCTURE, AND REMOVAL OF RESIDUES FROM VIA ETCH AND RESIST MASK REMOVAL
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09875314
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Filing Dt:
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06/04/2001
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Title:
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METHOD OF CLOCK BUFFER PARTITIONING TO MINIMIZE CLOCK SKEW FOR AN INTEGRATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09876736
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Filing Dt:
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06/06/2001
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Title:
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METHOD OF GENERATING AN OPTIMAL CLOCK BUFFER SET FOR MINIMIZING CLOCK SKEW IN BALANCED CLOCK TREES
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09876854
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Filing Dt:
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06/07/2001
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Publication #:
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Pub Dt:
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11/29/2001
| | | | |
Title:
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PROGRAMMABLE WRITE SIGNAL GENERATOR
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09878142
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Filing Dt:
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06/08/2001
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Title:
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LINE DRIVER FOR ASYMMETRIC DIGITAL SUBSCRIBER LINE SYSTEM
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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09878499
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Filing Dt:
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06/11/2001
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Title:
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HARD MACRO HAVING AN ANTENNA RULE VIOLATION FREE INPUT/OUTPUT PORTS
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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09878594
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Filing Dt:
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06/11/2001
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Title:
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BLOCK MOVE ENGINE WITH MACROBLOCK ADDRESSING MODES
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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09878604
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Filing Dt:
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06/11/2001
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Title:
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MULTI-STAGE FILTER CIRCUIT AND DIGITAL SIGNAL PROCESSING CIRCUIT EMPLOYING THE SAME
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09878741
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Filing Dt:
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06/11/2001
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Title:
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OPTICAL INTENSITY MODIFIER
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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09878820
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Filing Dt:
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06/11/2001
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Publication #:
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Pub Dt:
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12/12/2002
| | | | |
Title:
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PLASMA TREATMENT SYSTEM
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09879297
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Filing Dt:
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06/12/2001
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Title:
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RTL BACK ANNOTATOR
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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09879416
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Filing Dt:
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06/12/2001
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Title:
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DELAY-LOCKED LOOP WITH BUILT-IN SELF-TEST OF PHASE MARGIN
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09879417
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Filing Dt:
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06/12/2001
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Title:
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METHOD OF ANALYZING STATIC CURRENT TEST VECTORS WITH REDUCED FILE SIZES FOR SEMICONDUCTOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09879506
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Filing Dt:
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06/12/2001
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Title:
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METHOD OF ANALYZING STATIC CURRENT TEST VECTORS FOR SEMICONDUCTOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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09879664
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Filing Dt:
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06/12/2001
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Title:
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MASK CORRECTION FOR PHOTOLITHOGRAPHIC PROCESSES
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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09879783
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Filing Dt:
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06/12/2001
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Title:
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COMPOSITION WITH EMC SHIELDING CHARACTERISTICS
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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09879824
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Filing Dt:
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06/11/2001
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Title:
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METHOD AND APPARATUS FOR CONTROLLING OSCILLATION AMPLITUDE AND OSCILLATION FREQUENCY OF CRYSTAL OSCILLATOR
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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09879841
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Filing Dt:
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06/12/2001
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Title:
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METHOD AND APPARATUS FOR OPTIMIZING THE TIMING OF INTEGRATED CIRCUITS
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Patent #:
|
|
Issue Dt:
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10/15/2002
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Application #:
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09879845
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Filing Dt:
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06/12/2001
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Title:
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EPSILON-DISCREPANT SELF-TEST TECHNIQUE
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Patent #:
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Issue Dt:
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08/26/2003
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Application #:
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09879846
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Filing Dt:
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06/12/2001
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Title:
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MASK CORRECTION OPTIMIZATION
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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09880283
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Filing Dt:
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06/13/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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APPARATUS AND METHOD PROVIDING A MIRROR AVERAGING FUNCTION TO GENERATE A MIRROR SIGNAL FROM OPTICAL DATA ON AN OPTICAL DISC
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Patent #:
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Issue Dt:
|
08/08/2006
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Application #:
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09880291
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Filing Dt:
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06/13/2001
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Title:
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TRIPLE CONVERSION RF TUNER WITH SYNCHRONOUS LOCAL OSCILLATORS
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Patent #:
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Issue Dt:
|
06/11/2002
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Application #:
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09880491
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Filing Dt:
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06/13/2001
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Title:
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LOW POWER HIGH DENSITY ASYNCHRONOUS MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
|
05/06/2003
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Application #:
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09880492
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Filing Dt:
|
06/13/2001
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Title:
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METHOD AND/OR ARCHITECTURE FOR IMPLEMENTING A VARIABLE GAIN AMPLIFIER CONTROL
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Patent #:
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|
Issue Dt:
|
09/17/2002
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Application #:
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09880607
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Filing Dt:
|
06/12/2001
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Title:
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GENERATING STANDARD DELAY FORMAT FILES WITH CONDITIONAL PATH DELAY FOR DESIGNING INTEGRATED CIRCUITS
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|
|
Patent #:
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|
Issue Dt:
|
08/09/2005
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Application #:
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09880675
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Filing Dt:
|
06/13/2001
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Title:
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SCAN METHOD FOR BUILT-IN-SELF-REPAIR (BISR)
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Patent #:
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|
Issue Dt:
|
07/05/2005
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Application #:
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09881151
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Filing Dt:
|
06/14/2001
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Title:
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CONVERTER DEVICE
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|
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Patent #:
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|
Issue Dt:
|
06/25/2002
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Application #:
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09881365
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Filing Dt:
|
06/14/2001
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Title:
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FEEDBACK CONTROL OF CLOCK DUTY CYCLE
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|
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Patent #:
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Issue Dt:
|
12/31/2002
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Application #:
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09881570
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Filing Dt:
|
06/13/2001
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Title:
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SWITCHED-CAPACITOR DAC/CONTINOUS-TIME RECONSTRUCTION FILTER INTERFACE CIRCUIT
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|
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Patent #:
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Issue Dt:
|
01/31/2006
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Application #:
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09881584
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Filing Dt:
|
06/14/2001
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Title:
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SYSTEM AND METHOD FOR DATA VERIFICATION IN A RAID SYSTEM
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|
|
Patent #:
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|
Issue Dt:
|
08/19/2003
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Application #:
|
09882114
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Filing Dt:
|
06/15/2001
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Title:
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METHOD OF CONTROL CELL PLACEMENT TO MINIMIZE CONNECTION LENGTH AND CELL DELAY
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|
|
Patent #:
|
|
Issue Dt:
|
01/07/2003
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Application #:
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09882124
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Filing Dt:
|
06/14/2001
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Title:
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PROCESS FOR SELECTIVE POLISHING OF METAL-FILLED TRENCHES OF INTEGRATED CIRCUIT STRUCTURES
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|
|
Patent #:
|
|
Issue Dt:
|
12/24/2002
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Application #:
|
09882497
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Filing Dt:
|
06/15/2001
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Title:
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AMPLIFIER CIRCUIT FOR LINE DRIVER
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|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
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Application #:
|
09882499
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Filing Dt:
|
06/15/2001
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Title:
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AMPLIFIER AND LINE DRIVER FOR BROADBAND COMMUNICATIONS
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|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
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Application #:
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09882786
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Filing Dt:
|
06/15/2001
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Title:
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TESTING IMPLEMENTATION FOR SIGNAL CHARACTERIZATION
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|
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Patent #:
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|
Issue Dt:
|
06/17/2003
|
Application #:
|
09882899
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Filing Dt:
|
06/15/2001
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Title:
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METHOD FOR REDUCING SIMULATION OVERHEAD FOR EXTERNAL MODELS
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|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
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Application #:
|
09882977
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Filing Dt:
|
06/15/2001
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Title:
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DESIGN SIMPLICITY OF VERY HIGH-SPEED SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
12/07/2004
|
Application #:
|
09883139
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Filing Dt:
|
06/15/2001
|
Title:
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METHOD TO SUPPORT GENERAL ENCLOSURE WIRING WHEN ASSOCIATING SES DATA WITH PHYSICAL DEVICE ON A FIBER CHANNEL LOOP WITH SOFT ADDRESSES
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|
|
Patent #:
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|
Issue Dt:
|
12/30/2003
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Application #:
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09883141
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Filing Dt:
|
06/15/2001
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Title:
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DATA STORAGE SYSTEM AND METHOD FOR MANAGING CRITICAL DATA IN AN N-WAY MIRRORED STORAGE DEVICE USING FIRST AND SECOND SEQUENCE NUMBERS
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|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
09883142
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Filing Dt:
|
06/15/2001
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Title:
|
SYSTEM AND METHOD FOR READING AND WRITING N-WAY MIRRORED STORAGE DEVICES
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|
|
Patent #:
|
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Issue Dt:
|
05/23/2006
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Application #:
|
09883733
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Filing Dt:
|
06/18/2001
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Title:
|
PSEUDO-RANDOM ONE-TO-ONE CIRCUIT SYNTHESIS
|
|
|
Patent #:
|
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Issue Dt:
|
06/14/2005
|
Application #:
|
09883761
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Filing Dt:
|
06/18/2001
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Publication #:
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|
Pub Dt:
|
06/27/2002
| | | | |
Title:
|
METHOD AND APPARATUS FOR ESTIMATION OF ERROR IN DATA RECOVERY SCHEMES
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|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
09884327
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Filing Dt:
|
06/19/2001
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Title:
|
INVERTING LEVEL SHIFTER WITH START-UP CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2002
|
Application #:
|
09884711
|
Filing Dt:
|
06/18/2001
|
Title:
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UNIVERSAL TEST COUPON FOR PERFORMING PREQUALIFICATION TESTS ON SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
09884736
|
Filing Dt:
|
06/19/2001
|
Title:
|
PLASMA TREATMENT OF LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL TO FORM STRUCTURES USEFUL IN FORMATION OF METAL INTERCONNECTS AND/OR FILLED VIAS FOR INTEGRATED CIRCUIT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
|
Application #:
|
09885299
|
Filing Dt:
|
06/20/2001
|
Title:
|
HIGH DENSITY SIGNAL ROUTING
|
|