|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10014746
|
Filing Dt:
|
10/24/2001
|
|
Title:
|
GRAPHICAL USER INTERFACE TO INTEGRATE THIRD PARTY TOOLS IN POWER INTEGRITY ANALYSIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
10015076
|
Filing Dt:
|
10/26/2001
|
|
Title:
|
HARDWARE SEMAPHORES FOR A MULTI-PROCESSOR SYSTEM WITHIN A SHARED MEMORY ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/10/2006
|
Application #:
|
10015181
|
Filing Dt:
|
11/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
METHOD OF REDUCING MISCORRECTIONS IN A POST-PROCESSOR USING COLUMN PARITY CHECKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10015194
|
Filing Dt:
|
11/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR IMPLEMENTING A METAMETHODOLOGY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
10015255
|
Filing Dt:
|
12/11/2001
|
|
Title:
|
CONTROL OF REACTION RATE IN FORMATION OF LOW K CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL USING ORGANOSILANE, UNSUBSTITUTED SILANE, AND HYDROGEN PEROXIDE REACTANTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
10015506
|
Filing Dt:
|
12/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR DISABLING AND RECREATING A SNAPSHOT VOLUME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
10017792
|
Filing Dt:
|
12/12/2001
|
|
Title:
|
OPTIMIZATION OF COMPARATOR ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2005
|
Application #:
|
10017802
|
Filing Dt:
|
12/12/2001
|
|
Title:
|
OPTIMIZATION OF ADDER BASED CIRCUIT ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
10020084
|
Filing Dt:
|
12/13/2001
|
|
Title:
|
ANTI-REFLECTIVE COATINGS FOR USE AT 248 NM AND 193 NM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10020304
|
Filing Dt:
|
12/13/2001
|
|
Title:
|
BURIED CHANNEL DEVICES AND A PROCESS FOR THEIR FABRICATION SIMULTANEOUSLY WITH SURFACE CHANNEL DEVICES TO PRODUCE TRANSISTORS AND CAPACITORS WITH MULTIPLE ELECTRICAL GATE OXIDES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
10020327
|
Filing Dt:
|
12/13/2001
|
|
Title:
|
METHOD AND APPARATUS FOR MEASURING THE PHASE OF CAPTURED READ DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10020407
|
Filing Dt:
|
12/12/2001
|
|
Title:
|
METHOD OF DETECTING SPATIALLY CORRELATED VARIATIONS IN A PARAMETER OF AN INTEGRATED CIRCUIT DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
10021414
|
Filing Dt:
|
10/30/2001
|
|
Title:
|
INTERSCALABLE INTERCONNECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
10021606
|
Filing Dt:
|
12/10/2001
|
|
Title:
|
COMPILER INDEPENDENT BIT-FIELD MACROS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2004
|
Application #:
|
10021619
|
Filing Dt:
|
10/30/2001
|
|
Title:
|
SYSTEM AND METHOD FOR DESIGNING AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
10021696
|
Filing Dt:
|
10/30/2001
|
|
Title:
|
SYSTEM AND METHOD FOR OPTIMIZING AN INTEGRATED CIRCUIT DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2003
|
Application #:
|
10021829
|
Filing Dt:
|
12/12/2001
|
|
Title:
|
SUBSTRATE SURFACE SCANNING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2005
|
Application #:
|
10022051
|
Filing Dt:
|
12/17/2001
|
|
Title:
|
METHOD AND APPARATUS FOR PROTECTION OF DATA UTILIZING CRC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2004
|
Application #:
|
10023101
|
Filing Dt:
|
12/17/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
HARDWARE SPEED SELECTION BEHIND A DISK ARRAY CONTROLLER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2003
|
Application #:
|
10023311
|
Filing Dt:
|
12/13/2001
|
|
Title:
|
SYSTEMS AND METHODS FOR PACKAGE DEFECT DETECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
10023742
|
Filing Dt:
|
12/19/2001
|
|
Title:
|
PROGRAMMABLE BIT ORDERING FOR SERIAL PORT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10024054
|
Filing Dt:
|
12/17/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
FLUTED SIGNAL PIN, CAP, MEMBRANE, AND STANCHION FOR A BALL GRID ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
10025123
|
Filing Dt:
|
12/19/2001
|
|
Title:
|
DEVELOPMENT OF HARDMAC TECHNOLOGY FILES (CLF, TECH AND SYNLIB) FOR RTL AND FULL GATE LEVEL NETLISTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2004
|
Application #:
|
10025304
|
Filing Dt:
|
12/19/2001
|
|
Title:
|
METHOD OF PREVENTING RESIST POISONING IN DUAL DAMASCENE STRUCTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2004
|
Application #:
|
10026154
|
Filing Dt:
|
12/18/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
5 V TOLERANT HOT CARRIER INJECTION (HCI) PROTECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
10026186
|
Filing Dt:
|
12/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
SWAPPED DRAIN STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
10026305
|
Filing Dt:
|
12/18/2001
|
|
Title:
|
METHOD AND APPARATUS FOR TRANSFERRING DATA BETWEEN A SLOWER CLOCK DOMAIN AND A FASTER CLOCK DOMAIN IN WHICH ONE OF THE CLOCK DOMAINS IS BANDWIDTH LIMITED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2004
|
Application #:
|
10026407
|
Filing Dt:
|
12/20/2001
|
|
Title:
|
METHOD OF FORMING SIGE GATE ELECTRODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
10027182
|
Filing Dt:
|
12/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/20/2002
| | | | |
|
Title:
|
POWER RAILS GLITCH NOISE INSENSITIVE CHARGE PUMP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10027311
|
Filing Dt:
|
12/21/2001
|
|
Title:
|
BUILT-IN TEST FOR MULTIPLE MEMORY CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
10027642
|
Filing Dt:
|
12/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
MULTIDIRECTIONAL ROUTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10027720
|
Filing Dt:
|
12/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
DUAL PURPOSE PCI-X DDR CONFIGURABLE TERMINATOR/DRIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2005
|
Application #:
|
10027936
|
Filing Dt:
|
12/21/2001
|
|
Title:
|
REUSABLE COMPLEX MULTI-BUS SYSTEM HARDWARE PROTOTYPE SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2005
|
Application #:
|
10028582
|
Filing Dt:
|
12/20/2001
|
|
Title:
|
ADDRESS TRANSITION DETECT CONTROL CIRCUIT FOR SELF TIMED ASYNCHRONOUS MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
10028836
|
Filing Dt:
|
12/20/2001
|
|
Title:
|
SYSTEM AND METHOD FOR EFFICIENT INSTRUCTION PREFETCHING BASED ON LOOP PERIODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10032188
|
Filing Dt:
|
12/21/2001
|
|
Title:
|
ALIGNING AND OFFSETTING BUS SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10033090
|
Filing Dt:
|
10/25/2001
|
|
Title:
|
UNIFORM AIRFLOW DIFFUSER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
10033158
|
Filing Dt:
|
10/25/2001
|
|
Title:
|
MIXER WITH STEPPED GAIN AND CONSTANT COMMON MODE DC OUTPUT BIAS VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2003
|
Application #:
|
10033164
|
Filing Dt:
|
10/19/2001
|
|
Title:
|
PROCESS FOR FORMING HIGH DIELECTRIC CONSTANT GATE DIELECTRIC FOR INTEGRATED CIRCUIT STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
10033354
|
Filing Dt:
|
10/25/2001
|
|
Title:
|
LOW VOLTAGE VARIABLE GAIN AMPLIFIER HAVING CONSTANT COMMON MODE DC OUTPUT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
10034535
|
Filing Dt:
|
12/27/2001
|
|
Title:
|
METHOD TO DEBUG IKOS METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2005
|
Application #:
|
10034839
|
Filing Dt:
|
12/27/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR COEVOLUTIONARY CIRCUIT DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
10035346
|
Filing Dt:
|
12/28/2001
|
|
Title:
|
CMOS VARACTOR WITH CONSTANT DC/DV CHARACTERISTIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
10035501
|
Filing Dt:
|
10/25/2001
|
|
Title:
|
METHOD FOR GROWING THIN FILMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2004
|
Application #:
|
10035704
|
Filing Dt:
|
10/18/2001
|
|
Title:
|
MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10036291
|
Filing Dt:
|
11/07/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
DUMMY WAFERS AND METHODS FOR MAKING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
10036621
|
Filing Dt:
|
12/21/2001
|
|
Title:
|
VISCOUS ELECTROPOLISHING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2004
|
Application #:
|
10036695
|
Filing Dt:
|
12/31/2001
|
|
Title:
|
MULTI-BANK MEMORY DEVICE HAVING A 1:1 STATE MACHINE-TO-MEMORY BANK RATIO
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10036820
|
Filing Dt:
|
11/01/2001
|
|
Title:
|
ENHANCED BUS ARCHITECTURE FOR POSTED READ OPERATION BETWEEN MASTERS AND SLAVES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10037722
|
Filing Dt:
|
10/19/2001
|
|
Title:
|
METHODS AND STRUCTURE FOR TRANSFER OF BURST TRANSACTIONS HAVING UNSPECIFIED LENGTH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
10039083
|
Filing Dt:
|
12/31/2001
|
|
Title:
|
MEMORY CONTROLLER FOR HANDLING DATA TRANSFERS WHICH EXCEED THE PAGE WIDTH OF DDR SDRAM DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
10039508
|
Filing Dt:
|
11/09/2001
|
|
Title:
|
ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
10044155
|
Filing Dt:
|
01/11/2002
|
|
Title:
|
ROUTING OF TEST SIGNALS OF INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10044215
|
Filing Dt:
|
11/19/2001
|
|
Title:
|
INTERMITTENT PULSED OXIDATION PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2002
|
Application #:
|
10044339
|
Filing Dt:
|
01/11/2002
|
|
Title:
|
TECHNIQUE FOR THE REDUCTION OF MEMORY ACCESS TIME VARIATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10044781
|
Filing Dt:
|
01/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
ARCHITECTURE FOR A SEA OF PLATFORMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10044864
|
Filing Dt:
|
10/22/2001
|
|
Title:
|
METHOD FOR CREATING BARRIERS FOR COPPER DIFFUSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2003
|
Application #:
|
10045473
|
Filing Dt:
|
11/08/2001
|
|
Title:
|
APPARATUS AND METHOD FOR SIGNAL SKEW CHARACTERIZATION UTILIZING CLOCK DIVISION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
10045889
|
Filing Dt:
|
11/07/2001
|
|
Title:
|
METHOD AND SYSTEM FOR A HOST PROCESSOR TO BROADCAST DATA TO INSTRUCTION OR DATA MEMORIES OF SEVERAL PROCESSORS IN A MULTI-PROCESSOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2002
|
Application #:
|
10047547
|
Filing Dt:
|
01/16/2002
|
|
Title:
|
TWISTED BITLINES TO REDUCE COUPLING EFECTS (DUAL PORT MEMORIES)
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2003
|
Application #:
|
10047960
|
Filing Dt:
|
01/14/2002
|
|
Title:
|
METHOD AND CIRCUIT FOR CONTROLLING QUIESCENT CURRENT OF AMPLIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10051445
|
Filing Dt:
|
01/18/2002
|
|
Title:
|
FILTER FOR BROADCAST RECEIVER TUNER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10052233
|
Filing Dt:
|
01/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
ARCHITECTURES FOR A SINGLE-STAGE GROOMING SWITCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
10052929
|
Filing Dt:
|
10/29/2001
|
|
Title:
|
ZERO PHASE AND FREQUENCY RESTART PLL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10053537
|
Filing Dt:
|
11/02/2001
|
|
Title:
|
METHOD FOR RETICLE FORMATION UTILIZING METAL VAPORIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
10054286
|
Filing Dt:
|
01/22/2002
|
|
Title:
|
AUDIO/VIDEO RECORDER WITH AUTOMATIC COMMERCIAL ADVANCEMENT PREVENTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10055082
|
Filing Dt:
|
01/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
LOW VOLTAGE BREAKDOWN ELEMENT FOR ESD TRIGGER DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2003
|
Application #:
|
10055812
|
Filing Dt:
|
01/23/2002
|
|
Title:
|
REDUCING PROBE CARD SUBSTRATE WARPAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
10056166
|
Filing Dt:
|
01/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
ENHANCED PERSONAL VIDEO RECORDER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10056631
|
Filing Dt:
|
01/25/2002
|
|
Title:
|
ON-CHIP BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10057359
|
Filing Dt:
|
10/23/2001
|
|
Title:
|
CYCLIC REDUNDANCY CHECKING FOR MANAGING THE COHERENCY OF MIRRORED STORAGE VOLUMES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
10057774
|
Filing Dt:
|
01/22/2002
|
|
Title:
|
ADVANCED FORWARD ERROR CORRECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10057863
|
Filing Dt:
|
01/24/2002
|
|
Title:
|
METHODS AND APPARATUS FOR MANAGING CACHED CRC VALUES IN A STORAGE CONTROLLER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10059480
|
Filing Dt:
|
01/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
POWER ROUTING WITH OBSTACLES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10060002
|
Filing Dt:
|
01/29/2002
|
|
Title:
|
MULTI PATTERN RETICLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10060526
|
Filing Dt:
|
01/30/2002
|
|
Title:
|
DELAY REDUCTION OF HARDWARE IMPLEMENTATION OF THE MAXIMUM A POSTERIORI (MAP) METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
10060867
|
Filing Dt:
|
01/30/2002
|
|
Title:
|
FORMING A SEMICONDUCTOR ON IMPLANTED INSULATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
10061518
|
Filing Dt:
|
02/01/2002
|
|
Title:
|
FLIP CHIP TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
10061519
|
Filing Dt:
|
02/01/2002
|
|
Title:
|
ELECTROCHEMICAL PLANARIZATION END POINT DETECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2004
|
Application #:
|
10061660
|
Filing Dt:
|
02/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
MAGNETORESISTIVE MEMORY FOR A COMPLEX PROGRAMMABLE LOGIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2008
|
Application #:
|
10066270
|
Filing Dt:
|
01/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
METHOD FOR USING CRC AS METADATA TO PROTECT AGAINST DRIVE ANOMALY ERRORS IN A STORAGE ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2003
|
Application #:
|
10067299
|
Filing Dt:
|
02/07/2002
|
|
Title:
|
VACUUM SEALED RF/MICROWAVE MICRORESONATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
10068680
|
Filing Dt:
|
02/06/2002
|
|
Title:
|
ENDIANESS INDEPENDENT MEMORY INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10068768
|
Filing Dt:
|
02/06/2002
|
|
Title:
|
FIVE VOLT TOLERANT AND FAIL SAFE INPUT SCHEME USING SOURCE FOLLOWER CONFIGURATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
10071718
|
Filing Dt:
|
02/08/2002
|
|
Title:
|
PROGRAMMABLE TRANSMISSION AND RECEPTION OF OUT OF BAND SIGNALS FOR SERIAL ATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2004
|
Application #:
|
10072008
|
Filing Dt:
|
02/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
OVERLAP REMOVER MANAGER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10076681
|
Filing Dt:
|
02/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR LOADING CRC VALUES INTO A CRC CACHE IN A STORAGE CONTROLLER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10077066
|
Filing Dt:
|
02/15/2002
|
|
Title:
|
SYSTEM REAL-TIME ANALYSIS TOOL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2003
|
Application #:
|
10077351
|
Filing Dt:
|
02/15/2002
|
|
Title:
|
ROM CODE COMPRESSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/2004
|
Application #:
|
10077453
|
Filing Dt:
|
02/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
INTERFACE SHUTDOWN MODE FOR A DATA BUS SLAVE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10077497
|
Filing Dt:
|
02/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
THERMAL CHARACTERIZATION COMPENSATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2004
|
Application #:
|
10078233
|
Filing Dt:
|
02/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
THICK TRACES FROM MULTIPLE DAMASCENE LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10078313
|
Filing Dt:
|
02/18/2002
|
|
Title:
|
TIMING SCHEME FOR SEMICONDUCTOR MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10079026
|
Filing Dt:
|
02/19/2002
|
|
Title:
|
RF/IF DIGITAL DEMODULATION OF VIDEO AND AUDIO
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10082027
|
Filing Dt:
|
02/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
WIRE BOND PACKAGE WITH CORE RING FORMED OVER I/O CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2006
|
Application #:
|
10082687
|
Filing Dt:
|
02/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
FFS SEARCH AND EDIT PIPLINE SEPARATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10082737
|
Filing Dt:
|
02/25/2002
|
|
Title:
|
OPTIMIZED BUFFERING FOR JTAG BOUNDARY SCAN NETS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
10083214
|
Filing Dt:
|
02/26/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
INTEGRATED TARGET MASKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10083411
|
Filing Dt:
|
02/27/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR IDENTIFYING AND ELIMINATING BOTTLENECKS IN INTEGRATED CIRCUIT DESIGNS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
10083833
|
Filing Dt:
|
02/27/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
DEBUG MODE FOR A DATA BUS
|
|
