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Reel/Frame:033102/0270   Pages: 90
Recorded: 06/06/2014
Attorney Dkt #:040981-0072
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 3258
Page 24 of 33
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
Patent #:
Issue Dt:
11/06/2007
Application #:
10316344
Filing Dt:
12/11/2002
Publication #:
Pub Dt:
07/01/2004
Title:
MULTI-LEVEL REGISTER BANK BASED CONFIGURABLE ETHERNER FRAME PARSER
2
Patent #:
Issue Dt:
05/09/2006
Application #:
10316510
Filing Dt:
12/11/2002
Publication #:
Pub Dt:
06/17/2004
Title:
RECONFIGURABLE MEMORY CONTROLLER
3
Patent #:
Issue Dt:
06/29/2004
Application #:
10316594
Filing Dt:
12/11/2002
Publication #:
Pub Dt:
06/17/2004
Title:
ESTIMATING FREE SPACE IN IC CHIPS
4
Patent #:
Issue Dt:
02/14/2006
Application #:
10318232
Filing Dt:
12/12/2002
Publication #:
Pub Dt:
06/17/2004
Title:
HETEROGENEOUS MULTI-PROCESSOR REFERENCE DESIGN
5
Patent #:
Issue Dt:
06/27/2006
Application #:
10318623
Filing Dt:
12/13/2002
Publication #:
Pub Dt:
06/17/2004
Title:
AUTOMATED SELECTION AND PLACEMENT OF MEMORY DURING DESIGN OF AN INTEGRATED CIRCUIT
6
Patent #:
Issue Dt:
07/26/2005
Application #:
10318639
Filing Dt:
12/13/2002
Publication #:
Pub Dt:
06/17/2004
Title:
METHOD FOR CREATING DERIVATIVE INTEGRATED CIRCUIT LAYOUTS FOR RELATED PRODUCTS
7
Patent #:
Issue Dt:
10/14/2003
Application #:
10318656
Filing Dt:
12/12/2002
Title:
METHOD AND SYSTEM FOR CORRECTING QUANTIZATION LOSS DURING ANALOG TO DIGITAL TO ANALOG SIGNAL CONVERSION
8
Patent #:
Issue Dt:
05/30/2006
Application #:
10319206
Filing Dt:
12/13/2002
Publication #:
Pub Dt:
06/17/2004
Title:
APPARATUS AND METHOD FOR DYNAMICALLY ENABLING AND DISABLING INTERRUPT COALESCING IN DATA PROCESSING SYSTEM
9
Patent #:
Issue Dt:
07/04/2006
Application #:
10319219
Filing Dt:
12/13/2002
Publication #:
Pub Dt:
06/17/2004
Title:
INTEGRATED CIRCUIT AND PROCESS FOR IDENTIFYING MINIMUM OR MAXIMUM INPUT VALUE AMONG PLURAL INPUTS
10
Patent #:
Issue Dt:
01/19/2010
Application #:
10320046
Filing Dt:
12/16/2002
Publication #:
Pub Dt:
06/17/2004
Title:
SYSTEM AND METHOD FOR CONTROLLING AUDIO AND VIDEO CONTENT VIA AN ADVANCED SETTOP BOX
11
Patent #:
Issue Dt:
03/16/2004
Application #:
10321250
Filing Dt:
12/16/2002
Title:
SENICONDUCTOR WAFER ARRANGEMENT OF A SEMICONDUCTOR WAFER
12
Patent #:
Issue Dt:
09/06/2005
Application #:
10321938
Filing Dt:
12/16/2002
Title:
DIELECTRIC BARRIER FILMS FOR USE AS COPPER BARRIER LAYERS IN SEMICONDUCTOR TRENCH AND VIA STRUCTURES
13
Patent #:
Issue Dt:
08/05/2003
Application #:
10322933
Filing Dt:
12/18/2002
Title:
METHOD AND APPARATUS FOR SYNCHRONIZATION OF READ DATA IN A READ DATA SYNCHRONIZATION CIRCUIT
14
Patent #:
Issue Dt:
12/20/2005
Application #:
10323104
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
06/24/2004
Title:
SHIFT REGISTER CONTROL OF A CIRCULAR ELASTICITY BUFFER
15
Patent #:
Issue Dt:
06/13/2006
Application #:
10323521
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
06/24/2004
Title:
AMBA SLAVE MODULAR BUS INTERFACES
16
Patent #:
Issue Dt:
04/19/2005
Application #:
10324230
Filing Dt:
12/19/2002
Publication #:
Pub Dt:
06/24/2004
Title:
CENTRAL DYNAMIC MEMORY MANAGER
17
Patent #:
Issue Dt:
01/27/2004
Application #:
10324284
Filing Dt:
12/19/2002
Title:
COMBINED DIFFERENTIAL AND SINGLE-ENDED INPUT BUFFER
18
Patent #:
Issue Dt:
01/30/2007
Application #:
10324487
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
METHOD AND /OR APPARATUS FOR MOTION ESTIMATION USING A HIERARCHICAL SEARCH FOLLOWED BY A COMPUTATION SPLIT FOR DIFFERENT BLOCK SIZES
19
Patent #:
Issue Dt:
06/01/2004
Application #:
10324698
Filing Dt:
12/20/2002
Title:
METHOD FOR THE FORMATION OF ACTIVE AREA UTILIZING REVERSE TRENCH ISOLATION
20
Patent #:
Issue Dt:
09/06/2005
Application #:
10324969
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
METHOD AND APPARATUS FOR IMPROVING QUEUE TRAVERSAL TIME
21
Patent #:
Issue Dt:
08/07/2007
Application #:
10324976
Filing Dt:
12/20/2002
Title:
SECURITY SUPERVISOR GOVERNING ALLOWED TRANSACTIONS ON A SYSTEM BUS
22
Patent #:
Issue Dt:
05/27/2008
Application #:
10325114
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
FLOW CONTROL ENHANCEMENT
23
Patent #:
Issue Dt:
11/22/2005
Application #:
10325132
Filing Dt:
12/20/2002
Title:
USE OF EEPROM FOR STORAGE OF SECURITY OBJECTS IN SECURE SYSTEMS
24
Patent #:
Issue Dt:
08/05/2008
Application #:
10325188
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
MOTION ESTIMATION ENGINE WITH PARALLEL INTERPOLATION AND SEARCH HARDWARE
25
Patent #:
Issue Dt:
10/03/2006
Application #:
10325192
Filing Dt:
12/20/2002
Title:
DEBUG PORT DISABLE MECHANISM
26
Patent #:
Issue Dt:
06/05/2007
Application #:
10325382
Filing Dt:
12/20/2002
Title:
SCAN AND BOUNDARY SCAN DISABLE MECHANISM ON SECURE DEVICE
27
Patent #:
Issue Dt:
09/26/2006
Application #:
10325383
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
AMBA MODULAR MEMORY CONTROLLER
28
Patent #:
Issue Dt:
11/06/2007
Application #:
10325700
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
12/11/2003
Title:
METHOD AND SYSTEM FOR GUARANTEEING QUALITY OF SERVICE IN A MULTI-PLANE CELL SWITCH
29
Patent #:
Issue Dt:
08/05/2008
Application #:
10325701
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
12/11/2003
Title:
METHOD AND APPARATUS FOR ENSURING CELL ORDERING IN LARGE CAPACITY SWITCHING SYSTEMS AND FOR SYNCHRONIZING THE ARRIVAL TIME OF CELLS TO A SWITCH FABRIC
30
Patent #:
Issue Dt:
03/28/2006
Application #:
10326173
Filing Dt:
12/20/2002
Title:
AMBA-BASED SECONDARY CACHE CONTROLLER AND METHOD OF OPERATING THE SAME
31
Patent #:
Issue Dt:
08/07/2007
Application #:
10326440
Filing Dt:
12/20/2002
Title:
PRECISE EXIT LOGIC FOR REMOVAL OF SECURITY OVERLAY OF INSTRUCTION SPACE
32
Patent #:
Issue Dt:
09/20/2005
Application #:
10326717
Filing Dt:
12/19/2002
Publication #:
Pub Dt:
06/24/2004
Title:
METHOD FOR COMBINING STATES
33
Patent #:
Issue Dt:
03/15/2005
Application #:
10327283
Filing Dt:
12/19/2002
Title:
DIAMOND METAL-FILLED PATTERNS ACHIEVING LOW PARASITIC COUPLING CAPACITANCE
34
Patent #:
Issue Dt:
08/15/2006
Application #:
10327304
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
METHOD AND SYSTEM FOR CLASSIFYING AN INTEGRATED CIRCUT FOR OPTICAL PROXIMITY CORRECTION
35
Patent #:
Issue Dt:
05/24/2005
Application #:
10327314
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
METHOD AND SYSTEM FOR CONSTRUCTING A HIERARCHY-DRIVEN CHIP COVERING FOR OPTICAL PROXIMITY CORRECTION
36
Patent #:
Issue Dt:
11/16/2004
Application #:
10327333
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
MULTI-LEVEL REDISTRIBUTION LAYER TRACES FOR REDUCING CURRENT CROWDING IN FLIPCHIP SOLDER BUMPS
37
Patent #:
Issue Dt:
06/28/2005
Application #:
10327451
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
SIDELOBE CORRECTION FOR ATTENUATED PHASE SHIFT MASKS
38
Patent #:
Issue Dt:
01/30/2007
Application #:
10327452
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
ADAPTIVE SEM EDGE RECOGNITION ALGORITHM
39
Patent #:
Issue Dt:
08/19/2008
Application #:
10328066
Filing Dt:
12/23/2002
Title:
IN-SITU METROLOGY SYSTEM AND METHOD FOR MONITORING METALIZATION AND OTHER THIN FILM FORMATION
40
Patent #:
Issue Dt:
04/25/2006
Application #:
10328333
Filing Dt:
12/23/2002
Title:
DUAL DAMASCENE INTERCONNECT STRUCTURE WITH IMPROVED ELECTRO MIGRATION LIFETIMES
41
Patent #:
Issue Dt:
03/08/2005
Application #:
10328346
Filing Dt:
12/24/2002
Title:
CHROMELESS PHASE SHIFT MASK USING NON-LINEAR OPTICAL MATERIALS
42
Patent #:
Issue Dt:
08/23/2005
Application #:
10328462
Filing Dt:
12/23/2002
Publication #:
Pub Dt:
06/24/2004
Title:
PROCESS AND APPARATUS FOR MANAGING USE OF A PERIPHERAL BUS AMONG A PLURALITY OF CONTROLLERS
43
Patent #:
Issue Dt:
04/05/2005
Application #:
10328568
Filing Dt:
12/23/2002
Title:
CENTRAL PROCESSING UNIT INCLUDING ADDRESS GENERATION SYSTEM AND INSTRUCTION FETCH APPARATUS
44
Patent #:
Issue Dt:
12/06/2005
Application #:
10328614
Filing Dt:
12/23/2002
Title:
LOW K POLYMER E-BEAM PRINTABLE MECHANICAL SUPPORT
45
Patent #:
Issue Dt:
06/28/2005
Application #:
10328618
Filing Dt:
12/24/2002
Publication #:
Pub Dt:
06/24/2004
Title:
FOUR-PHASE HANDSHAKE ARBITRATION
46
Patent #:
Issue Dt:
08/02/2005
Application #:
10328699
Filing Dt:
12/23/2002
Publication #:
Pub Dt:
06/24/2004
Title:
METHODS AND APPARATUS FOR TESTING DATA LINES
47
Patent #:
Issue Dt:
08/09/2005
Application #:
10328700
Filing Dt:
12/23/2002
Publication #:
Pub Dt:
07/01/2004
Title:
FAULT REPAIR CONTROLLER FOR REDUNDANT MEMORY INTEGRATED CIRCUITS
48
Patent #:
Issue Dt:
03/13/2007
Application #:
10328719
Filing Dt:
12/23/2002
Publication #:
Pub Dt:
06/24/2004
Title:
PERIPHERAL DEVICE RECEIVER DETECTION IN A HIGH NOISE ENVIRONMENT
49
Patent #:
Issue Dt:
12/25/2007
Application #:
10330929
Filing Dt:
12/27/2002
Publication #:
Pub Dt:
07/01/2004
Title:
PROCESS WINDOW COMPLIANT CORRECTIONS OF DESIGN LAYOUT
50
Patent #:
Issue Dt:
02/08/2005
Application #:
10331521
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
APPARATUS AND METHOD FOR VISUALIZING AND ANALYZING RESISTANCE NETWORKS
51
Patent #:
Issue Dt:
12/27/2005
Application #:
10334430
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
OPTIMIZATION OF DIE YIELD IN A SILICON WAFER "SWEET SPOT"
52
Patent #:
Issue Dt:
11/23/2004
Application #:
10334568
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
07/01/2004
Title:
PLACEMENT OF CONFIGURABLE INPUT/OUTPUT BUFFER STRUCTURES DURING DESIGN OF INTEGRATED CIRCUITS
53
Patent #:
Issue Dt:
06/29/2004
Application #:
10334570
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
07/01/2004
Title:
LENGTH MATRIX GENERATOR FOR REGISTER TRANSFER LEVEL CODE
54
Patent #:
Issue Dt:
01/25/2005
Application #:
10334731
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
07/01/2004
Title:
NETLIST REDUNDANCY DETECTION AND GLOBAL SIMPLIFICATION
55
Patent #:
Issue Dt:
11/02/2004
Application #:
10335177
Filing Dt:
12/31/2002
Title:
MODULAR GROWTH OF MULTIPLE GATE OXIDES
56
Patent #:
Issue Dt:
04/26/2005
Application #:
10335312
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
07/01/2004
Title:
METHOD, SYSTEM, AND PRODUCT FOR ACHIEVING OPTIMAL TIMING IN A DATA PATH THAT INCLUDES VARIABLE DELAY LINES AND COUPLED ENDPOINTS
57
Patent #:
Issue Dt:
05/30/2006
Application #:
10335360
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
07/01/2004
Title:
SIMPLIFIED PROCESS TO DESIGN INTEGRATED CIRCUITS
58
Patent #:
Issue Dt:
03/21/2006
Application #:
10335470
Filing Dt:
12/31/2002
Title:
INTERCONNECT ROUTING USING PARALLEL LINES AND METHOD OF MANUFACTURE
59
Patent #:
Issue Dt:
05/10/2005
Application #:
10335555
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
07/01/2004
Title:
AUTOMATIC GAIN CONTROL (AGC) LOOP FOR CHARACTERIZING CONTINUOUS-TIME OR DISCRETE-TIME CIRCUITRY GAIN RESPONSE ACROSS FREQUENCY
60
Patent #:
Issue Dt:
06/08/2004
Application #:
10335649
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
07/01/2004
Title:
TERMINATION RING FOR INTEGRATED CIRCUIT
61
Patent #:
Issue Dt:
04/11/2006
Application #:
10337076
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
07/08/2004
Title:
CHARACTERISTIC IMAGE OF ELECTRICAL DATA BUS
62
Patent #:
Issue Dt:
09/28/2004
Application #:
10337080
Filing Dt:
01/06/2003
Publication #:
Pub Dt:
07/08/2004
Title:
DYNAMIC CONFIGURATION OF A TIME DIVISION MULTIPLEXING PORT AND ASSOCIATED DIRECT MEMORY ACCESS CONTROLLER
63
Patent #:
Issue Dt:
11/06/2007
Application #:
10339796
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
12/11/2003
Title:
WEIGHTED FAIR SHARE SCHEDULER FOR LARGE INPUT-BUFFERED HIGH-SPEED CROSS-POINT PACKET/CELL SWITCHES
64
Patent #:
Issue Dt:
05/24/2005
Application #:
10339821
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
07/15/2004
Title:
SPLIT AND MERGE DESIGN FLOW CONCEPT FOR FAST TURNAROUND TIME OF CIRCUIT LAYOUT DESIGN
65
Patent #:
Issue Dt:
08/24/2004
Application #:
10339844
Filing Dt:
01/10/2003
Publication #:
Pub Dt:
07/15/2004
Title:
DONUT POWER MESH SCHEME FOR FLIP CHIP PACKAGE
66
Patent #:
Issue Dt:
04/04/2006
Application #:
10341082
Filing Dt:
01/13/2003
Publication #:
Pub Dt:
07/15/2004
Title:
BOND PAD DESIGN
67
Patent #:
Issue Dt:
03/25/2008
Application #:
10341546
Filing Dt:
01/13/2003
Publication #:
Pub Dt:
04/01/2004
Title:
DIGITAL CROSS-CONNECT
68
Patent #:
Issue Dt:
08/03/2004
Application #:
10341963
Filing Dt:
01/13/2002
Publication #:
Pub Dt:
07/17/2003
Title:
PRECISION ANALOG EXPONENTIATION CIRCUIT AND METHOD
69
Patent #:
Issue Dt:
10/05/2004
Application #:
10347759
Filing Dt:
01/21/2003
Publication #:
Pub Dt:
07/22/2004
Title:
ELECTRONIC ORGANIC SUBSTRATE
70
Patent #:
Issue Dt:
05/01/2007
Application #:
10348538
Filing Dt:
01/21/2003
Publication #:
Pub Dt:
07/22/2004
Title:
SPARCE-REDUNDANT FIXED POINT ARITHMETIC MODULES
71
Patent #:
Issue Dt:
11/09/2004
Application #:
10349564
Filing Dt:
01/22/2003
Publication #:
Pub Dt:
07/22/2004
Title:
NET SEGMENT ANALYZER FOR CHIP CAD LAYOUT
72
Patent #:
Issue Dt:
05/02/2006
Application #:
10349664
Filing Dt:
01/22/2003
Publication #:
Pub Dt:
08/05/2004
Title:
DECISION FUNCTION GENERATOR FOR A VITERBI DECODER
73
Patent #:
Issue Dt:
09/27/2005
Application #:
10349770
Filing Dt:
01/22/2003
Publication #:
Pub Dt:
07/22/2004
Title:
SIMULATED VOLTAGE CONTRAST IMAGE GENERATOR AND COMPARATOR
74
Patent #:
Issue Dt:
07/27/2010
Application #:
10354456
Filing Dt:
01/30/2003
Publication #:
Pub Dt:
08/05/2004
Title:
APPARATUS AND/OR METHOD FOR VARIABLE DATA RATE CONVERSION
75
Patent #:
Issue Dt:
03/28/2006
Application #:
10355572
Filing Dt:
01/31/2003
Title:
CIRCUIT FOR ALIGNING SIGNAL WITH REFERENCE SIGNAL
76
Patent #:
Issue Dt:
08/31/2004
Application #:
10357030
Filing Dt:
01/31/2003
Publication #:
Pub Dt:
08/05/2004
Title:
ADJUSTABLE CURRENT-MODE EQUALIZER
77
Patent #:
Issue Dt:
01/30/2007
Application #:
10357044
Filing Dt:
01/31/2003
Publication #:
Pub Dt:
08/19/2004
Title:
LOW CAPACITANCE DIFFERENTIAL INPUT PAD WITH COMMON MODE REJECTION, SELECTABLE INPUT IMPEDANCE, AND ESD PROTECTION
78
Patent #:
Issue Dt:
11/08/2005
Application #:
10357142
Filing Dt:
02/03/2003
Publication #:
Pub Dt:
08/05/2004
Title:
DIELECTRIC STACK
79
Patent #:
Issue Dt:
03/08/2005
Application #:
10357166
Filing Dt:
01/31/2003
Publication #:
Pub Dt:
08/05/2004
Title:
DIFFERENTIAL CURRENT AMPLIFIER WITH COMMON MODE REJECTION AND HIGH FREQUENCY BOOST
80
Patent #:
Issue Dt:
01/13/2004
Application #:
10357827
Filing Dt:
02/03/2003
Title:
AUTOMATIC DELAY MATCHING CIRCUIT FOR DATA SERIALIZER
81
Patent #:
Issue Dt:
02/14/2006
Application #:
10357957
Filing Dt:
02/04/2003
Publication #:
Pub Dt:
08/05/2004
Title:
METHOD AND APPARATUS FOR GENERATING CRC/PARITY ERROR IN NETWORK ENVIRONMENT
82
Patent #:
Issue Dt:
01/17/2006
Application #:
10358968
Filing Dt:
02/04/2003
Title:
ALTERNATING APERTURE PHASE-SHIFT MASK FABRICATION METHOD
83
Patent #:
Issue Dt:
04/05/2005
Application #:
10360903
Filing Dt:
02/07/2003
Publication #:
Pub Dt:
08/12/2004
Title:
METHOD TO USE A LASER TO PERFORM THE EDGE CLEAN OPERATION ON A SEMICONDUCTOR WAFER
84
Patent #:
Issue Dt:
10/03/2006
Application #:
10364836
Filing Dt:
02/10/2003
Publication #:
Pub Dt:
03/25/2004
Title:
INTEGRATED VIDEO DECODING SYSTEM WITH SPATIAL/TEMPORAL VIDEO PROCESSING
85
Patent #:
Issue Dt:
07/25/2006
Application #:
10364866
Filing Dt:
02/10/2003
Publication #:
Pub Dt:
08/12/2004
Title:
ENERGY RECYCLING IN CLOCK DISTRIBUTION NETWORKS USING ON-CHIP INDUCTORS
86
Patent #:
Issue Dt:
10/25/2005
Application #:
10368520
Filing Dt:
02/18/2003
Publication #:
Pub Dt:
08/19/2004
Title:
METHODS AND STRUCTURE FOR IC TEMPERATURE SELF-MONITORING
87
Patent #:
Issue Dt:
12/20/2005
Application #:
10369269
Filing Dt:
02/14/2003
Publication #:
Pub Dt:
08/19/2004
Title:
A MODE REGISTER IN AN INTEGRATED CIRCUIT THAT STORES TEST SCRIPTS AND OPERATING PARAMETERS
88
Patent #:
Issue Dt:
03/18/2008
Application #:
10370037
Filing Dt:
02/19/2003
Publication #:
Pub Dt:
11/20/2003
Title:
SCHEDULING CONNECTIONS IN A MULTI-STAGE SWITCH TO RETAIN NON-BLOCKING PROPERTIES OF CONSTITUENT SWITCHING ELEMENTS
89
Patent #:
Issue Dt:
05/10/2005
Application #:
10371386
Filing Dt:
02/21/2003
Publication #:
Pub Dt:
08/26/2004
Title:
SUBSTRATE IMPEDANCE MEASUREMENT
90
Patent #:
Issue Dt:
10/05/2004
Application #:
10376837
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/02/2004
Title:
MULTIPLE-BIT MEMORY LATCH CELL FOR INTEGRATED CIRCUIT GATE ARRAY
91
Patent #:
Issue Dt:
07/04/2006
Application #:
10377426
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/16/2004
Title:
ADAPTIVE DEFECT BASED TESTING
92
Patent #:
Issue Dt:
10/27/2009
Application #:
10377682
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
09/02/2004
Title:
LARGE TRANSMISSIONS ON PACKETIZED DATA BUS
93
Patent #:
Issue Dt:
05/31/2005
Application #:
10382036
Filing Dt:
03/05/2003
Publication #:
Pub Dt:
09/09/2004
Title:
METHOD FOR EVALUATING LOGIC FUNCTIONS BY LOGIC CIRCUITS HAVING OPTIMIZED NUMBER OF AND/OR SWITCHES
94
Patent #:
Issue Dt:
04/03/2007
Application #:
10387988
Filing Dt:
03/13/2003
Publication #:
Pub Dt:
09/16/2004
Title:
SEQUENTIAL TESTER FOR LONGEST PREFIX SEARCH ENGINES
95
Patent #:
Issue Dt:
03/15/2011
Application #:
10389314
Filing Dt:
03/14/2003
Publication #:
Pub Dt:
09/16/2004
Title:
MULTI-CHANNEL VIDEO COMPRESSION SYSTEM
96
Patent #:
Issue Dt:
05/24/2005
Application #:
10392206
Filing Dt:
03/19/2003
Publication #:
Pub Dt:
09/23/2004
Title:
METHOD AND INTEGRATED CIRCUIT FOR CAPACITOR MEASUREMENT WITH DIGITAL READOUT
97
Patent #:
Issue Dt:
08/17/2004
Application #:
10394445
Filing Dt:
03/20/2003
Publication #:
Pub Dt:
11/20/2003
Title:
HIGH SPEED WAFER SORT AND FINAL TEST
98
Patent #:
Issue Dt:
09/01/2009
Application #:
10394893
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
09/23/2004
Title:
ELASTICITY BUFFER RESTARTING
99
Patent #:
Issue Dt:
09/20/2005
Application #:
10396648
Filing Dt:
03/25/2003
Publication #:
Pub Dt:
09/30/2004
Title:
LOW POWER, VARIABLE PRECISION DDA FOR 3D GRAPHICS APPLICATIONS
100
Patent #:
Issue Dt:
03/13/2007
Application #:
10396955
Filing Dt:
03/24/2003
Publication #:
Pub Dt:
09/30/2004
Title:
LOW STRESS FLIP-CHIP PACKAGE FOR LOW-K SILICON TECHNOLOGY
Assignor
1
Exec Dt:
04/06/2007
Assignee
1
1320 RIDDER PARK DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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