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11/06/2007
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10316344
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12/11/2002
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07/01/2004
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MULTI-LEVEL REGISTER BANK BASED CONFIGURABLE ETHERNER FRAME PARSER
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05/09/2006
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10316510
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12/11/2002
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06/17/2004
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RECONFIGURABLE MEMORY CONTROLLER
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06/29/2004
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10316594
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12/11/2002
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06/17/2004
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ESTIMATING FREE SPACE IN IC CHIPS
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02/14/2006
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10318232
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12/12/2002
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06/17/2004
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HETEROGENEOUS MULTI-PROCESSOR REFERENCE DESIGN
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06/27/2006
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10318623
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12/13/2002
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06/17/2004
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Title:
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AUTOMATED SELECTION AND PLACEMENT OF MEMORY DURING DESIGN OF AN INTEGRATED CIRCUIT
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07/26/2005
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10318639
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12/13/2002
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06/17/2004
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Title:
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METHOD FOR CREATING DERIVATIVE INTEGRATED CIRCUIT LAYOUTS FOR RELATED PRODUCTS
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10/14/2003
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10318656
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12/12/2002
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Title:
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METHOD AND SYSTEM FOR CORRECTING QUANTIZATION LOSS DURING ANALOG TO DIGITAL TO ANALOG SIGNAL CONVERSION
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05/30/2006
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10319206
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12/13/2002
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06/17/2004
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Title:
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APPARATUS AND METHOD FOR DYNAMICALLY ENABLING AND DISABLING INTERRUPT COALESCING IN DATA PROCESSING SYSTEM
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07/04/2006
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10319219
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12/13/2002
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06/17/2004
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INTEGRATED CIRCUIT AND PROCESS FOR IDENTIFYING MINIMUM OR MAXIMUM INPUT VALUE AMONG PLURAL INPUTS
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01/19/2010
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10320046
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12/16/2002
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06/17/2004
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SYSTEM AND METHOD FOR CONTROLLING AUDIO AND VIDEO CONTENT VIA AN ADVANCED SETTOP BOX
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03/16/2004
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10321250
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12/16/2002
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Title:
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SENICONDUCTOR WAFER ARRANGEMENT OF A SEMICONDUCTOR WAFER
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09/06/2005
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10321938
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12/16/2002
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DIELECTRIC BARRIER FILMS FOR USE AS COPPER BARRIER LAYERS IN SEMICONDUCTOR TRENCH AND VIA STRUCTURES
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08/05/2003
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10322933
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12/18/2002
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Title:
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METHOD AND APPARATUS FOR SYNCHRONIZATION OF READ DATA IN A READ DATA SYNCHRONIZATION CIRCUIT
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12/20/2005
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10323104
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12/18/2002
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06/24/2004
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Title:
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SHIFT REGISTER CONTROL OF A CIRCULAR ELASTICITY BUFFER
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06/13/2006
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10323521
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12/18/2002
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06/24/2004
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Title:
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AMBA SLAVE MODULAR BUS INTERFACES
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04/19/2005
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10324230
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12/19/2002
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06/24/2004
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CENTRAL DYNAMIC MEMORY MANAGER
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01/27/2004
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10324284
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12/19/2002
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COMBINED DIFFERENTIAL AND SINGLE-ENDED INPUT BUFFER
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01/30/2007
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10324487
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12/20/2002
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06/24/2004
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METHOD AND /OR APPARATUS FOR MOTION ESTIMATION USING A HIERARCHICAL SEARCH FOLLOWED BY A COMPUTATION SPLIT FOR DIFFERENT BLOCK SIZES
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06/01/2004
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10324698
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12/20/2002
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Title:
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METHOD FOR THE FORMATION OF ACTIVE AREA UTILIZING REVERSE TRENCH ISOLATION
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09/06/2005
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10324969
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12/20/2002
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06/24/2004
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Title:
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METHOD AND APPARATUS FOR IMPROVING QUEUE TRAVERSAL TIME
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08/07/2007
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10324976
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12/20/2002
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SECURITY SUPERVISOR GOVERNING ALLOWED TRANSACTIONS ON A SYSTEM BUS
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05/27/2008
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10325114
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12/20/2002
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06/24/2004
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Title:
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FLOW CONTROL ENHANCEMENT
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11/22/2005
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10325132
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12/20/2002
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Title:
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USE OF EEPROM FOR STORAGE OF SECURITY OBJECTS IN SECURE SYSTEMS
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08/05/2008
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10325188
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12/20/2002
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06/24/2004
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Title:
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MOTION ESTIMATION ENGINE WITH PARALLEL INTERPOLATION AND SEARCH HARDWARE
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10/03/2006
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10325192
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12/20/2002
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Title:
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DEBUG PORT DISABLE MECHANISM
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06/05/2007
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10325382
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12/20/2002
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Title:
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SCAN AND BOUNDARY SCAN DISABLE MECHANISM ON SECURE DEVICE
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09/26/2006
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10325383
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12/20/2002
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06/24/2004
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AMBA MODULAR MEMORY CONTROLLER
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11/06/2007
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10325700
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12/18/2002
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12/11/2003
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Title:
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METHOD AND SYSTEM FOR GUARANTEEING QUALITY OF SERVICE IN A MULTI-PLANE CELL SWITCH
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08/05/2008
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10325701
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12/18/2002
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12/11/2003
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Title:
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METHOD AND APPARATUS FOR ENSURING CELL ORDERING IN LARGE CAPACITY SWITCHING SYSTEMS AND FOR SYNCHRONIZING THE ARRIVAL TIME OF CELLS TO A SWITCH FABRIC
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03/28/2006
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10326173
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12/20/2002
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Title:
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AMBA-BASED SECONDARY CACHE CONTROLLER AND METHOD OF OPERATING THE SAME
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08/07/2007
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10326440
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12/20/2002
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Title:
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PRECISE EXIT LOGIC FOR REMOVAL OF SECURITY OVERLAY OF INSTRUCTION SPACE
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09/20/2005
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10326717
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12/19/2002
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06/24/2004
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METHOD FOR COMBINING STATES
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03/15/2005
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10327283
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12/19/2002
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Title:
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DIAMOND METAL-FILLED PATTERNS ACHIEVING LOW PARASITIC COUPLING CAPACITANCE
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08/15/2006
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10327304
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12/20/2002
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06/24/2004
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METHOD AND SYSTEM FOR CLASSIFYING AN INTEGRATED CIRCUT FOR OPTICAL PROXIMITY CORRECTION
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05/24/2005
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10327314
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12/20/2002
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06/24/2004
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METHOD AND SYSTEM FOR CONSTRUCTING A HIERARCHY-DRIVEN CHIP COVERING FOR OPTICAL PROXIMITY CORRECTION
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11/16/2004
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10327333
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12/20/2002
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06/24/2004
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Title:
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MULTI-LEVEL REDISTRIBUTION LAYER TRACES FOR REDUCING CURRENT CROWDING IN FLIPCHIP SOLDER BUMPS
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06/28/2005
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10327451
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12/20/2002
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06/24/2004
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Title:
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SIDELOBE CORRECTION FOR ATTENUATED PHASE SHIFT MASKS
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01/30/2007
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10327452
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12/20/2002
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06/24/2004
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Title:
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ADAPTIVE SEM EDGE RECOGNITION ALGORITHM
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08/19/2008
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10328066
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12/23/2002
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IN-SITU METROLOGY SYSTEM AND METHOD FOR MONITORING METALIZATION AND OTHER THIN FILM FORMATION
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04/25/2006
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10328333
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12/23/2002
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Title:
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DUAL DAMASCENE INTERCONNECT STRUCTURE WITH IMPROVED ELECTRO MIGRATION LIFETIMES
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03/08/2005
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10328346
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12/24/2002
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Title:
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CHROMELESS PHASE SHIFT MASK USING NON-LINEAR OPTICAL MATERIALS
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08/23/2005
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10328462
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12/23/2002
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06/24/2004
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Title:
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PROCESS AND APPARATUS FOR MANAGING USE OF A PERIPHERAL BUS AMONG A PLURALITY OF CONTROLLERS
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04/05/2005
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10328568
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12/23/2002
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Title:
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CENTRAL PROCESSING UNIT INCLUDING ADDRESS GENERATION SYSTEM AND INSTRUCTION FETCH APPARATUS
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12/06/2005
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10328614
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12/23/2002
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Title:
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LOW K POLYMER E-BEAM PRINTABLE MECHANICAL SUPPORT
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06/28/2005
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10328618
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12/24/2002
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06/24/2004
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Title:
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FOUR-PHASE HANDSHAKE ARBITRATION
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08/02/2005
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10328699
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12/23/2002
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06/24/2004
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Title:
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METHODS AND APPARATUS FOR TESTING DATA LINES
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Issue Dt:
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08/09/2005
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10328700
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12/23/2002
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07/01/2004
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Title:
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FAULT REPAIR CONTROLLER FOR REDUNDANT MEMORY INTEGRATED CIRCUITS
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03/13/2007
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10328719
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12/23/2002
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06/24/2004
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Title:
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PERIPHERAL DEVICE RECEIVER DETECTION IN A HIGH NOISE ENVIRONMENT
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12/25/2007
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10330929
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12/27/2002
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07/01/2004
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PROCESS WINDOW COMPLIANT CORRECTIONS OF DESIGN LAYOUT
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02/08/2005
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10331521
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12/30/2002
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07/01/2004
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Title:
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APPARATUS AND METHOD FOR VISUALIZING AND ANALYZING RESISTANCE NETWORKS
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12/27/2005
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10334430
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12/30/2002
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07/01/2004
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Title:
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OPTIMIZATION OF DIE YIELD IN A SILICON WAFER "SWEET SPOT"
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11/23/2004
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10334568
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12/31/2002
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07/01/2004
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Title:
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PLACEMENT OF CONFIGURABLE INPUT/OUTPUT BUFFER STRUCTURES DURING DESIGN OF INTEGRATED CIRCUITS
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Issue Dt:
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06/29/2004
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10334570
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12/31/2002
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07/01/2004
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LENGTH MATRIX GENERATOR FOR REGISTER TRANSFER LEVEL CODE
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01/25/2005
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10334731
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12/31/2002
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07/01/2004
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Title:
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NETLIST REDUNDANCY DETECTION AND GLOBAL SIMPLIFICATION
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11/02/2004
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10335177
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12/31/2002
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Title:
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MODULAR GROWTH OF MULTIPLE GATE OXIDES
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04/26/2005
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10335312
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12/31/2002
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07/01/2004
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Title:
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METHOD, SYSTEM, AND PRODUCT FOR ACHIEVING OPTIMAL TIMING IN A DATA PATH THAT INCLUDES VARIABLE DELAY LINES AND COUPLED ENDPOINTS
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05/30/2006
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10335360
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12/31/2002
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07/01/2004
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Title:
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SIMPLIFIED PROCESS TO DESIGN INTEGRATED CIRCUITS
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03/21/2006
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10335470
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12/31/2002
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Title:
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INTERCONNECT ROUTING USING PARALLEL LINES AND METHOD OF MANUFACTURE
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05/10/2005
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10335555
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12/31/2002
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07/01/2004
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Title:
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AUTOMATIC GAIN CONTROL (AGC) LOOP FOR CHARACTERIZING CONTINUOUS-TIME OR DISCRETE-TIME CIRCUITRY GAIN RESPONSE ACROSS FREQUENCY
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06/08/2004
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10335649
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12/31/2002
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07/01/2004
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TERMINATION RING FOR INTEGRATED CIRCUIT
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04/11/2006
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10337076
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01/03/2003
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07/08/2004
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Title:
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CHARACTERISTIC IMAGE OF ELECTRICAL DATA BUS
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09/28/2004
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10337080
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01/06/2003
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Pub Dt:
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07/08/2004
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DYNAMIC CONFIGURATION OF A TIME DIVISION MULTIPLEXING PORT AND ASSOCIATED DIRECT MEMORY ACCESS CONTROLLER
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11/06/2007
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10339796
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01/09/2003
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Publication #:
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Pub Dt:
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12/11/2003
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Title:
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WEIGHTED FAIR SHARE SCHEDULER FOR LARGE INPUT-BUFFERED HIGH-SPEED CROSS-POINT PACKET/CELL SWITCHES
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10339821
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Filing Dt:
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01/09/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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SPLIT AND MERGE DESIGN FLOW CONCEPT FOR FAST TURNAROUND TIME OF CIRCUIT LAYOUT DESIGN
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10339844
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Filing Dt:
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01/10/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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DONUT POWER MESH SCHEME FOR FLIP CHIP PACKAGE
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10341082
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Filing Dt:
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01/13/2003
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Publication #:
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Pub Dt:
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07/15/2004
| | | | |
Title:
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BOND PAD DESIGN
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Patent #:
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Issue Dt:
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03/25/2008
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Application #:
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10341546
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Filing Dt:
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01/13/2003
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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DIGITAL CROSS-CONNECT
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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10341963
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Filing Dt:
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01/13/2002
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Publication #:
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Pub Dt:
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07/17/2003
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Title:
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PRECISION ANALOG EXPONENTIATION CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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10347759
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Filing Dt:
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01/21/2003
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Publication #:
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Pub Dt:
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07/22/2004
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Title:
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ELECTRONIC ORGANIC SUBSTRATE
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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10348538
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Filing Dt:
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01/21/2003
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Publication #:
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Pub Dt:
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07/22/2004
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Title:
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SPARCE-REDUNDANT FIXED POINT ARITHMETIC MODULES
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10349564
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Filing Dt:
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01/22/2003
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Publication #:
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Pub Dt:
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07/22/2004
| | | | |
Title:
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NET SEGMENT ANALYZER FOR CHIP CAD LAYOUT
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10349664
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Filing Dt:
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01/22/2003
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Publication #:
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Pub Dt:
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08/05/2004
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Title:
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DECISION FUNCTION GENERATOR FOR A VITERBI DECODER
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10349770
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Filing Dt:
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01/22/2003
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Publication #:
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Pub Dt:
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07/22/2004
| | | | |
Title:
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SIMULATED VOLTAGE CONTRAST IMAGE GENERATOR AND COMPARATOR
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Patent #:
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Issue Dt:
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07/27/2010
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Application #:
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10354456
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Filing Dt:
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01/30/2003
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Publication #:
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Pub Dt:
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08/05/2004
| | | | |
Title:
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APPARATUS AND/OR METHOD FOR VARIABLE DATA RATE CONVERSION
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10355572
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Filing Dt:
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01/31/2003
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Title:
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CIRCUIT FOR ALIGNING SIGNAL WITH REFERENCE SIGNAL
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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10357030
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Filing Dt:
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01/31/2003
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Publication #:
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Pub Dt:
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08/05/2004
| | | | |
Title:
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ADJUSTABLE CURRENT-MODE EQUALIZER
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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10357044
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Filing Dt:
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01/31/2003
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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LOW CAPACITANCE DIFFERENTIAL INPUT PAD WITH COMMON MODE REJECTION, SELECTABLE INPUT IMPEDANCE, AND ESD PROTECTION
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10357142
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Filing Dt:
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02/03/2003
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Publication #:
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Pub Dt:
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08/05/2004
| | | | |
Title:
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DIELECTRIC STACK
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10357166
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Filing Dt:
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01/31/2003
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Publication #:
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Pub Dt:
|
08/05/2004
| | | | |
Title:
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DIFFERENTIAL CURRENT AMPLIFIER WITH COMMON MODE REJECTION AND HIGH FREQUENCY BOOST
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Patent #:
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Issue Dt:
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01/13/2004
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Application #:
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10357827
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Filing Dt:
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02/03/2003
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Title:
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AUTOMATIC DELAY MATCHING CIRCUIT FOR DATA SERIALIZER
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Patent #:
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Issue Dt:
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02/14/2006
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Application #:
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10357957
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Filing Dt:
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02/04/2003
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Publication #:
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Pub Dt:
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08/05/2004
| | | | |
Title:
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METHOD AND APPARATUS FOR GENERATING CRC/PARITY ERROR IN NETWORK ENVIRONMENT
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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10358968
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Filing Dt:
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02/04/2003
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Title:
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ALTERNATING APERTURE PHASE-SHIFT MASK FABRICATION METHOD
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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10360903
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Filing Dt:
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02/07/2003
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Publication #:
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Pub Dt:
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08/12/2004
| | | | |
Title:
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METHOD TO USE A LASER TO PERFORM THE EDGE CLEAN OPERATION ON A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10364836
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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03/25/2004
| | | | |
Title:
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INTEGRATED VIDEO DECODING SYSTEM WITH SPATIAL/TEMPORAL VIDEO PROCESSING
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10364866
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
|
08/12/2004
| | | | |
Title:
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ENERGY RECYCLING IN CLOCK DISTRIBUTION NETWORKS USING ON-CHIP INDUCTORS
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10368520
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Filing Dt:
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02/18/2003
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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METHODS AND STRUCTURE FOR IC TEMPERATURE SELF-MONITORING
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Patent #:
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Issue Dt:
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12/20/2005
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Application #:
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10369269
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Filing Dt:
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02/14/2003
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Publication #:
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Pub Dt:
|
08/19/2004
| | | | |
Title:
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A MODE REGISTER IN AN INTEGRATED CIRCUIT THAT STORES TEST SCRIPTS AND OPERATING PARAMETERS
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Patent #:
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Issue Dt:
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03/18/2008
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Application #:
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10370037
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Filing Dt:
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02/19/2003
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Publication #:
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Pub Dt:
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11/20/2003
| | | | |
Title:
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SCHEDULING CONNECTIONS IN A MULTI-STAGE SWITCH TO RETAIN NON-BLOCKING PROPERTIES OF CONSTITUENT SWITCHING ELEMENTS
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10371386
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Filing Dt:
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02/21/2003
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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SUBSTRATE IMPEDANCE MEASUREMENT
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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10376837
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Filing Dt:
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02/28/2003
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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MULTIPLE-BIT MEMORY LATCH CELL FOR INTEGRATED CIRCUIT GATE ARRAY
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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10377426
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Filing Dt:
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02/28/2003
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Publication #:
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Pub Dt:
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09/16/2004
| | | | |
Title:
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ADAPTIVE DEFECT BASED TESTING
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Patent #:
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Issue Dt:
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10/27/2009
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Application #:
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10377682
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Filing Dt:
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02/28/2003
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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LARGE TRANSMISSIONS ON PACKETIZED DATA BUS
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10382036
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Filing Dt:
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03/05/2003
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Publication #:
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Pub Dt:
|
09/09/2004
| | | | |
Title:
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METHOD FOR EVALUATING LOGIC FUNCTIONS BY LOGIC CIRCUITS HAVING OPTIMIZED NUMBER OF AND/OR SWITCHES
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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10387988
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Filing Dt:
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03/13/2003
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Publication #:
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Pub Dt:
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09/16/2004
| | | | |
Title:
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SEQUENTIAL TESTER FOR LONGEST PREFIX SEARCH ENGINES
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Patent #:
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Issue Dt:
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03/15/2011
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Application #:
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10389314
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Filing Dt:
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03/14/2003
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Publication #:
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Pub Dt:
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09/16/2004
| | | | |
Title:
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MULTI-CHANNEL VIDEO COMPRESSION SYSTEM
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10392206
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Filing Dt:
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03/19/2003
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Publication #:
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Pub Dt:
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09/23/2004
| | | | |
Title:
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METHOD AND INTEGRATED CIRCUIT FOR CAPACITOR MEASUREMENT WITH DIGITAL READOUT
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Issue Dt:
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08/17/2004
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Application #:
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10394445
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Filing Dt:
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03/20/2003
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Publication #:
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Pub Dt:
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11/20/2003
| | | | |
Title:
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HIGH SPEED WAFER SORT AND FINAL TEST
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Patent #:
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Issue Dt:
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09/01/2009
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10394893
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Filing Dt:
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03/21/2003
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Pub Dt:
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09/23/2004
| | | | |
Title:
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ELASTICITY BUFFER RESTARTING
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Patent #:
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Issue Dt:
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09/20/2005
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Application #:
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10396648
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Filing Dt:
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03/25/2003
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Publication #:
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Pub Dt:
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09/30/2004
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Title:
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LOW POWER, VARIABLE PRECISION DDA FOR 3D GRAPHICS APPLICATIONS
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Issue Dt:
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03/13/2007
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Application #:
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10396955
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03/24/2003
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Publication #:
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Pub Dt:
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09/30/2004
| | | | |
Title:
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LOW STRESS FLIP-CHIP PACKAGE FOR LOW-K SILICON TECHNOLOGY
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