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Reel/Frame:	033102/0270			Pages:	90
		Recorded:	06/06/2014
Attorney Dkt #:	040981-0072
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 3258
Page 27 of 33
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Patent #:	7111264	Issue Dt:	09/19/2006	Application #:	10688460	Filing Dt:	10/17/2003
Publication #:	US20050086624	Pub Dt:	04/21/2005
Title:	PROCESS AND APPARATUS FOR FAST ASSIGNMENT OF OBJECTS TO A RECTANGLE

Patent #:	6909591	Issue Dt:	06/21/2005	Application #:	10690861	Filing Dt:	10/22/2003
Publication #:	US20050088798	Pub Dt:	04/28/2005
Title:	COMPLIMENTARY METAL OXIDE SEMICONDUCTOR CAPACITOR AND METHOD FOR MAKING SAME

Patent #:	7324596	Issue Dt:	01/29/2008	Application #:	10690884	Filing Dt:	10/22/2003
Publication #:	US20050013367	Pub Dt:	01/20/2005
Title:	LOW COMPLEXITY BLOCK SIZE DECISION FOR VARIABLE BLOCK SIZE MOTION ESTIMATION

Patent #:	7000169	Issue Dt:	02/14/2006	Application #:	10691078	Filing Dt:	10/21/2003
Publication #:	US20040081261	Pub Dt:	04/29/2004
Title:	TURBO DECODING

Patent #:	6905909	Issue Dt:	06/14/2005	Application #:	10691400	Filing Dt:	10/22/2003
Publication #:	US20050090036	Pub Dt:	04/28/2005
Title:	ULTRA LOW DIELECTRIC CONSTANT THIN FILM

Patent #:	6870386	Issue Dt:	03/22/2005	Application #:	10691938	Filing Dt:	10/23/2003
Title:	METHOD AND APPARATUS FOR MEASURING SHEET RESISTANCE

Patent #:	7023719	Issue Dt:	04/04/2006	Application #:	10692091	Filing Dt:	10/23/2003
Title:	MEMORY MODULE HAVING MIRRORED PLACEMENT OF DRAM INTEGRATED CIRCUITS UPON A FOUR-LAYER PRINTED CIRCUIT BOARD

Patent #:	7181563	Issue Dt:	02/20/2007	Application #:	10692664	Filing Dt:	10/23/2003
Publication #:	US20050091465	Pub Dt:	04/28/2005
Title:	FIFO MEMORY WITH SINGLE PORT MEMORY MODULES FOR ALLOWING SIMULTANEOUS READ AND WRITE OPERATIONS

Patent #:	7111269	Issue Dt:	09/19/2006	Application #:	10693075	Filing Dt:	10/23/2003
Publication #:	US20050091627	Pub Dt:	04/28/2005
Title:	COMPARISON OF TWO HIERARCHICAL NETLIST TO GENERATE CHANGE ORDERS FOR UPDATING AN INTEGRATED CIRCUIT LAYOUT

Patent #:	6894524	Issue Dt:	05/17/2005	Application #:	10693078	Filing Dt:	10/23/2003
Publication #:	US20050088195	Pub Dt:	04/28/2005
Title:	DAISY CHAIN GANG TESTING

Patent #:	6927177	Issue Dt:	08/09/2005	Application #:	10693110	Filing Dt:	10/24/2003
Publication #:	US20050090121	Pub Dt:	04/28/2005
Title:	CHEMICAL MECHANICAL ELECTROPOLISHING SYSTEM

Patent #:	7036102	Issue Dt:	04/25/2006	Application #:	10694208	Filing Dt:	10/27/2003
Publication #:	US20050091625	Pub Dt:	04/28/2005
Title:	PROCESS AND APPARATUS FOR PLACEMENT OF CELLS IN AN IC DURING FLOORPLAN CREATION

Patent #:	6977833	Issue Dt:	12/20/2005	Application #:	10695929	Filing Dt:	10/28/2003
Publication #:	US20050088901	Pub Dt:	04/28/2005
Title:	CMOS ISOLATION CELL FOR EMBEDDED MEMORY IN POWER FAILURE ENVIRONMENTS

Patent #:	7062739	Issue Dt:	06/13/2006	Application #:	10696105	Filing Dt:	10/29/2003
Publication #:	US20050097493	Pub Dt:	05/05/2005
Title:	GATE REUSE METHODOLOGY FOR DIFFUSED CELL-BASED IP BLOCKS IN PLATFORM-BASED SILICON PRODUCTS

Patent #:	7114143	Issue Dt:	09/26/2006	Application #:	10696203	Filing Dt:	10/29/2003
Publication #:	US20050097482	Pub Dt:	05/05/2005
Title:	PROCESS YIELD LEARNING

Patent #:	7190185	Issue Dt:	03/13/2007	Application #:	10696320	Filing Dt:	10/29/2003
Publication #:	US20050093560	Pub Dt:	05/05/2005
Title:	NEW METHODOLOGY TO MEASURE MANY MORE TRANSISTORS ON THE SAME TEST AREA

Patent #:	7502390	Issue Dt:	03/10/2009	Application #:	10696912	Filing Dt:	10/30/2003
Publication #:	US20050094677	Pub Dt:	05/05/2005
Title:	OPTIMIZED INTERLEAVER AND/OR DEINTERLEAVER DESIGN

Patent #:	7107559	Issue Dt:	09/12/2006	Application #:	10697357	Filing Dt:	10/29/2003
Publication #:	US20050097488	Pub Dt:	05/05/2005
Title:	METHOD OF PARTITIONING AN INTEGRATED CIRCUIT DESIGN FOR PHYSICAL DESIGN VERIFICATION

Patent #:	7026217	Issue Dt:	04/11/2006	Application #:	10697446	Filing Dt:	10/29/2003
Title:	METHOD OF FORMING AN ANTIFUSE ON A SEMICONDUCTOR SUBSTRATE USING WET OXIDATION OF A NITRIDED SUBSTRATE

Patent #:	7323228	Issue Dt:	01/29/2008	Application #:	10697506	Filing Dt:	10/29/2003
Title:	METHOD OF VAPORIZING AND IONIZING METALS FOR USE IN SEMICONDUCTOR PROCESSING

Patent #:	7084408	Issue Dt:	08/01/2006	Application #:	10697507	Filing Dt:	10/29/2003
Title:	VAPORIZATION AND IONIZATION OF METALS FOR USE IN SEMICONDUCTOR PROCESSING

Patent #:	6930362	Issue Dt:	08/16/2005	Application #:	10698167	Filing Dt:	10/30/2003
Title:	CALCIUM DOPED POLYSILICON GATE ELECTRODES

Patent #:	6989565	Issue Dt:	01/24/2006	Application #:	10698169	Filing Dt:	10/31/2003
Title:	MEMORY DEVICE HAVING AN ELECTRON TRAPPING LAYER IN A HIGH-K DIELECTRIC GATE STACK

Patent #:	6900075	Issue Dt:	05/31/2005	Application #:	10699276	Filing Dt:	10/31/2003
Publication #:	US20050093102	Pub Dt:	05/05/2005
Title:	MIXED LVR AND HVR RETICLE SET DESIGN FOR THE PROCESSING OF GATE ARRAYS, EMBEDDED ARRAYS AND RAPID CHIP PRODUCTS

Patent #:	7536611	Issue Dt:	05/19/2009	Application #:	10700177	Filing Dt:	11/03/2003
Publication #:	US20050097383	Pub Dt:	05/05/2005
Title:	NEW HARD BISR SCHEME ALLOWING FIELD REPAIR AND USAGE OF RELIABILITY CONTROLLER

Patent #:	7003421	Issue Dt:	02/21/2006	Application #:	10700790	Filing Dt:	11/03/2003
Title:	VDD OVER AND UNDERVOLTAGE MEASUREMENT TECHNIQUES USING MONITOR CELLS

Patent #:	7023230	Issue Dt:	04/04/2006	Application #:	10700791	Filing Dt:	11/03/2003
Title:	METHOD FOR TESTING IDD AT MULTIPLE VOLTAGES

Patent #:	7376756	Issue Dt:	05/20/2008	Application #:	10701019	Filing Dt:	11/03/2003
Publication #:	US20050097236	Pub Dt:	05/05/2005
Title:	HDD FIRMWARE DOWNLOAD

Patent #:	6939727	Issue Dt:	09/06/2005	Application #:	10701328	Filing Dt:	11/03/2003
Title:	METHOD FOR PERFORMING STATISTICAL POST PROCESSING IN SEMICONDCTOR MANUFACTRING USING ID CELLS

Patent #:	7913125	Issue Dt:	03/22/2011	Application #:	10701332	Filing Dt:	11/04/2003
Publication #:	US20050097417	Pub Dt:	05/05/2005
Title:	NOVEL BISR MODE TO TEST THE REDUNDANT ELEMENTS AND REGULAR FUNCTIONAL MEMORY TO AVOID TEST ESCAPES

Patent #:	7243254	Issue Dt:	07/10/2007	Application #:	10701639	Filing Dt:	11/05/2003
Title:	LOW POWER MEMORY CONTROLLER THAT IS ADAPTABLE TO EITHER DOUBLE DATA RATE DRAM OR SINGLE DATA RATE SYNCHRONOUS DRAM CIRCUITS

Patent #:	7791210	Issue Dt:	09/07/2010	Application #:	10702996	Filing Dt:	11/05/2003
Publication #:	US20050093173	Pub Dt:	05/05/2005
Title:	SEMICONDUCTOR PACKAGE HAVING DISCRETE NON-ACTIVE ELECTRICAL COMPONENTS INCORPORATED INTO THE PACKAGE

Patent #:	6957162	Issue Dt:	10/18/2005	Application #:	10705638	Filing Dt:	11/10/2003
Publication #:	US20050114576	Pub Dt:	05/26/2005
Title:	LOW-IMPACT ANALYZER INTERFACE

Patent #:	7409602	Issue Dt:	08/05/2008	Application #:	10706127	Filing Dt:	11/12/2003
Publication #:	US20050102583	Pub Dt:	05/12/2005
Title:	METHODOLOGY FOR DEBUGGING RTL SIMULATIONS OF PROCESSOR BASED SYSTEM ON CHIP

Patent #:	7415543	Issue Dt:	08/19/2008	Application #:	10706623	Filing Dt:	11/12/2003
Publication #:	US20050102433	Pub Dt:	05/12/2005
Title:	SERIAL PORT INITIALIZATION IN STORAGE SYSTEM CONTROLLERS

Patent #:	7409561	Issue Dt:	08/05/2008	Application #:	10709967	Filing Dt:	06/09/2004
Title:	PIRACY PROTECTION FOR COMBINED HARDWARE/SOFTWARE PRODUCTS

Patent #:	7778168	Issue Dt:	08/17/2010	Application #:	10710772	Filing Dt:	08/02/2004
Title:	QUEUING SYSTEM WITH MECHANISM TO LIMIT BLOCKING OF HIGH-PRIORITY PACKETS

Patent #:	7480740	Issue Dt:	01/20/2009	Application #:	10711783	Filing Dt:	10/05/2004
Title:	METHOD AND SYSTEM FOR ENFORCING HARDWARE/SOFTWARE COMPATIBILITY CONSTRAINTS

Patent #:	7502513	Issue Dt:	03/10/2009	Application #:	10713441	Filing Dt:	11/14/2003
Publication #:	US20050108745	Pub Dt:	05/19/2005
Title:	COMMERCIAL DETECTOR WITH A START OF ACTIVE VIDEO DETECTOR

Patent #:	7257799	Issue Dt:	08/14/2007	Application #:	10713492	Filing Dt:	11/14/2003
Publication #:	US20050108495	Pub Dt:	05/19/2005
Title:	FLEXIBLE DESIGN FOR MEMORY USE IN INTEGRATED CIRCUITS

Patent #:	7166492	Issue Dt:	01/23/2007	Application #:	10713951	Filing Dt:	11/14/2003
Publication #:	US20050104172	Pub Dt:	05/19/2005
Title:	INTEGRATED CIRCUIT CARRIER APPARATUS METHOD AND SYSTEM

Patent #:	7453940	Issue Dt:	11/18/2008	Application #:	10714712	Filing Dt:	11/17/2003
Publication #:	US20050013368	Pub Dt:	01/20/2005
Title:	HIGH QUALITY, LOW MEMORY BANDWIDTH MOTION ESTIMATION PROCESSOR

Patent #:	7602849	Issue Dt:	10/13/2009	Application #:	10714736	Filing Dt:	11/17/2003
Publication #:	US20050105618	Pub Dt:	05/19/2005
Title:	ADAPTIVE REFERENCE PICTURE SELECTION BASED ON INTER-PICTURE MOTION MEASUREMENT

Patent #:	7076577	Issue Dt:	07/11/2006	Application #:	10715063	Filing Dt:	11/17/2003
Publication #:	US20050108449	Pub Dt:	05/19/2005
Title:	PIPELINE SCSI NEXUS ASSOCIATIVITY CIRCUIT

Patent #:	6980462	Issue Dt:	12/27/2005	Application #:	10715929	Filing Dt:	11/18/2003
Title:	MEMORY CELL ARCHITECTURE FOR REDUCED ROUTING CONGESTION

Patent #:	7400683	Issue Dt:	07/15/2008	Application #:	10716222	Filing Dt:	11/18/2003
Publication #:	US20050105623	Pub Dt:	05/19/2005
Title:	DEVICE WITH VIRTUAL TILIZED IMAGE MEMORY

Patent #:	6950352	Issue Dt:	09/27/2005	Application #:	10716263	Filing Dt:	11/18/2003
Title:	METHOD AND APPARATUS FOR REPLACING A DEFECTIVE CELL WITHIN A MEMORY DEVICE HAVING TWISTED BIT LINES

Patent #:	7043591	Issue Dt:	05/09/2006	Application #:	10717083	Filing Dt:	11/19/2003
Publication #:	US20050108457	Pub Dt:	05/19/2005
Title:	CROSS SWITCH SUPPORTING SIMULTANEOUS DATA TRAFFIC IN OPPOSING DIRECTIONS

Patent #:	7401164	Issue Dt:	07/15/2008	Application #:	10718286	Filing Dt:	11/19/2003
Publication #:	US20050108602	Pub Dt:	05/19/2005
Title:	METHODOLOGY FOR PERFORMING REGISTER READ/WRITES TO TWO OR MORE EXPANDERS WITH A COMMON TEST PORT

Patent #:	7634389	Issue Dt:	12/15/2009	Application #:	10718824	Filing Dt:	11/21/2003
Publication #:	US20050114094	Pub Dt:	05/26/2005
Title:	REFLECTIVITY OPTIMIZATION FOR MULTILAYER STACKS

Patent #:	7082585	Issue Dt:	07/25/2006	Application #:	10718829	Filing Dt:	11/21/2003
Publication #:	US20050114806	Pub Dt:	05/26/2005
Title:	ANALYSIS OF INTEGRATED CIRCUITS FOR HIGH FREQUENCY PERFORMANCE

Patent #:	7237043	Issue Dt:	06/26/2007	Application #:	10718937	Filing Dt:	11/21/2003
Publication #:	US20050114556	Pub Dt:	05/26/2005
Title:	SYSTEM FOR IMPROVING PCI WRITE PERFORMANCE

Patent #:	7103865	Issue Dt:	09/05/2006	Application #:	10719393	Filing Dt:	11/21/2003
Publication #:	US20050114813	Pub Dt:	05/26/2005
Title:	PROCESS AND APPARATUS FOR PLACEMENT OF MEGACELLS IN ICS DESIGN

Patent #:	7003739	Issue Dt:	02/21/2006	Application #:	10719787	Filing Dt:	11/21/2003
Publication #:	US20050114804	Pub Dt:	05/26/2005
Title:	METHOD AND APPARATUS FOR FINDING OPTIMAL UNIFICATION SUBSTITUTION FOR FORMULAS IN TECHNOLOGY LIBRARY

Patent #:	7219270	Issue Dt:	05/15/2007	Application #:	10719878	Filing Dt:	11/21/2003
Title:	DEVICE AND METHOD FOR USING A LESSENED LOAD TO MEASURE SIGNAL SKEW AT THE OUTPUT OF AN INTEGRATED CIRCUIT

Patent #:	7202911	Issue Dt:	04/10/2007	Application #:	10720360	Filing Dt:	11/24/2003
Publication #:	US20050110900	Pub Dt:	05/26/2005
Title:	METHOD AND/OR CIRCUIT FOR IMPLEMENTING A ZOOM IN A VIDEO SIGNAL

Patent #:	7362804	Issue Dt:	04/22/2008	Application #:	10720783	Filing Dt:	11/24/2003
Publication #:	US20050123282	Pub Dt:	06/09/2005
Title:	GRAPHICAL SYMBOLS FOR H.264 BITSTREAM SYNTAX ELEMENTS

Patent #:	6954091	Issue Dt:	10/11/2005	Application #:	10721843	Filing Dt:	11/25/2003
Publication #:	US20050110537	Pub Dt:	05/26/2005
Title:	PROGRAMMABLE PHASE-LOCKED LOOP

Patent #:	6998343	Issue Dt:	02/14/2006	Application #:	10721971	Filing Dt:	11/24/2003
Title:	METHOD FOR CREATING BARRIER LAYERS FOR COPPER DIFFUSION

Patent #:	6972592	Issue Dt:	12/06/2005	Application #:	10722686	Filing Dt:	11/24/2003
Publication #:	US20050138511	Pub Dt:	06/23/2005
Title:	SELF-TIMED SCAN CIRCUIT FOR ASIC FAULT TESTING

Patent #:	7183787	Issue Dt:	02/27/2007	Application #:	10723701	Filing Dt:	11/26/2003
Publication #:	US20050110512	Pub Dt:	05/26/2005
Title:	CONTACT RESISTANCE DEVICE FOR IMPROVED PROCESS CONTROL

Patent #:	7584460	Issue Dt:	09/01/2009	Application #:	10724851	Filing Dt:	12/01/2003
Publication #:	US20050022155	Pub Dt:	01/27/2005
Title:	PROCESS AND APPARATUS FOR ABSTRACTING IC DESIGN FILES

Patent #:	7032190	Issue Dt:	04/18/2006	Application #:	10724996	Filing Dt:	12/01/2003
Publication #:	US20050120321	Pub Dt:	06/02/2005
Title:	INTEGRATED CIRCUITS, AND DESIGN AND MANUFACTURE THEREOF

Patent #:	7213224	Issue Dt:	05/01/2007	Application #:	10725638	Filing Dt:	12/02/2003
Publication #:	US20050183042	Pub Dt:	08/18/2005
Title:	CUSTOMIZABLE DEVELOPMENT AND DEMONSTRATION PLATFORM FOR STRUCTURED ASICS

Patent #:	7302459	Issue Dt:	11/27/2007	Application #:	10725727	Filing Dt:	12/02/2003
Publication #:	US20040148319	Pub Dt:	07/29/2004
Title:	METHOD AND APPARATUS FOR DIGITAL SAMPLE RATE CONVERSION

Patent #:	7853968	Issue Dt:	12/14/2010	Application #:	10725743	Filing Dt:	12/02/2003
Publication #:	US20050120367	Pub Dt:	06/02/2005
Title:	COMMERCIAL DETECTION SUPPRESSOR WITH INACTIVE VIDEO MODIFICATION

Patent #:	6954082	Issue Dt:	10/11/2005	Application #:	10727474	Filing Dt:	12/04/2003
Publication #:	US20050122127	Pub Dt:	06/09/2005
Title:	METHOD AND APPARATUS FOR TESTING OF INTEGRATED CIRCUIT PACKAGE

Patent #:	7170561	Issue Dt:	01/30/2007	Application #:	10727476	Filing Dt:	12/04/2003
Publication #:	US20050122426	Pub Dt:	06/09/2005
Title:	METHOD AND APPARATUS FOR VIDEO AND IMAGE DEINTERLACING AND FORMAT CONVERSION

Patent #:	6977512	Issue Dt:	12/20/2005	Application #:	10727719	Filing Dt:	12/04/2003
Publication #:	US20050122120	Pub Dt:	06/09/2005
Title:	METHOD AND APPARATUS FOR CHARACTERIZING SHARED CONTACTS IN HIGH-DENSITY SRAM CELL DESIGN

Patent #:	7058909	Issue Dt:	06/06/2006	Application #:	10728036	Filing Dt:	12/03/2003
Publication #:	US20050125755	Pub Dt:	06/09/2005
Title:	METHOD OF GENERATING AN EFFICIENT STUCK-AT FAULT AND TRANSITION DELAY FAULT TRUNCATED SCAN TEST PATTERN FOR AN INTEGRATED CIRCUIT DESIGN

Patent #:	7409572	Issue Dt:	08/05/2008	Application #:	10728492	Filing Dt:	12/05/2003
Title:	LOW POWER MEMORY CONTROLLER WITH LEADED DOUBLE DATA RATE DRAM PACKAGE ARRANGED ON A TWO LAYER PRINTED CIRCUIT BOARD

Patent #:	7085903	Issue Dt:	08/01/2006	Application #:	10728574	Filing Dt:	12/05/2003
Publication #:	US20050125616	Pub Dt:	06/09/2005
Title:	METHOD, APPARATUS, AND PROGRAM FOR IMPROVING DATA MIRRORING PERFORMANCE IN A SCSI TOPOLOGY

Patent #:	7861271	Issue Dt:	12/28/2010	Application #:	10729050	Filing Dt:	12/05/2003
Publication #:	US20050125839	Pub Dt:	06/09/2005
Title:	BASEBAND VIDEO SIGNALING FOR SET-TOP BOX LOCAL LOOP CONNECTION

Patent #:	7340664	Issue Dt:	03/04/2008	Application #:	10729110	Filing Dt:	12/05/2003
Publication #:	US20040117716	Pub Dt:	06/17/2004
Title:	SINGLE ENGINE TURBO DECODER WITH SINGLE FRAME SIZE BUFFER FOR INTERLEAVING/DEINTERLEAVING

Patent #:	7194640	Issue Dt:	03/20/2007	Application #:	10730154	Filing Dt:	12/08/2003
Publication #:	US20050125586	Pub Dt:	06/09/2005
Title:	ALTERNATE NON-VOLATILE MEMORY FOR ROBUST I/O

Patent #:	7046033	Issue Dt:	05/16/2006	Application #:	10730337	Filing Dt:	12/08/2003
Publication #:	US20050122131	Pub Dt:	06/09/2005
Title:	TERMINATION ENABLE: HARDWARE AND SOFTWARE CONTROLLED ENABLE WITH DETECT

Patent #:	6984869	Issue Dt:	01/10/2006	Application #:	10730554	Filing Dt:	12/08/2003
Publication #:	US20050121746	Pub Dt:	06/09/2005
Title:	HIGH PERFORMANCE DIODE IMPLANTED VOLTAGE CONTROLLED P-TYPE DIFFUSION RESISTOR

Patent #:	7084618	Issue Dt:	08/01/2006	Application #:	10731534	Filing Dt:	12/08/2003
Publication #:	US20050134163	Pub Dt:	06/23/2005
Title:	PARALLEL BUS DEBUGGING TOOL

Patent #:	7415069	Issue Dt:	08/19/2008	Application #:	10731591	Filing Dt:	12/09/2003
Publication #:	US20050123055	Pub Dt:	06/09/2005
Title:	METHOD FOR ACTIVATION AND DEACTIVATION OF INFREQUENTLY CHANGING SEQUENCE AND PICTURE PARAMETER SETS

Patent #:	6911985	Issue Dt:	06/28/2005	Application #:	10732083	Filing Dt:	12/10/2003
Publication #:	US20050128206	Pub Dt:	06/16/2005
Title:	METHOD AND APPARATUS FOR REDUCING FRAME BUFFER SIZE IN GRAPHICS SYSTEMS

Patent #:	7346111	Issue Dt:	03/18/2008	Application #:	10732135	Filing Dt:	12/10/2003
Publication #:	US20050129129	Pub Dt:	06/16/2005
Title:	CO-LOCATED MOTION VECTOR STORAGE

Patent #:	7362809	Issue Dt:	04/22/2008	Application #:	10732137	Filing Dt:	12/10/2003
Publication #:	US20050129122	Pub Dt:	06/16/2005
Title:	COMPUTATIONAL REDUCTION IN MOTION ESTIMATION BASED ON LOWER BOUND OF COST FUNCTION

Patent #:	7328417	Issue Dt:	02/05/2008	Application #:	10732395	Filing Dt:	12/09/2003
Publication #:	US20050125759	Pub Dt:	06/09/2005
Title:	CELL-BASED METHOD FOR CREATING SLOTTED METAL IN SEMICONDUCTOR DESIGNS

Patent #:	7148146	Issue Dt:	12/12/2006	Application #:	10733034	Filing Dt:	12/11/2003
Title:	METHOD OF FABRICATING AN INTEGRAL CAPACITOR AND GATE TRANSISTOR HAVING NITRIDE AND OXIDE POLISH STOP LAYERS USING CHEMICAL MECHANICAL POLISHING ELIMINATION

Patent #:	7206973	Issue Dt:	04/17/2007	Application #:	10733546	Filing Dt:	12/11/2003
Publication #:	US20050132110	Pub Dt:	06/16/2005
Title:	PCI VALIDATION

Patent #:	7330991	Issue Dt:	02/12/2008	Application #:	10733751	Filing Dt:	12/11/2003
Publication #:	US20040230855	Pub Dt:	11/18/2004
Title:	METHOD AND/OR APPARATUS FOR PAGING TO A DYNAMIC MEMORY ARRAY

Patent #:	7653523	Issue Dt:	01/26/2010	Application #:	10736386	Filing Dt:	12/15/2003
Publication #:	US20050132308	Pub Dt:	06/16/2005
Title:	METHOD FOR CALCULATING HIGH-RESOLUTION WAFER PARAMETER PROFILES

Patent #:	7064062	Issue Dt:	06/20/2006	Application #:	10738761	Filing Dt:	12/16/2003
Publication #:	US20050127458	Pub Dt:	06/16/2005
Title:	INCORPORATING DOPANTS TO ENHANCE THE DIELECTRIC PROPERTIES OF METAL SILICATES

Patent #:	7362801	Issue Dt:	04/22/2008	Application #:	10739388	Filing Dt:	12/18/2003
Publication #:	US20050135466	Pub Dt:	06/23/2005
Title:	METHOD FOR ACCURATE ESTIMATION OF NOISE FOR DATA MODEMS

Patent #:	6988260	Issue Dt:	01/17/2006	Application #:	10739460	Filing Dt:	12/18/2003
Publication #:	US20050138597	Pub Dt:	06/23/2005
Title:	METHOD AND APPARATUS FOR OPTIMIZING FRAGMENTATION OF BOUNDARIES FOR OPTICAL PROXIMITY CORRECTION (OPC) PURPOSES

Patent #:	7401328	Issue Dt:	07/15/2008	Application #:	10739742	Filing Dt:	12/18/2003
Publication #:	US20050138607	Pub Dt:	06/23/2005
Title:	SOFTWARE-IMPLEMENTED GROUPING TECHNIQUES FOR USE IN A SUPERSCALAR DATA PROCESSING SYSTEM

Patent #:	7646814	Issue Dt:	01/12/2010	Application #:	10739829	Filing Dt:	12/18/2003
Publication #:	US20050147172	Pub Dt:	07/07/2005
Title:	LOW COMPLEXITY TRANSCODING BETWEEN VIDEOSTREAMS USING DIFFERENT ENTROPY CODING

Patent #:	7269803	Issue Dt:	09/11/2007	Application #:	10740284	Filing Dt:	12/18/2003
Publication #:	US20050138595	Pub Dt:	06/23/2005
Title:	SYSTEM AND METHOD FOR MAPPING LOGICAL COMPONENTS TO PHYSICAL LOCATIONS IN AN INTEGRATED CIRCUIT DESIGN ENVIRONMENT

Patent #:	7039896	Issue Dt:	05/02/2006	Application #:	10740359	Filing Dt:	12/18/2003
Publication #:	US20050138596	Pub Dt:	06/23/2005
Title:	GRADIENT METHOD OF MASK EDGE CORRECTION

Patent #:	7260735	Issue Dt:	08/21/2007	Application #:	10741319	Filing Dt:	12/18/2003
Publication #:	US20050138639	Pub Dt:	06/23/2005
Title:	METHOD AND SYSTEM FOR MAINTAINING A RUNNING COUNT OF EVENTS UPDATED BY TWO ASYNCHRONOUS PROCESSES

Patent #:	7289925	Issue Dt:	10/30/2007	Application #:	10743957	Filing Dt:	12/23/2003
Publication #:	US20050138490	Pub Dt:	06/23/2005
Title:	SYSTEMS AND METHODS FOR ASSESSING TIMING OF PCI SIGNALS

Patent #:	7098528	Issue Dt:	08/29/2006	Application #:	10744363	Filing Dt:	12/22/2003
Publication #:	US20050133935	Pub Dt:	06/23/2005
Title:	EMBEDDED REDISTRIBUTION INTERPOSER FOR FOOTPRINT COMPATIBLE CHIP PACKAGE CONVERSION

Patent #:	7362376	Issue Dt:	04/22/2008	Application #:	10744693	Filing Dt:	12/23/2003
Publication #:	US20050134602	Pub Dt:	06/23/2005
Title:	METHOD AND APPARATUS FOR VIDEO DEINTERLACING AND FORMAT CONVERSION

Patent #:	7345708	Issue Dt:	03/18/2008	Application #:	10744729	Filing Dt:	12/23/2003
Publication #:	US20050134730	Pub Dt:	06/23/2005
Title:	METHOD AND APPARATUS FOR VIDEO DEINTERLACING AND FORMAT CONVERSION

100

Patent #:	7310682	Issue Dt:	12/18/2007	Application #:	10755144	Filing Dt:	01/08/2004
Publication #:	US20050165948	Pub Dt:	07/28/2005
Title:	SYSTEMS AND METHODS FOR IMPROVING NETWORK PERFORMANCE

Assignor

LSI LOGIC CORPORATION

Exec Dt:

04/06/2007

Assignee

LSI CORPORATION

1320 RIDDER PARK DRIVE

SAN JOSE, CALIFORNIA 95131

Correspondence name and address
	LATHAM & WATKINS LLP
	650 TOWN CENTER DRIVE, SUITE 2000
	COSTA MESA, CA 92626

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