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Reel/Frame:033102/0270   Pages: 90
Recorded: 06/06/2014
Attorney Dkt #:040981-0072
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 3258
Page 31 of 33
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
Patent #:
Issue Dt:
08/21/2007
Application #:
11115561
Filing Dt:
04/27/2005
Publication #:
Pub Dt:
11/02/2006
Title:
CONFIGURABLE I/OS FOR MULTI-CHIP MODULES
2
Patent #:
Issue Dt:
06/02/2009
Application #:
11115798
Filing Dt:
04/27/2005
Publication #:
Pub Dt:
11/02/2006
Title:
I /O PLANNING WITH LOCK AND INSERTION FEATURES
3
Patent #:
Issue Dt:
10/02/2007
Application #:
11116591
Filing Dt:
04/28/2005
Publication #:
Pub Dt:
08/24/2006
Title:
PATTERN DETECTION FOR INTEGRATED CIRCUIT SUBSTRATES
4
Patent #:
Issue Dt:
07/03/2007
Application #:
11116616
Filing Dt:
04/28/2005
Publication #:
Pub Dt:
11/02/2006
Title:
SCAN TEST EXPANSION MODULE
5
Patent #:
Issue Dt:
07/25/2006
Application #:
11117682
Filing Dt:
04/28/2005
Title:
ANALOG TO DIGITAL CONVERTER BUILT IN SELF TEST
6
Patent #:
Issue Dt:
11/06/2007
Application #:
11120067
Filing Dt:
05/02/2005
Publication #:
Pub Dt:
12/14/2006
Title:
METHOD OF INTERCONNECT FOR MULTI-SLOT METAL-MASK PROGRAMMABLE RELOCATABLE FUNCTION PLACED IN AN I/O REGION
7
Patent #:
Issue Dt:
12/14/2010
Application #:
11122426
Filing Dt:
05/05/2005
Publication #:
Pub Dt:
11/24/2005
Title:
MULTIPLEXED BUTTON DATA SYSTEM
8
Patent #:
Issue Dt:
12/02/2008
Application #:
11123432
Filing Dt:
05/06/2005
Publication #:
Pub Dt:
11/09/2006
Title:
SYSTEM AND METHOD FOR IMPROVING TRANSITION DELAY FAULT COVERAGE IN DELAY FAULT TESTS THROUGH USE OF AN ENHANCED SCAN FLIP-FLOP
9
Patent #:
Issue Dt:
11/06/2007
Application #:
11124438
Filing Dt:
05/06/2005
Publication #:
Pub Dt:
11/09/2006
Title:
SYSTEM AND METHOD FOR IMPROVING TRANSITION DELAY FAULT COVERAGE IN DELAY FAULT TESTS THROUGH USE OF TRANSITION LAUNCH FLIP-FLOP
10
Patent #:
Issue Dt:
09/15/2009
Application #:
11124536
Filing Dt:
05/09/2005
Publication #:
Pub Dt:
11/09/2006
Title:
COMPACT MEMORY MANAGEMENT UNIT
11
Patent #:
Issue Dt:
12/02/2008
Application #:
11124649
Filing Dt:
05/09/2005
Publication #:
Pub Dt:
11/09/2006
Title:
METHOD AND SYSTEM FOR IMPROVING QUALITY OF A CIRCUIT THROUGH NON-FUNCTIONAL TEST PATTERN IDENTIFICATION
12
Patent #:
Issue Dt:
12/04/2007
Application #:
11125307
Filing Dt:
05/09/2005
Publication #:
Pub Dt:
11/09/2006
Title:
RELOCATABLE MIXED-SIGNAL FUNCTIONS
13
Patent #:
Issue Dt:
07/04/2006
Application #:
11125860
Filing Dt:
05/10/2005
Title:
CIRCUIT FOR IMPROVED DIAGNOSABILITY OF DEFECTS IN A FUSE SCAN STRUCTURE
14
Patent #:
NONE
Issue Dt:
Application #:
11125863
Filing Dt:
05/10/2005
Publication #:
Pub Dt:
11/16/2006
Title:
Method and system for improving integrated circuit manufacturing yield
15
Patent #:
Issue Dt:
09/18/2007
Application #:
11126880
Filing Dt:
05/11/2005
Publication #:
Pub Dt:
11/16/2006
Title:
R-CELLS CONTAINING CDM CLAMPS
16
Patent #:
Issue Dt:
05/13/2008
Application #:
11129547
Filing Dt:
05/13/2005
Publication #:
Pub Dt:
11/16/2006
Title:
RELOCATABLE BUILT-IN SELF TEST (BIST) ELEMENTS FOR RELOCATABLE MIXED-SIGNAL ELEMENTS
17
Patent #:
Issue Dt:
10/25/2011
Application #:
11130350
Filing Dt:
05/16/2005
Title:
INTEGRATED CIRCUIT CELL ARCHITECTURE CONFIGURABLE FOR MEMORY OR LOGIC ELEMENTS
18
Patent #:
Issue Dt:
01/29/2008
Application #:
11131705
Filing Dt:
05/18/2005
Publication #:
Pub Dt:
10/13/2005
Title:
VOLTAGE CONTRAST MONITOR FOR INTEGRATED CIRCUIT DEFECTS
19
Patent #:
Issue Dt:
02/05/2008
Application #:
11131990
Filing Dt:
05/18/2005
Publication #:
Pub Dt:
12/14/2006
Title:
METHODS FOR USING CHECKSUMS IN X-TOLERANT TEST RESPONSE COMPACTION IN SCAN-BASED TESTING OF INTEGRATED CIRCUITS
20
Patent #:
Issue Dt:
04/08/2008
Application #:
11132751
Filing Dt:
05/18/2005
Publication #:
Pub Dt:
07/20/2006
Title:
METHOD AND APPARATUS FOR AVOIDING DICING CHIP-OUTS IN INTEGRATED CIRCUIT DIE
21
Patent #:
Issue Dt:
01/13/2009
Application #:
11133815
Filing Dt:
05/20/2005
Publication #:
Pub Dt:
11/23/2006
Title:
USE OF CONFIGURABLE MIXED-SIGNAL BUILDING BLOCK FUNCTIONS TO ACCOMPLISH CUSTOM FUNCTIONS
22
Patent #:
Issue Dt:
04/15/2008
Application #:
11136180
Filing Dt:
05/24/2005
Publication #:
Pub Dt:
11/30/2006
Title:
MIXED-SIGNAL FUNCTIONS USING R-CELLS
23
Patent #:
Issue Dt:
12/21/2010
Application #:
11136236
Filing Dt:
05/24/2005
Publication #:
Pub Dt:
11/30/2006
Title:
SELECTIVE TEST POINT FOR HIGH SPEED SERDES CORES IN SEMICONDUCTOR DESIGN
24
Patent #:
Issue Dt:
09/12/2006
Application #:
11140142
Filing Dt:
05/27/2005
Title:
METHOD AND SYSTEM FOR AREA EFFICIENT CHARGE-BASED CAPACITANCE MEASUREMENT
25
Patent #:
Issue Dt:
03/04/2008
Application #:
11140392
Filing Dt:
05/27/2005
Publication #:
Pub Dt:
11/30/2006
Title:
METHOD FOR ABSTRACTION OF MANUFACTURING TEST ACCESS AND CONTROL PORTS TO SUPPORT AUTOMATED RTL MANUFACTURING TEST INSERTION FLOW FOR REUSABLE MODULES
26
Patent #:
Issue Dt:
05/05/2009
Application #:
11140455
Filing Dt:
05/27/2005
Publication #:
Pub Dt:
11/30/2006
Title:
ZERO ATE INSERTION FORCE INTERPOSER DAUGHTER CARD
27
Patent #:
Issue Dt:
02/19/2008
Application #:
11140896
Filing Dt:
05/31/2005
Publication #:
Pub Dt:
11/30/2006
Title:
AUTOMATIC PLACEMENT BASED ESD PROTECTION INSERTION
28
Patent #:
Issue Dt:
09/21/2010
Application #:
11141795
Filing Dt:
05/31/2005
Publication #:
Pub Dt:
11/30/2006
Title:
ADAPTIVE METHOD FOR TRAINING A SOURCE SYNCHRONOUS PARALLEL RECEIVER
29
Patent #:
Issue Dt:
04/19/2011
Application #:
11142725
Filing Dt:
05/31/2005
Title:
NON-TENSIONED CARBON NANOTUBE SWITCH DESIGN AND PROCESS FOR MAKING SAME
30
Patent #:
Issue Dt:
06/02/2009
Application #:
11145366
Filing Dt:
06/03/2005
Publication #:
Pub Dt:
12/07/2006
Title:
SIMULATED BATTERY LOGIC TESTING DEVICE
31
Patent #:
Issue Dt:
09/04/2012
Application #:
11147855
Filing Dt:
06/07/2005
Publication #:
Pub Dt:
12/07/2006
Title:
METHOD FOR REDUCING LATENCY
32
Patent #:
Issue Dt:
07/07/2009
Application #:
11152554
Filing Dt:
06/14/2005
Publication #:
Pub Dt:
12/14/2006
Title:
DEMODULATION OF A FOCUSING ERROR SIGNAL DURING A FOCUS SEARCH FOR A LENS FOCUSING CONTROL IN AN OPTICAL DISC SYSTEM
33
Patent #:
Issue Dt:
01/13/2009
Application #:
11156128
Filing Dt:
06/17/2005
Publication #:
Pub Dt:
12/21/2006
Title:
SYSTEMS AND METHODS FOR DEINTERLACING VIDEO SIGNALS
34
Patent #:
Issue Dt:
12/02/2008
Application #:
11157270
Filing Dt:
06/20/2005
Publication #:
Pub Dt:
01/04/2007
Title:
ADAPTIVE ELASTICITY FIFO
35
Patent #:
Issue Dt:
02/13/2007
Application #:
11165778
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
12/28/2006
Title:
METHOD AND COMPUTER PROGRAM FOR ESTIMATING SPEED-UP AND SLOW-DOWN NET DELAYS FOR AN INTEGRATED CIRCUIT DESIGN
36
Patent #:
Issue Dt:
07/01/2008
Application #:
11166292
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
12/28/2006
Title:
PROGRAMMABLE DATA STROBE ENABLE ARCHITECTURE FOR DDR MEMORY APPLICATIONS
37
Patent #:
Issue Dt:
02/05/2008
Application #:
11167629
Filing Dt:
06/27/2005
Publication #:
Pub Dt:
12/28/2006
Title:
INTEGRATED CLOCK GENERATOR WITH PROGRAMMABLE SPREAD SPECTRUM USING STANDARD PLL CIRCUITRY
38
Patent #:
Issue Dt:
05/08/2007
Application #:
11173529
Filing Dt:
07/01/2005
Publication #:
Pub Dt:
01/04/2007
Title:
METHOD AND/OR APPARATUS FOR TRAINING DQS STROBE GATING
39
Patent #:
Issue Dt:
08/17/2010
Application #:
11174135
Filing Dt:
06/30/2005
Publication #:
Pub Dt:
01/25/2007
Title:
CIRCUIT PROTECTION SYSTEM
40
Patent #:
Issue Dt:
06/22/2010
Application #:
11176040
Filing Dt:
07/07/2005
Publication #:
Pub Dt:
01/11/2007
Title:
EFFICIENT AND HIGH SPEED 2D DATA TRANSPOSE ENGINE FOR SOC APPLICATION
41
Patent #:
Issue Dt:
10/28/2008
Application #:
11176041
Filing Dt:
07/07/2005
Publication #:
Pub Dt:
01/11/2007
Title:
DQS STROBE CENTERING (DATA EYE TRAINING) METHOD
42
Patent #:
Issue Dt:
11/11/2008
Application #:
11176514
Filing Dt:
07/07/2005
Publication #:
Pub Dt:
01/11/2007
Title:
APPLICATION SPECIFIC CONFIGURABLE LOGIC IP
43
Patent #:
Issue Dt:
11/02/2010
Application #:
11182615
Filing Dt:
07/15/2005
Publication #:
Pub Dt:
01/18/2007
Title:
DIGITALLY OBTAINING CONTOURS OF FABRICATED POLYGONS
44
Patent #:
Issue Dt:
06/13/2006
Application #:
11183580
Filing Dt:
07/18/2005
Title:
METHOD AND/OR APPARATUS FOR TRANSCODING BETWEEN H.264 CABAC AND CAVLC ENTROPY CODING MODES
45
Patent #:
Issue Dt:
05/08/2007
Application #:
11184621
Filing Dt:
07/19/2005
Publication #:
Pub Dt:
01/25/2007
Title:
TESTING WITH HIGH SPEED PULSE GENERATOR
46
Patent #:
Issue Dt:
07/13/2010
Application #:
11187362
Filing Dt:
07/22/2005
Publication #:
Pub Dt:
02/15/2007
Title:
SAFE RECOVERY IN DVD RECORDABLE/REWRITABLE REALTIME RECORDING
47
Patent #:
Issue Dt:
05/20/2008
Application #:
11187401
Filing Dt:
07/21/2005
Publication #:
Pub Dt:
01/25/2007
Title:
ELECTROSTATIC DISCHARGE TESTING
48
Patent #:
Issue Dt:
07/22/2008
Application #:
11189026
Filing Dt:
07/25/2005
Title:
BASIC CELL ARCHITECTURE FOR STRUCTURED APPLICATION-SPECIFIC INTEGRATED CIRCUITS
49
Patent #:
Issue Dt:
11/03/2009
Application #:
11190035
Filing Dt:
07/26/2005
Publication #:
Pub Dt:
02/01/2007
Title:
FLEXIBLE SAMPLING-RATE ENCODER
50
Patent #:
Issue Dt:
08/21/2007
Application #:
11192526
Filing Dt:
07/29/2005
Publication #:
Pub Dt:
02/01/2007
Title:
DELAY COMPUTATION SPEED UP AND INCREMENTALITY
51
Patent #:
Issue Dt:
09/30/2008
Application #:
11192544
Filing Dt:
07/30/2005
Publication #:
Pub Dt:
02/01/2007
Title:
METHODS AND STRUCTURE FOR IMPROVED IMPORT/EXPORT OF RAID LEVEL 6 VOLUMES
52
Patent #:
Issue Dt:
01/29/2008
Application #:
11192580
Filing Dt:
07/30/2005
Publication #:
Pub Dt:
02/01/2007
Title:
APPARATUS AND METHODS FOR A STATIC MUX-BASED PRIORITY ENCODER
53
Patent #:
Issue Dt:
12/09/2008
Application #:
11194299
Filing Dt:
08/01/2005
Publication #:
Pub Dt:
02/01/2007
Title:
RESOURCE ESTIMATION FOR DESIGN PLANNING
54
Patent #:
Issue Dt:
09/29/2009
Application #:
11195048
Filing Dt:
08/02/2005
Publication #:
Pub Dt:
02/08/2007
Title:
METHOD AND/OR APPARATUS FOR VIDEO WATERMARKING AND STEGANOGRAPHY USING SIMULATED FILM GRAIN
55
Patent #:
NONE
Issue Dt:
Application #:
11195049
Filing Dt:
08/02/2005
Publication #:
Pub Dt:
02/08/2007
Title:
Compressed domain commercial detect/skip
56
Patent #:
Issue Dt:
10/04/2011
Application #:
11195053
Filing Dt:
08/02/2005
Publication #:
Pub Dt:
02/08/2007
Title:
PERFORMANCE ADAPTIVE VIDEO ENCODING WITH CONCURRENT DECODING
57
Patent #:
Issue Dt:
10/14/2008
Application #:
11198416
Filing Dt:
08/05/2005
Publication #:
Pub Dt:
02/08/2007
Title:
CONFIGURABLE HIGH-SPEED MEMORY INTERFACE SUBSYSTEM
58
Patent #:
Issue Dt:
04/10/2012
Application #:
11198456
Filing Dt:
08/05/2005
Publication #:
Pub Dt:
02/08/2007
Title:
METHOD AND APPARATUS FOR MPEG-2 TO H.264 VIDEO TRANSCODING
59
Patent #:
NONE
Issue Dt:
Application #:
11199434
Filing Dt:
08/08/2005
Publication #:
Pub Dt:
02/08/2007
Title:
Method for creating constraints for integrated circuit design closure
60
Patent #:
Issue Dt:
11/30/2010
Application #:
11200671
Filing Dt:
08/10/2005
Publication #:
Pub Dt:
02/15/2007
Title:
DVD EFM MODULATION ARCHITECTURE USING TWO PASSES TO REDUCE CIRCUIT SIZE
61
Patent #:
Issue Dt:
11/20/2007
Application #:
11204669
Filing Dt:
08/16/2005
Publication #:
Pub Dt:
02/22/2007
Title:
ENABLING EFFICIENT DESIGN REUSE IN PLATFORM ASICS
62
Patent #:
Issue Dt:
12/23/2008
Application #:
11204670
Filing Dt:
08/16/2005
Publication #:
Pub Dt:
02/22/2007
Title:
IP PLACEMENT VALIDATION
63
Patent #:
Issue Dt:
03/31/2009
Application #:
11205365
Filing Dt:
08/17/2005
Publication #:
Pub Dt:
02/22/2007
Title:
MULTIMODE DELAY ANALYSIS FOR SIMPLIFYING INTEGRATED CIRCUIT DESIGN TIMING MODELS
64
Patent #:
Issue Dt:
01/29/2008
Application #:
11216918
Filing Dt:
08/31/2005
Publication #:
Pub Dt:
03/01/2007
Title:
TIMING VIOLATION DEBUGGING INSIDE PLACE AND ROUTE TOOL
65
Patent #:
Issue Dt:
10/23/2007
Application #:
11221636
Filing Dt:
09/08/2005
Title:
CONTENT ADDRESSABLE MEMORY (CAM) ARCHITECTURE AND METHOD OF OPERATING THE SAME
66
Patent #:
Issue Dt:
06/15/2010
Application #:
11224771
Filing Dt:
09/13/2005
Publication #:
Pub Dt:
03/29/2007
Title:
METHODS AND STRUCTURE FOR DETECTING SAS LINK ERRORS WITH MINIMAL IMPACT ON SAS INITIATOR AND LINK BANDWIDTH
67
Patent #:
Issue Dt:
09/15/2009
Application #:
11225309
Filing Dt:
09/12/2005
Publication #:
Pub Dt:
03/29/2007
Title:
PROCESS FOR IDENTIFYING DUPLICATE VALUES IN VERY LARGE DATA SETS
68
Patent #:
Issue Dt:
06/24/2008
Application #:
11226086
Filing Dt:
09/13/2005
Publication #:
Pub Dt:
03/15/2007
Title:
DATA-PROCESSING SYSTEM AND METHOD FOR SUPPORTING VARYING SIZES OF CACHE MEMORY
69
Patent #:
Issue Dt:
05/22/2012
Application #:
11227789
Filing Dt:
09/15/2005
Publication #:
Pub Dt:
03/15/2007
Title:
TRANSPARENT METHODS FOR ALTERING THE VIDEO DECODER FRAME-RATE IN A FIXED-FRAME-RATE AUDIO-VIDEO MULTIPLEX STRUCTURE
70
Patent #:
Issue Dt:
12/13/2011
Application #:
11228771
Filing Dt:
09/16/2005
Publication #:
Pub Dt:
04/05/2007
Title:
METHOD AND SYSTEM FOR GENERATING A GLOBAL TEST PLAN AND IDENTIFYING TEST REQUIREMENTS IN A STORAGE SYSTEM ENVIRONMENT
71
Patent #:
Issue Dt:
01/09/2007
Application #:
11231310
Filing Dt:
09/20/2005
Title:
SEVERE ASYMMETRY COMPENSATOR FOR OPTICAL RECORDING PRML READ CHANNEL
72
Patent #:
Issue Dt:
08/31/2010
Application #:
11232927
Filing Dt:
09/22/2005
Publication #:
Pub Dt:
03/22/2007
Title:
ADDESS BUFFER MODE SWITCHING FOR VARYING REQUEST SIZES
73
Patent #:
Issue Dt:
10/19/2010
Application #:
11234700
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
03/29/2007
Title:
SYSTEMS AND METHODS FOR GATHERING DEBUG INFORMATION
74
Patent #:
Issue Dt:
09/04/2007
Application #:
11237064
Filing Dt:
09/27/2005
Title:
LATCH-BASED RANDOM ACCESS MEMORY (LBRAM) TRI-STATE BANKING ARCHITECTURE
75
Patent #:
Issue Dt:
03/04/2008
Application #:
11239977
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
04/05/2007
Title:
METHOD AND SYSTEM FOR ANALYZING THE QUALITY OF AN OPC MASK
76
Patent #:
Issue Dt:
02/20/2007
Application #:
11243622
Filing Dt:
10/04/2005
Title:
CONVERTING DUAL PORT MEMORY INTO 2 SINGLE PORT MEMORIES
77
Patent #:
Issue Dt:
07/29/2008
Application #:
11243839
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
04/05/2007
Title:
METHOD FOR PERFORMING DESIGN RULE CHECK OF INTEGRATED CIRCUIT
78
Patent #:
Issue Dt:
05/06/2008
Application #:
11244486
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
04/05/2007
Title:
METHOD AND COMPUTER PROGRAM FOR DETAILED ROUTING OF AN INTEGRATED CIRCUIT DESIGN WITH MULTIPLE ROUTING RULES AND NET CONSTRAINTS
79
Patent #:
Issue Dt:
08/19/2008
Application #:
11244530
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
04/05/2007
Title:
METHOD AND COMPUTER PROGRAM FOR INCREMENTAL PLACEMENT AND ROUTING WITH NESTED SHELLS
80
Patent #:
Issue Dt:
12/16/2008
Application #:
11246880
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
04/12/2007
Title:
METHOD FOR SRAM BITMAP VERIFICATION
81
Patent #:
Issue Dt:
10/16/2007
Application #:
11247517
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
10/12/2006
Title:
DEFECT ANALYSIS USING A YIELD VEHICLE
82
Patent #:
Issue Dt:
10/21/2008
Application #:
11247630
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
04/12/2007
Title:
ON-THE-FLY RTL INSTRUCTOR FOR ADVANCED DFT AND DESIGN CLOSURE
83
Patent #:
Issue Dt:
10/30/2007
Application #:
11247879
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
04/12/2007
Title:
SYSTEM AND METHOD FOR COERCION OF DISK DRIVE SIZE FOR USE IN A RAID VOLUME
84
Patent #:
Issue Dt:
04/22/2008
Application #:
11248378
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
04/12/2007
Title:
LOAD BALANCING OF DISK DRIVES
85
Patent #:
Issue Dt:
07/08/2008
Application #:
11248509
Filing Dt:
10/12/2005
Publication #:
Pub Dt:
06/15/2006
Title:
APPARATUS TO PASSIVATE INDUCTIVELY OR CAPACITIVELY COUPLED SURFACE CURRENTS UNDER CAPACITOR STRUCTURES
86
Patent #:
Issue Dt:
02/17/2009
Application #:
11251393
Filing Dt:
10/14/2005
Publication #:
Pub Dt:
04/19/2007
Title:
METHODS AND STRUCTURE FOR OPTIMIZING SAS DOMAIN LINK QUALITY AND PERFORMANCE
87
Patent #:
Issue Dt:
01/05/2010
Application #:
11252846
Filing Dt:
10/18/2005
Publication #:
Pub Dt:
04/19/2007
Title:
CUSTOMIZATION OF OPTION ROM IMAGES
88
Patent #:
Issue Dt:
03/03/2009
Application #:
11252877
Filing Dt:
10/19/2005
Publication #:
Pub Dt:
09/14/2006
Title:
LITHOGRAPHIC APPARATUS AND DEVICE MANUFACTURING METHOD, AN INTEGRATED CIRCUIT, A FLAT PANEL DISPLAY, AND A METHOD OF COMPENSATING FOR CUPPING
89
Patent #:
Issue Dt:
09/18/2007
Application #:
11256696
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
04/26/2007
Title:
METHOD AND/OR APPARATUS FOR IMPLEMENTING A VOLTAGE CONTROLLED RING OSCILLATOR HAVING A MULTI-PEAK DETECTED AMPLITUDE CONTROL LOOP
90
Patent #:
Issue Dt:
04/08/2008
Application #:
11256829
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
04/26/2007
Title:
RRAM CONTROLLER BUILT IN SELF TEST MEMORY
91
Patent #:
Issue Dt:
06/15/2010
Application #:
11256830
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
04/26/2007
Title:
HIGH PERFORMANCE TILING FOR RRAM MEMORY
92
Patent #:
Issue Dt:
08/25/2009
Application #:
11257606
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
04/26/2007
Title:
CENTER ERROR MECHANICAL CENTER ADJUSTMENT
93
Patent #:
Issue Dt:
09/01/2009
Application #:
11258253
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
02/16/2006
Title:
I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS IN DEEP-SUBMICRON CMOS PROCESS
94
Patent #:
Issue Dt:
03/20/2007
Application #:
11259228
Filing Dt:
10/25/2005
Title:
RRAM FLIPFLOP RCELL MEMORY GENERATOR
95
Patent #:
Issue Dt:
08/25/2009
Application #:
11259300
Filing Dt:
10/26/2005
Publication #:
Pub Dt:
04/26/2007
Title:
CE TO RRO CANCELLATION FOR SLED CONTROL
96
Patent #:
Issue Dt:
09/29/2009
Application #:
11259596
Filing Dt:
10/26/2005
Title:
SYSTEM AND METHOD FOR REDUCING STORAGE REQUIREMENTS FOR CONTENT ADAPTIVE BINARY ARITHMETIC CODING
97
Patent #:
Issue Dt:
07/29/2008
Application #:
11260334
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
05/03/2007
Title:
ASYMMETRIC ALIGNMENT OF SUBSTRATE INTERCONNECT TO SEMICONDUCTOR DIE
98
Patent #:
Issue Dt:
09/15/2009
Application #:
11260442
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
05/03/2007
Title:
VARIABLE LOOP BANDWIDTH PHASE LOCKED LOOP
99
Patent #:
Issue Dt:
11/17/2009
Application #:
11262173
Filing Dt:
10/28/2005
Title:
SHALLOW TRENCH ISOLATION STRUCTURE WITH LOW TRENCH PARASITIC CAPACITANCE
100
Patent #:
Issue Dt:
08/24/2010
Application #:
11262444
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/03/2007
Title:
USING CODE AS KEYS FOR COPY PROTECTION
Assignor
1
Exec Dt:
04/06/2007
Assignee
1
1320 RIDDER PARK DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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