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Reel/Frame:	033102/0270			Pages:	90
		Recorded:	06/06/2014
Attorney Dkt #:	040981-0072
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 3258
Page 32 of 33
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Patent #:	7401171	Issue Dt:	07/15/2008	Application #:	11262679	Filing Dt:	10/31/2005
Publication #:	US20070100847	Pub Dt:	05/03/2007
Title:	METHODS AND STRUCTURE FOR SAS EXPANDER INITIATING COMMUNICATION TO A SAS INITIATOR TO IDENTIFY CHANGES IN THE SAS DOMAIN

Patent #:	7571397	Issue Dt:	08/04/2009	Application #:	11265040	Filing Dt:	11/02/2005
Publication #:	US20070099313	Pub Dt:	05/03/2007
Title:	METHOD OF DESIGN BASED PROCESS CONTROL OPTIMIZATION

Patent #:	7716543	Issue Dt:	05/11/2010	Application #:	11266056	Filing Dt:	11/02/2005
Publication #:	US20070101200	Pub Dt:	05/03/2007
Title:	METHODS AND SYSTEMS FOR ELIMINATING TEST SYSTEM REBOOTS BETWEEN FUNCTIONAL TESTS OF HOST ADAPTER BOARDS

Patent #:	7640396	Issue Dt:	12/29/2009	Application #:	11266132	Filing Dt:	11/02/2005
Publication #:	US20070101062	Pub Dt:	05/03/2007
Title:	ALL PURPOSE PROCESSOR IMPLEMENTATION TO SUPPORT DIFFERENT TYPES OF CACHE MEMORY ARCHITECTURES

Patent #:	7327011	Issue Dt:	02/05/2008	Application #:	11266133	Filing Dt:	11/02/2005
Publication #:	US20070096252	Pub Dt:	05/03/2007
Title:	MULTI-SURFACED PLATE-TO-PLATE CAPACITOR AND METHOD OF FORMING SAME

Patent #:	7529968	Issue Dt:	05/05/2009	Application #:	11267999	Filing Dt:	11/07/2005
Publication #:	US20070168701	Pub Dt:	07/19/2007
Title:	STORING RAID CONFIGURATION DATA WITHIN A BIOS IMAGE

Patent #:	8076779	Issue Dt:	12/13/2011	Application #:	11269275	Filing Dt:	11/08/2005
Publication #:	US20070102812	Pub Dt:	05/10/2007
Title:	REDUCTION OF MACRO LEVEL STRESSES IN COPPER/LOW-K WAFERS

Patent #:	7328382	Issue Dt:	02/05/2008	Application #:	11270077	Filing Dt:	11/09/2005
Publication #:	US20060161804	Pub Dt:	07/20/2006
Title:	MEMORY BISR CONTROLLER ARCHITECTURE

Patent #:	7325216	Issue Dt:	01/29/2008	Application #:	11271991	Filing Dt:	11/09/2005
Publication #:	US20070104029	Pub Dt:	05/10/2007
Title:	METHOD AND COMPUTER PROGRAM FOR SPREADING TRACE SEGMENTS IN AN INTEGRATED CIRCUIT PACKAGE DESIGN

Patent #:	8401070	Issue Dt:	03/19/2013	Application #:	11272300	Filing Dt:	11/10/2005
Publication #:	US20070104273	Pub Dt:	05/10/2007
Title:	METHOD FOR ROBUST INVERSE TELECINE

Patent #:	7551232	Issue Dt:	06/23/2009	Application #:	11273304	Filing Dt:	11/14/2005
Publication #:	US20070109448	Pub Dt:	05/17/2007
Title:	NOISE ADAPTIVE 3D COMPOSITE NOISE REDUCTION

Patent #:	7583571	Issue Dt:	09/01/2009	Application #:	11273518	Filing Dt:	11/14/2005
Publication #:	US20070109937	Pub Dt:	05/17/2007
Title:	WRITE BASED POWER ADAPTIVE CONTROL SYSTEM

Patent #:	7545900	Issue Dt:	06/09/2009	Application #:	11273940	Filing Dt:	11/15/2005
Publication #:	US20070110206	Pub Dt:	05/17/2007
Title:	LOW JITTER AND/OR FAST LOCK-IN CLOCK RECOVERY CIRCUIT

Patent #:	7180011	Issue Dt:	02/20/2007	Application #:	11276938	Filing Dt:	03/17/2006
Title:	DEVICE FOR MINIMIZING DIFFERENTIAL PAIR LENGTH MISMATCH AND IMPEDANCE DISCONTINUITIES IN AN INTEGRATED CIRCUIT PACKAGE DESIGN

Patent #:	8049340	Issue Dt:	11/01/2011	Application #:	11277188	Filing Dt:	03/22/2006
Publication #:	US20070222084	Pub Dt:	09/27/2007
Title:	DEVICE FOR AVOIDING PARASITIC CAPACITANCE IN AN INTEGRATED CIRCUIT PACKAGE

Patent #:	7764614	Issue Dt:	07/27/2010	Application #:	11280590	Filing Dt:	11/15/2005
Publication #:	US20070110086	Pub Dt:	05/17/2007
Title:	MULTI-MODE MANAGEMENT OF A SERIAL COMMUNICATION LINK

Patent #:	7496474	Issue Dt:	02/24/2009	Application #:	11280639	Filing Dt:	11/16/2005
Publication #:	US20070112544	Pub Dt:	05/17/2007
Title:	DYNAMIC ON-CHIP LOGIC ANALYSIS

Patent #:	7539091	Issue Dt:	05/26/2009	Application #:	11282881	Filing Dt:	11/18/2005
Publication #:	US20070115792	Pub Dt:	05/24/2007
Title:	DIFFERENTIAL PUSH-PULL GAIN CONTROLLING METHOD AND APPARATUS TO REDUCE THE EFFECTS OF ROTATIONAL ECCENTRICITY

Patent #:	7205673	Issue Dt:	04/17/2007	Application #:	11283044	Filing Dt:	11/18/2005
Title:	REDUCE OR ELIMINATE IMC CRACKING IN POST WIRE BONDED DIES BY DOPING ALUMINUM USED IN BOND PADS DURING CU/LOW-K BEOL PROCESSING

Patent #:	8552560	Issue Dt:	10/08/2013	Application #:	11283219	Filing Dt:	11/18/2005
Publication #:	US20070114667	Pub Dt:	05/24/2007
Title:	ALTERNATE PAD STRUCTURES/PASSIVATION INEGRATION SCHEMES TO REDUCE OR ELIMINATE IMC CRACKING IN POST WIRE BONDED DIES DURING CU/LOW-K BEOL PROCESSING

Patent #:	7298036	Issue Dt:	11/20/2007	Application #:	11283340	Filing Dt:	11/18/2005
Publication #:	US20070114644	Pub Dt:	05/24/2007
Title:	SCALING OF FUNCTIONAL ASSIGNMENTS IN PACKAGES

Patent #:	NONE	Issue Dt:		Application #:	11284864	Filing Dt:	11/22/2005
Publication #:	US20070150627	Pub Dt:	06/28/2007
Title:	Endian mapping engine, method of endian mapping and a processing system employing the engine and the method

Patent #:	7793010	Issue Dt:	09/07/2010	Application #:	11285243	Filing Dt:	11/22/2005
Publication #:	US20070130407	Pub Dt:	06/07/2007
Title:	BUS SYSTEM WITH MULTIPLE MODES OF OPERATION

Patent #:	7494842	Issue Dt:	02/24/2009	Application #:	11286546	Filing Dt:	11/23/2005
Publication #:	US20070114613	Pub Dt:	05/24/2007
Title:	PROGRAMMABLE NANOTUBE INTERCONNECT

Patent #:	7655548	Issue Dt:	02/02/2010	Application #:	11286557	Filing Dt:	11/23/2005
Publication #:	US20070114517	Pub Dt:	05/24/2007
Title:	PROGRAMMABLE POWER MANAGEMENT USING A NANOTUBE STRUCTURE

Patent #:	7847285	Issue Dt:	12/07/2010	Application #:	11286558	Filing Dt:	11/23/2005
Publication #:	US20070125999	Pub Dt:	06/07/2007
Title:	CONFIGURABLE POWER SEGMENTATION USING A NANOTUBE STRUCTURE

Patent #:	7379281	Issue Dt:	05/27/2008	Application #:	11287615	Filing Dt:	11/28/2005
Publication #:	US20070121262	Pub Dt:	05/31/2007
Title:	BIAS FOR ELECTROSTATIC DISCHARGE PROTECTION

Patent #:	7254761	Issue Dt:	08/07/2007	Application #:	11287927	Filing Dt:	11/28/2005
Publication #:	US20070122922	Pub Dt:	05/31/2007
Title:	PLATFORM ASIC RELIABILITY

Patent #:	7531442	Issue Dt:	05/12/2009	Application #:	11290087	Filing Dt:	11/30/2005
Publication #:	US20070123024	Pub Dt:	05/31/2007
Title:	ELIMINATE IMC CRACKING IN POST WIREBONDED DIES: MACRO LEVEL STRESS REDUCTION BY MODIFYING DIELECTRIC/METAL FILM STACK IN BE LAYERS DURING CU/LOW-K PROCESSING

Patent #:	7698477	Issue Dt:	04/13/2010	Application #:	11290096	Filing Dt:	11/30/2005
Publication #:	US20070121495	Pub Dt:	05/31/2007
Title:	METHOD AND APPARATUS FOR MANAGING FLOW CONTROL IN PCI EXPRESS TRANSACTION LAYER

Patent #:	NONE	Issue Dt:		Application #:	11290178	Filing Dt:	11/30/2005
Publication #:	US20070124628	Pub Dt:	05/31/2007
Title:	Methods of memory bitmap verification for finished product

Patent #:	7496861	Issue Dt:	02/24/2009	Application #:	11290186	Filing Dt:	11/30/2005
Publication #:	US20070124716	Pub Dt:	05/31/2007
Title:	METHOD FOR GENERALIZING DESIGN ATTRIBUTES IN A DESIGN CAPTURE ENVIRONMENT

Patent #:	7701508	Issue Dt:	04/20/2010	Application #:	11290194	Filing Dt:	11/30/2005
Publication #:	US20070121001	Pub Dt:	05/31/2007
Title:	ACCURATE MOTION DETECTION FOR THE COMBINATION OF MOTION ADAPTIVE AND MOTION COMPENSATION DE-INTERLACING APPLICATIONS

Patent #:	7813429	Issue Dt:	10/12/2010	Application #:	11293404	Filing Dt:	12/02/2005
Publication #:	US20060083311	Pub Dt:	04/20/2006
Title:	SYSTEM AND METHOD FOR SEGMENTATION OF MACROBLOCKS

Patent #:	7624330	Issue Dt:	11/24/2009	Application #:	11299506	Filing Dt:	12/12/2005
Publication #:	US20070136641	Pub Dt:	06/14/2007
Title:	UNIFIED MEMORY ARCHITECTURE FOR RECORDING APPLICATIONS

Patent #:	7539798	Issue Dt:	05/26/2009	Application #:	11300012	Filing Dt:	12/14/2005
Publication #:	US20070136521	Pub Dt:	06/14/2007
Title:	MITIGATING PERFORMANCE DEGRADATION CAUSED BY A SATA DRIVE ATTACHED TO A SAS DOMAIN

Patent #:	7551414	Issue Dt:	06/23/2009	Application #:	11300938	Filing Dt:	12/15/2005
Publication #:	US20070138973	Pub Dt:	06/21/2007
Title:	ELECTROSTATIC DISCHARGE SERIES PROTECTION

Patent #:	8001374	Issue Dt:	08/16/2011	Application #:	11303506	Filing Dt:	12/16/2005
Publication #:	US20070140477	Pub Dt:	06/21/2007
Title:	MEMORY ENCRYPTION FOR DIGITAL VIDEO

Patent #:	7498664	Issue Dt:	03/03/2009	Application #:	11304862	Filing Dt:	12/14/2005
Publication #:	US20070132083	Pub Dt:	06/14/2007
Title:	SEMICONDUCTOR PACKAGE HAVING INCREASED RESISTANCE TO ELECTROSTATIC DISCHARGE

Patent #:	7617391	Issue Dt:	11/10/2009	Application #:	11305180	Filing Dt:	12/15/2005
Publication #:	US20070143589	Pub Dt:	06/21/2007
Title:	METHOD AND APPARATUS FOR DYNAMICALLY SELECTING ONE OF MULTIPLE FIRMWARE IMAGES FOR BOOTING AN I/O CONTROLLER

Patent #:	7489154	Issue Dt:	02/10/2009	Application #:	11305749	Filing Dt:	12/16/2005
Publication #:	US20070139065	Pub Dt:	06/21/2007
Title:	TESTING HIGH FREQUENCY SIGNALS ON A TRACE

Patent #:	NONE	Issue Dt:		Application #:	11305992	Filing Dt:	12/19/2005
Publication #:	US20070143541	Pub Dt:	06/21/2007
Title:	Methods and structure for improved migration of raid logical volumes

Patent #:	7546568	Issue Dt:	06/09/2009	Application #:	11311515	Filing Dt:	12/19/2005
Publication #:	US20070143725	Pub Dt:	06/21/2007
Title:	AUTOMATION OF TIE CELL INSERTION, OPTIMIZATION AND REPLACEMENT BY SCAN FLIP-FLOPS TO INCREASE FAULT COVERAGE

Patent #:	7418550	Issue Dt:	08/26/2008	Application #:	11311523	Filing Dt:	12/19/2005
Publication #:	US20070028044	Pub Dt:	02/01/2007
Title:	METHODS AND STRUCTURE FOR IMPROVED IMPORT/EXPORT OF RAID LEVEL 6 VOLUMES

Patent #:	8176217	Issue Dt:	05/08/2012	Application #:	11312080	Filing Dt:	12/20/2005
Publication #:	US20070162636	Pub Dt:	07/12/2007
Title:	SYSTEM AND METHOD FOR IMPLEMENTING A STORAGE PROTOCOL WITH INITIATOR CONTROLLED DATA TRANSFER

Patent #:	8018805	Issue Dt:	09/13/2011	Application #:	11314883	Filing Dt:	12/21/2005
Publication #:	US20070140074	Pub Dt:	06/21/2007
Title:	MEDIA TYPE DETECTION USING A LOCK INDICATOR

Patent #:	7720556	Issue Dt:	05/18/2010	Application #:	11315959	Filing Dt:	12/21/2005
Publication #:	US20070142930	Pub Dt:	06/21/2007
Title:	WEB-ENABLED SOLUTIONS FOR MEMORY COMPILATION TO SUPPORT PRE-SALES ESTIMATION OF MEMORY SIZE, PERFORMANCE AND POWER DATA FOR MEMORY COMPONENTS

Patent #:	7288947	Issue Dt:	10/30/2007	Application #:	11316011	Filing Dt:	12/19/2005
Publication #:	US20070139031	Pub Dt:	06/21/2007
Title:	METHOD FOR SIMULATING RESISTOR CHARACTERISTICS AT HIGH ELECTRIC FIELDS

Patent #:	7599008	Issue Dt:	10/06/2009	Application #:	11318231	Filing Dt:	12/23/2005
Publication #:	US20070121013	Pub Dt:	05/31/2007
Title:	METHOD AND/OR APPARATUS FOR CROSS-COLOR AND CROSS-LUMINANCE SUPPRESSION USING SHIMMER DETECTION

Patent #:	7566923	Issue Dt:	07/28/2009	Application #:	11318332	Filing Dt:	12/23/2005
Publication #:	US20070145413	Pub Dt:	06/28/2007
Title:	ISOLATED POWER DOMAIN CORE REGIONS IN PLATFORM ASICS

Patent #:	7480878	Issue Dt:	01/20/2009	Application #:	11321260	Filing Dt:	12/29/2005
Publication #:	US20070157140	Pub Dt:	07/05/2007
Title:	METHOD AND SYSTEM FOR LAYOUT VERSUS SCHEMATIC VALIDATION OF INTEGRATED CIRCUIT DESIGNS

Patent #:	7129690	Issue Dt:	10/31/2006	Application #:	11321747	Filing Dt:	12/29/2005
Title:	AT-SPEED ON-CHIP SHORT CLOCK CYCLE MONITORING SYSTEM AND METHOD

Patent #:	7436040	Issue Dt:	10/14/2008	Application #:	11323398	Filing Dt:	12/29/2005
Publication #:	US20070259518	Pub Dt:	11/08/2007
Title:	METHOD AND APPARATUS FOR DIVERTING VOID DIFFUSION IN INTEGRATED CIRCUIT CONDUCTORS

Patent #:	7361965	Issue Dt:	04/22/2008	Application #:	11323400	Filing Dt:	12/29/2005
Publication #:	US20070155160	Pub Dt:	07/05/2007
Title:	METHOD AND APPARATUS FOR REDIRECTING VOID DIFFUSION AWAY FROM VIAS IN AN INTEGRATED CIRCUIT DESIGN

Patent #:	7434198	Issue Dt:	10/07/2008	Application #:	11323401	Filing Dt:	12/29/2005
Publication #:	US20070157152	Pub Dt:	07/05/2007
Title:	METHOD AND COMPUTER PROGRAM PRODUCT FOR DETECTING POTENTIAL FAILURES IN AN INTEGRATED CIRCUIT DESIGN AFTER OPTICAL PROXIMITY CORRECTION

Patent #:	7429733	Issue Dt:	09/30/2008	Application #:	11323405	Filing Dt:	12/29/2005
Publication #:	US20070152151	Pub Dt:	07/05/2007
Title:	METHOD AND SAMPLE FOR RADIATION MICROSCOPY INCLUDING A PARTICLE BEAM CHANNEL FORMED IN THE SAMPLE SOURCE

Patent #:	7458060	Issue Dt:	11/25/2008	Application #:	11323468	Filing Dt:	12/30/2005
Publication #:	US20070157153	Pub Dt:	07/05/2007
Title:	YIELD-LIMITING DESIGN-RULES-COMPLIANT PATTERN LIBRARY GENERATION AND LAYOUT INSPECTION

Patent #:	8260943	Issue Dt:	09/04/2012	Application #:	11323595	Filing Dt:	12/29/2005
Publication #:	US20070156914	Pub Dt:	07/05/2007
Title:	APPLYING A TRANSFER FUNCTION TO A SIGNAL FOR DETERMINING COMPLIANCE TO A SPECIFICATION

Patent #:	7555039	Issue Dt:	06/30/2009	Application #:	11323935	Filing Dt:	12/29/2005
Publication #:	US20070156360	Pub Dt:	07/05/2007
Title:	SIMULTANEOUS DISPLAY OF EYE DIAGRAM AND JITTER PROFILE DURING DEVICE CHARACTERIZATION

Patent #:	7334204	Issue Dt:	02/19/2008	Application #:	11324082	Filing Dt:	12/29/2005
Publication #:	US20070157143	Pub Dt:	07/05/2007
Title:	SYSTEM FOR AVOIDING FALSE PATH PESSIMISM IN ESTIMATING NET DELAY FOR AN INTEGRATED CIRCUIT DESIGN

Patent #:	7617427	Issue Dt:	11/10/2009	Application #:	11324084	Filing Dt:	12/29/2005
Publication #:	US20070157056	Pub Dt:	07/05/2007
Title:	METHOD AND APPARATUS FOR DETECTING DEFECTS IN INTEGRATED CIRCUIT DIE FROM STIMULATION OF STATISTICAL OUTLIER SIGNATURES

Patent #:	7409660	Issue Dt:	08/05/2008	Application #:	11324105	Filing Dt:	12/29/2005
Publication #:	US20070157145	Pub Dt:	07/05/2007
Title:	METHOD AND END CELL LIBRARY FOR AVOIDING SUBSTRATE NOISE IN AN INTEGRATED CIRCUIT

Patent #:	8212828	Issue Dt:	07/03/2012	Application #:	11325291	Filing Dt:	01/04/2006
Publication #:	US20070153013	Pub Dt:	07/05/2007
Title:	HYBRID MULTIPLE BIT-DEPTH VIDEO PROCESSING ARCHITECTURE

Patent #:	7397295	Issue Dt:	07/08/2008	Application #:	11345929	Filing Dt:	02/02/2006
Publication #:	US20070176645	Pub Dt:	08/02/2007
Title:	ACTIVE CURRENT CANCELLATION FOR HIGH PERFORMANCE VIDEO CLAMPS

Patent #:	7493576	Issue Dt:	02/17/2009	Application #:	11349356	Filing Dt:	02/07/2006
Publication #:	US20060245126	Pub Dt:	11/02/2006
Title:	CDM ESD EVENT PROTECTION IN APPLICATION CIRCUITS

Patent #:	7458044	Issue Dt:	11/25/2008	Application #:	11349358	Filing Dt:	02/07/2006
Publication #:	US20060245127	Pub Dt:	11/02/2006
Title:	CDM ESD EVENT SIMULATION AND REMEDIATION THEREOF IN APPLICATION CIRCUITS

Patent #:	7689965	Issue Dt:	03/30/2010	Application #:	11351091	Filing Dt:	02/09/2006
Publication #:	US20070186198	Pub Dt:	08/09/2007
Title:	GENERATION OF AN EXTRACTED TIMING MODEL FILE

Patent #:	7612828	Issue Dt:	11/03/2009	Application #:	11355027	Filing Dt:	02/15/2006
Publication #:	US20070188662	Pub Dt:	08/16/2007
Title:	PROGRESSIVE VIDEO DETECTION WITH AGGREGATED BLOCK SADS

Patent #:	7584368	Issue Dt:	09/01/2009	Application #:	11355631	Filing Dt:	02/16/2006
Publication #:	US20070192639	Pub Dt:	08/16/2007
Title:	APPARATUS AND METHODS FOR POWER MANAGEMENT AND SPIN-UP IN A STORAGE SYSTEM

Patent #:	7529980	Issue Dt:	05/05/2009	Application #:	11360103	Filing Dt:	02/23/2006
Publication #:	US20070220176	Pub Dt:	09/20/2007
Title:	METHOD AND APPARATUS FOR INJECTING ERRORS INTO SAS DOMAINS THROUGH SAS EXPANDERS

Patent #:	7259591	Issue Dt:	08/21/2007	Application #:	11366735	Filing Dt:	03/02/2006
Publication #:	US20070205804	Pub Dt:	09/06/2007
Title:	MULTI-BIT CONFIGURATION PINS

Patent #:	7409498	Issue Dt:	08/05/2008	Application #:	11366921	Filing Dt:	03/02/2006
Publication #:	US20070208909	Pub Dt:	09/06/2007
Title:	SCALED COERCION OF DISK DRIVE CAPACITY

Patent #:	7529877	Issue Dt:	05/05/2009	Application #:	11374260	Filing Dt:	03/13/2006
Publication #:	US20070214303	Pub Dt:	09/13/2007
Title:	APPARATUS AND METHODS FOR SIMPLIFIED SSP LINK LAYER PROCESSING

Patent #:	8751718	Issue Dt:	06/10/2014	Application #:	11374359	Filing Dt:	03/13/2006
Publication #:	US20070226757	Pub Dt:	09/27/2007
Title:	Apparatus and methods for a simplified, multi-client SAS port for management of other devices in an enhanced SAS device

Patent #:	7577928	Issue Dt:	08/18/2009	Application #:	11376781	Filing Dt:	03/15/2006
Publication #:	US20070220462	Pub Dt:	09/20/2007
Title:	VERIFICATION OF AN EXTRACTED TIMING MODEL FILE

Patent #:	7567259	Issue Dt:	07/28/2009	Application #:	11389974	Filing Dt:	03/27/2006
Publication #:	US20070222790	Pub Dt:	09/27/2007
Title:	SYSTEM AND METHOD FOR DISPLAY COMPOSITING

Patent #:	8053824	Issue Dt:	11/08/2011	Application #:	11397252	Filing Dt:	04/03/2006
Publication #:	US20070228520	Pub Dt:	10/04/2007
Title:	INTERDIGITATED MESH TO PROVIDE DISTRIBUTED, HIGH QUALITY FACTOR CAPACITIVE COUPLING

Patent #:	7646091	Issue Dt:	01/12/2010	Application #:	11399723	Filing Dt:	04/06/2006
Publication #:	US20070235849	Pub Dt:	10/11/2007
Title:	SEMICONDUCTOR PACKAGE AND METHOD USING ISOLATED VSS PLANE TO ACCOMMODATE HIGH SPEED CIRCUITRY GROUND ISOLATION

Patent #:	7201176	Issue Dt:	04/10/2007	Application #:	11403137	Filing Dt:	04/11/2006
Publication #:	US20060180176	Pub Dt:	08/17/2006
Title:	WAFER CHUCKING APPARATUS FOR SPIN PROCESSOR

Patent #:	7400170	Issue Dt:	07/15/2008	Application #:	11413497	Filing Dt:	04/28/2006
Publication #:	US20070252619	Pub Dt:	11/01/2007
Title:	DIFFERENTIAL CURRENT-MODE DRIVER WITH HIGH COMMON-MODE RANGE AND CONTROLLED EDGE RATES

Patent #:	8890638	Issue Dt:	11/18/2014	Application #:	11437059	Filing Dt:	05/18/2006
Publication #:	US20070268088	Pub Dt:	11/22/2007
Title:	STUB-TUNED WIREBOND PACKAGE

Patent #:	7633840	Issue Dt:	12/15/2009	Application #:	11450846	Filing Dt:	06/09/2006
Publication #:	US20070286038	Pub Dt:	12/13/2007
Title:	OPTIMIZING FOCUS POINT FOR OPTICAL DISC

Patent #:	7594201	Issue Dt:	09/22/2009	Application #:	11460680	Filing Dt:	07/28/2006
Publication #:	US20060282801	Pub Dt:	12/14/2006
Title:	ENHANCED METHOD OF OPTIMIZING MULTIPLEX STRUCTURES AND MULTIPLEX CONTROL STRUCTURES IN RTL CODE

Patent #:	7480881	Issue Dt:	01/20/2009	Application #:	11465662	Filing Dt:	08/18/2006
Publication #:	US20080046848	Pub Dt:	02/21/2008
Title:	METHOD AND COMPUTER PROGRAM FOR STATIC TIMING ANALYSIS WITH DELAY DE-RATING AND CLOCK CONSERVATISM REDUCTION

Patent #:	8165291	Issue Dt:	04/24/2012	Application #:	11466867	Filing Dt:	08/24/2006
Publication #:	US20080068003	Pub Dt:	03/20/2008
Title:	RANDOM SEED STABILITY WITH FUSES

Patent #:	7802156	Issue Dt:	09/21/2010	Application #:	11466876	Filing Dt:	08/24/2006
Publication #:	US20090323870	Pub Dt:	12/31/2009
Title:	IDENTIFICATION CIRCUIT WITH REPEATABLE OUTPUT CODE

Patent #:	7603637	Issue Dt:	10/13/2009	Application #:	11466885	Filing Dt:	08/24/2006
Publication #:	US20080082875	Pub Dt:	04/03/2008
Title:	SECURE, STABLE ON CHIP SILICON IDENTIFICATION

Patent #:	7490307	Issue Dt:	02/10/2009	Application #:	11478044	Filing Dt:	06/29/2006
Publication #:	US20080005710	Pub Dt:	01/03/2008
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100

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Title:	APPARATUS AND METHOD OF MANUFACTURE FOR INTEGRATED CIRCUIT AND CMOS DEVICE INCLUDING EPITAXIALLY GROWN DIELECTRIC ON SILICON CARBIDE

Assignor

LSI LOGIC CORPORATION

Exec Dt:

04/06/2007

Assignee

LSI CORPORATION

1320 RIDDER PARK DRIVE

SAN JOSE, CALIFORNIA 95131

Correspondence name and address
	LATHAM & WATKINS LLP
	650 TOWN CENTER DRIVE, SUITE 2000
	COSTA MESA, CA 92626

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