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Reel/Frame:033102/0270   Pages: 90
Recorded: 06/06/2014
Attorney Dkt #:040981-0072
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 3258
Page 33 of 33
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
Patent #:
Issue Dt:
09/02/2008
Application #:
11527108
Filing Dt:
09/25/2006
Publication #:
Pub Dt:
01/18/2007
Title:
FAILURE ANALYSIS VEHICLE FOR YIELD ENHANCEMENT WITH SELF TEST AT SPEED BURNIN CAPABILITY FOR RELIABILITY TESTING
2
Patent #:
NONE
Issue Dt:
Application #:
11527153
Filing Dt:
09/26/2006
Publication #:
Pub Dt:
03/27/2008
Title:
Method and apparatus for managing virtual team collaboration meetings
3
Patent #:
Issue Dt:
01/06/2009
Application #:
11530397
Filing Dt:
09/08/2006
Publication #:
Pub Dt:
03/13/2008
Title:
IDENTIFICATION OF UNCOMMITTED MEMORY BLOCKS DURING AN INITIALIZATION PROCEDURE
4
Patent #:
Issue Dt:
03/09/2010
Application #:
11530518
Filing Dt:
09/11/2006
Publication #:
Pub Dt:
03/13/2008
Title:
STABILIZATION FOR RANDOM CHIP IDENTIFIER CIRCUIT
5
Patent #:
Issue Dt:
05/19/2009
Application #:
11534340
Filing Dt:
09/22/2006
Publication #:
Pub Dt:
03/27/2008
Title:
LOW MUTUAL INDUCTANCE MATCHED INDUCTORS
6
Patent #:
Issue Dt:
06/24/2008
Application #:
11538187
Filing Dt:
10/03/2006
Publication #:
Pub Dt:
06/26/2008
Title:
DEVICE FOR AVOIDING TIMING VIOLATIONS RESULTING FROM PROCESS DEFECTS IN A BACKFILLED METAL LAYER OF AN INTEGRATED CIRCUIT
7
Patent #:
Issue Dt:
10/12/2010
Application #:
11538900
Filing Dt:
10/05/2006
Publication #:
Pub Dt:
04/10/2008
Title:
APPARATUS AND METHODS FOR IMPROVED SATA DEVICE INTERACTION WITHOUT A SAS EXPANDER
8
Patent #:
NONE
Issue Dt:
Application #:
11545406
Filing Dt:
10/10/2006
Publication #:
Pub Dt:
04/10/2008
Title:
Clock generation with minimum number of crystals in a multimedia system
9
Patent #:
Issue Dt:
06/07/2011
Application #:
11545872
Filing Dt:
10/10/2006
Publication #:
Pub Dt:
07/03/2008
Title:
SYSTEM AND METHOD FOR CONNECTING SAS RAID CONTROLLER DEVICE CHANNELS ACROSS REDUNDANT STORAGE SUBSYSTEMS
10
Patent #:
NONE
Issue Dt:
Application #:
11554673
Filing Dt:
10/31/2006
Publication #:
Pub Dt:
06/19/2008
Title:
SYSTEMS AND METHODS FOR IMPROVED PRODUCT VARIANT CONFIGURATION AND DISTRIBUTION IN HUB-BASED DISTRIBUTION
11
Patent #:
Issue Dt:
06/09/2009
Application #:
11557513
Filing Dt:
11/08/2006
Publication #:
Pub Dt:
05/08/2008
Title:
BUILT IN SELF TEST TRANSPORT CONTROLLER ARCHITECTURE
12
Patent #:
Issue Dt:
05/18/2010
Application #:
11562189
Filing Dt:
11/21/2006
Publication #:
Pub Dt:
05/22/2008
Title:
SAS ZONE GROUP PERMISSION TABLE VERSION IDENTIFIERS
13
Patent #:
Issue Dt:
02/24/2009
Application #:
11562207
Filing Dt:
11/21/2006
Publication #:
Pub Dt:
05/22/2008
Title:
CIRCUIT, SYSTEMS AND METHODS FOR MONITORING STORAGE CONTROLLER STATUS
14
Patent #:
Issue Dt:
03/10/2009
Application #:
11562228
Filing Dt:
11/21/2006
Publication #:
Pub Dt:
05/22/2008
Title:
METHODS AND SYSTEMS FOR INTEGRATING UNIQUE INFORMATION IN SAS INTERFACE COMPONENTS
15
Patent #:
Issue Dt:
04/26/2011
Application #:
11565670
Filing Dt:
12/01/2006
Publication #:
Pub Dt:
06/05/2008
Title:
PARALLEL LDPC DECODER
16
Patent #:
Issue Dt:
09/28/2010
Application #:
11565701
Filing Dt:
12/01/2006
Publication #:
Pub Dt:
06/05/2008
Title:
WIRE BOND INTEGRATED CIRCUIT PACKAGE FOR HIGH SPEED I/O
17
Patent #:
Issue Dt:
12/09/2008
Application #:
11588087
Filing Dt:
10/26/2006
Publication #:
Pub Dt:
05/01/2008
Title:
SYSTEM FOR INTERLEAVED STORAGE OF VIDEO DATA
18
Patent #:
Issue Dt:
03/22/2011
Application #:
11613256
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
07/10/2008
Title:
LOW COMPLEXITY LDPC ENCODING ALGORITHM
19
Patent #:
Issue Dt:
10/26/2010
Application #:
11613529
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
LOW AREA ARCHITECTURE IN BCH DECODER
20
Patent #:
Issue Dt:
06/15/2010
Application #:
11626400
Filing Dt:
01/24/2007
Publication #:
Pub Dt:
07/24/2008
Title:
PIPELINED LDPC ARITHMETIC UNIT
21
Patent #:
Issue Dt:
04/21/2015
Application #:
11634645
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
03/20/2008
Title:
Band-pass high-order analog filter backed hybrid receiver equalization
22
Patent #:
Issue Dt:
06/09/2009
Application #:
11634683
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
06/12/2008
Title:
OPTIMIZATION OF FLIP FLOP INITIALIZATION STRUCTURES WITH RESPECT TO DESIGN SIZE AND DESIGN CLOSURE EFFORT FROM RTL TO NETLIST
23
Patent #:
NONE
Issue Dt:
Application #:
11637592
Filing Dt:
12/12/2006
Publication #:
Pub Dt:
06/12/2008
Title:
Real time elastic FIFO latency optimization
24
Patent #:
Issue Dt:
12/01/2009
Application #:
11640551
Filing Dt:
12/18/2006
Publication #:
Pub Dt:
06/19/2008
Title:
POLYMORPHIC MANAGEMENT OF EMBEDDED DEVICES USING WEB INTERFACES
25
Patent #:
Issue Dt:
07/07/2009
Application #:
11641989
Filing Dt:
12/18/2006
Publication #:
Pub Dt:
06/19/2008
Title:
ELECTRONIC COMPONENT CONNECTION SUPPORT STRUCTURES INCLUDING AIR AS A DIELECTRIC
26
Patent #:
Issue Dt:
05/04/2010
Application #:
11642045
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
METHOD AND APPARATUS FOR BOOTING INDEPENDENT OPERATING SYSTEMS IN A MULTI-PROCESSOR CORE INTEGRATED CIRCUIT
27
Patent #:
Issue Dt:
01/19/2010
Application #:
11642322
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
07/12/2007
Title:
METHOD AND SYSTEM FOR INTERLEAVING FIRST AND SECOND HALVES OF A DATA SEGMENT OF UNKNOWN LENGTH
28
Patent #:
Issue Dt:
11/18/2008
Application #:
11643492
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
06/26/2008
Title:
SYSTEM AND METHOD FOR COMPENSATING FOR PVT VARIATION EFFECTS ON THE DELAY LINE OF A CLOCK SIGNAL
29
Patent #:
Issue Dt:
05/06/2008
Application #:
11643642
Filing Dt:
12/21/2006
Title:
EFFICIENT 8X8 CABAC RESIDUAL BLOCK TRANSCODE SYSTEM
30
Patent #:
Issue Dt:
08/10/2010
Application #:
11654056
Filing Dt:
01/16/2007
Publication #:
Pub Dt:
06/05/2008
Title:
SYSTEM AND METHOD OF VOLUME GROUP CREATION BASED ON AN AUTOMATIC DRIVE SELECTION SCHEME
31
Patent #:
Issue Dt:
10/11/2011
Application #:
11654272
Filing Dt:
01/16/2007
Publication #:
Pub Dt:
07/17/2008
Title:
HIERARCHY OF A STRUCTURE OF A VOLUME
32
Patent #:
Issue Dt:
02/02/2010
Application #:
11654311
Filing Dt:
01/16/2007
Publication #:
Pub Dt:
06/05/2008
Title:
RELIABLE AND EFFICIENT DATA TRANSFER OVER SERIAL PORT
33
Patent #:
Issue Dt:
07/14/2009
Application #:
11680366
Filing Dt:
02/28/2007
Publication #:
Pub Dt:
08/28/2008
Title:
APPARATUS AND METHODS FOR CLUSTERING MULTIPLE INDEPENDENT PCI EXPRESS HIERARCHIES
34
Patent #:
Issue Dt:
11/24/2009
Application #:
11682798
Filing Dt:
03/06/2007
Publication #:
Pub Dt:
07/03/2008
Title:
APPARATUS AND METHODS FOR MULTIPLE UNIDIRECTIONAL VIRTUAL CONNECTIONS AMONG SAS DEVICES
35
Patent #:
Issue Dt:
09/28/2010
Application #:
11691195
Filing Dt:
03/26/2007
Publication #:
Pub Dt:
10/02/2008
Title:
METHODS AND STRUCTURES FOR TESTING SAS TRANSCEIVER TRAINING OPTIONS IN SAS-2 TRAINING WINDOWS
36
Patent #:
Issue Dt:
02/14/2012
Application #:
11691240
Filing Dt:
03/26/2007
Publication #:
Pub Dt:
02/16/2012
Title:
METHODS AND STRUCTURES FOR TESTING SAS-2 SPEED OPTIONS IN SPEED NEGOTIATION WINDOWS
37
Patent #:
Issue Dt:
05/19/2009
Application #:
11693618
Filing Dt:
03/29/2007
Publication #:
Pub Dt:
10/02/2008
Title:
REFERENCE VOLTAGE SHIFTING TECHNIQUE FOR OPTIMIZING SNR PERFORMANCE IN PIPELINE ADCS WITH RESPECT TO INPUT SIGNAL
38
Patent #:
Issue Dt:
01/25/2011
Application #:
11696300
Filing Dt:
04/04/2007
Publication #:
Pub Dt:
10/09/2008
Title:
METHODS, APPARATUS, AND SYSTEMS FOR DETERMINING 1T STATE METRIC DIFFERENCES IN AN NT IMPLEMENTATION OF A VITERBI DECODER
39
Patent #:
Issue Dt:
04/28/2009
Application #:
11696870
Filing Dt:
04/05/2007
Publication #:
Pub Dt:
10/09/2008
Title:
MEMORY DATA INVERSION ARCHITECTURE FOR MINIMIZING POWER CONSUMPTION
40
Patent #:
Issue Dt:
06/16/2009
Application #:
11706943
Filing Dt:
02/13/2007
Publication #:
Pub Dt:
11/29/2007
Title:
SEQUENTIAL TESTER FOR LONGEST PREFIX SEARCH ENGINES
41
Patent #:
Issue Dt:
01/11/2011
Application #:
11709568
Filing Dt:
02/21/2007
Publication #:
Pub Dt:
08/21/2008
Title:
LOW POWER DECISION FEEDBACK EQUALIZATION (DFE) THROUGH APPLYING DFE DATA TO INPUT DATA IN A DATA LATCH
42
Patent #:
Issue Dt:
03/30/2010
Application #:
11712113
Filing Dt:
02/28/2007
Publication #:
Pub Dt:
08/28/2008
Title:
METHOD AND/OR APPARATUS FOR COLOR SPACE REDUCTION FOR TRANSCODING SUBPICTURE ELEMENTS
43
Patent #:
Issue Dt:
08/03/2010
Application #:
11713205
Filing Dt:
03/01/2007
Publication #:
Pub Dt:
07/17/2008
Title:
STORAGE SYSTEM MANAGEMENT BASED ON A BACKUP AND RECOVERY SOLUTION EMBEDDED IN THE STORAGE SYSTEM
44
Patent #:
Issue Dt:
01/11/2011
Application #:
11715680
Filing Dt:
03/07/2007
Publication #:
Pub Dt:
09/11/2008
Title:
ZERO-PENALTY RAID CONTROLLER MEMORY LEAK DETECTION AND ISOLATION METHOD AND SYSTEM UTILIZING SEQUENCE NUMBERS
45
Patent #:
Issue Dt:
01/26/2010
Application #:
11733132
Filing Dt:
04/09/2007
Publication #:
Pub Dt:
10/09/2008
Title:
ENHANCING PERFORMANCE OF SATA DISK DRIVES IN SAS DOMAINS
46
Patent #:
Issue Dt:
02/15/2011
Application #:
11741865
Filing Dt:
04/30/2007
Publication #:
Pub Dt:
10/30/2008
Title:
EFFICIENT HARDWARE IMPLEMENTATION OF TWEAKABLE BLOCK CIPHER
47
Patent #:
Issue Dt:
05/31/2011
Application #:
11754294
Filing Dt:
05/27/2007
Publication #:
Pub Dt:
11/27/2008
Title:
HIGH THROUGHPUT PIPELINED DATA PATH
48
Patent #:
Issue Dt:
01/20/2009
Application #:
11772267
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
INTEGRATED CIRCUIT PACKAGE WITH SPUTTERED HEAT SINK FOR IMPROVED THERMAL PERFORMANCE
49
Patent #:
Issue Dt:
06/10/2008
Application #:
11811519
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
11/01/2007
Title:
INTEGRATED CIRCUIT WITH INDUCTOR HAVING HORIZONTAL MAGNETIC FLUX LINES
50
Patent #:
Issue Dt:
06/14/2011
Application #:
11999211
Filing Dt:
12/04/2007
Publication #:
Pub Dt:
06/05/2008
Title:
FLEXIBLE HARDWARE ARCHITECTURE FOR ECC/HECC BASED CRYTOGRAPHY
51
Patent #:
Issue Dt:
07/13/2010
Application #:
12033029
Filing Dt:
02/19/2008
Publication #:
Pub Dt:
08/20/2009
Title:
ENHANCED RAID LEVEL 3
52
Patent #:
Issue Dt:
01/17/2012
Application #:
12045036
Filing Dt:
03/10/2008
Publication #:
Pub Dt:
09/10/2009
Title:
METHOD AND SYSTEM OF A SHARED BUS ARCHITECTURE
53
Patent #:
Issue Dt:
06/07/2011
Application #:
12117760
Filing Dt:
05/09/2008
Publication #:
Pub Dt:
09/04/2008
Title:
METHOD AND COMPUTER PROGRAM FOR CONFIGURING AN INTEGRATED CIRCUIT DESIGN FOR STATIC TIMING ANALYSIS
54
Patent #:
Issue Dt:
01/08/2013
Application #:
12121363
Filing Dt:
05/15/2008
Publication #:
Pub Dt:
11/19/2009
Title:
FLIPCHIP BUMP PATTERNS FOR EFFICIENT I-MESH POWER DISTRIBUTION SCHEMES
55
Patent #:
Issue Dt:
04/24/2012
Application #:
12139974
Filing Dt:
06/16/2008
Title:
BASIC CELL ARCHITECTURE FOR STRUCTURED APPLICATION-SPECIFIC INTEGRATED CIRCUITS
56
Patent #:
Issue Dt:
02/26/2013
Application #:
12140773
Filing Dt:
06/17/2008
Publication #:
Pub Dt:
12/18/2008
Title:
APPLICATION OF GATE EDGE LINER TO MAINTAIN GATE LENGTH CD IN A REPLACEMENT GATE TRANSISTOR FLOW
57
Patent #:
Issue Dt:
09/20/2011
Application #:
12574426
Filing Dt:
10/06/2009
Title:
METHOD CHARACTERIZING MATERIALS FOR A TRENCH ISOLATION STRUCTURE HAVING LOW TRENCH PARASITIC CAPACITANCE
58
Patent #:
Issue Dt:
06/07/2011
Application #:
12574479
Filing Dt:
10/06/2009
Publication #:
Pub Dt:
01/28/2010
Title:
BI-AXIAL TEXTURING OF HIGH-K DIELECTRIC FILMS TO REDUCE LEAKAGE CURRENTS
Assignor
1
Exec Dt:
04/06/2007
Assignee
1
1320 RIDDER PARK DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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