skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:033102/0270   Pages: 90
Recorded: 06/06/2014
Attorney Dkt #:040981-0072
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 3258
Page 4 of 33
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
Patent #:
Issue Dt:
10/27/1998
Application #:
08645574
Filing Dt:
05/14/1996
Title:
METHOD TO DERIVE EDGE EXTENSIONS FOR WAVELET TRANSFORMS AND INVERSE WAVELET TRANSFORMS
2
Patent #:
Issue Dt:
01/06/1998
Application #:
08645575
Filing Dt:
05/14/1996
Title:
SYSTEM AND METHOD FOR IMPLEMENTING THE FAST WAVELET TRANSFORM
3
Patent #:
Issue Dt:
04/07/1998
Application #:
08645644
Filing Dt:
05/16/1996
Title:
OUTPUT DRIVER WITH LEVEL SHIFTING AND VOLTAGE PROTECTION
4
Patent #:
Issue Dt:
07/07/1998
Application #:
08647344
Filing Dt:
05/09/1996
Title:
SEMICONDUCTOR CHIP PACKAGE WITH INTERCONNECT LAYERS AND ROUTING AND TESTING METHODS
5
Patent #:
Issue Dt:
12/23/1997
Application #:
08648350
Filing Dt:
05/15/1996
Title:
METHOD OF PACKAGING AN INTEGRATED CIRCUIT
6
Patent #:
Issue Dt:
08/20/2002
Application #:
08648849
Filing Dt:
05/16/1996
Title:
DECISION BASED TIME-VARYING EQUALIZERS
7
Patent #:
Issue Dt:
03/25/2003
Application #:
08650248
Filing Dt:
05/22/1996
Title:
CLOCK SKEW INSENSITIVE SCAN CHAIN REORDERING
8
Patent #:
Issue Dt:
07/14/1998
Application #:
08650476
Filing Dt:
05/20/1996
Title:
METHOD OF FORMING POLYSILICON LOGAL INTERCONNECTS
9
Patent #:
Issue Dt:
10/12/1999
Application #:
08651018
Filing Dt:
05/21/1996
Title:
METHOD FOR FABRICATING A LOW TRIGGER VOLTAGE SILICON CONTROLLED RECTIFIER AND THICK FIELD DEVICE
10
Patent #:
Issue Dt:
09/01/1998
Application #:
08652231
Filing Dt:
05/23/1996
Title:
VIDEO ENCODING WITH MULTI-STAGE PROJECTION MOTION ESTIMATION
11
Patent #:
Issue Dt:
02/02/1999
Application #:
08652233
Filing Dt:
05/23/1996
Title:
MICROPROCESSOR HAVING REGISTER DEPENDENT IMMEDIATE FIELD DECOMPRESSION
12
Patent #:
Issue Dt:
11/24/1998
Application #:
08652421
Filing Dt:
05/23/1996
Title:
INTERPROCESSOR COMMUNICATIONS DATA TRANSFER AND ERROR DETECTION IN A MULTIPROCESSING ENVIRONMENT
13
Patent #:
Issue Dt:
09/07/1999
Application #:
08652905
Filing Dt:
05/23/1996
Title:
CATALYTIC ACCELERATION AND ELECTRICAL BIAS CONTROL OF CMP PROCESSING
14
Patent #:
Issue Dt:
07/08/1997
Application #:
08652999
Filing Dt:
05/24/1996
Title:
STROBOSCOPIC PHOTOMETER
15
Patent #:
Issue Dt:
02/02/1999
Application #:
08653321
Filing Dt:
05/24/1996
Title:
CIRCUIT FOR TESTING THE OPERATION OF A SEMICONDUCTOR DEVICE
16
Patent #:
Issue Dt:
11/10/1998
Application #:
08653845
Filing Dt:
05/28/1996
Title:
METHOD AND APPARATUS FOR REDUCING THE MEMORY REQUIRED FOR DECODING BIDIRECTIONALLY PREDICTIVE-CODED FRAMES DURING PULL-DOWN
17
Patent #:
Issue Dt:
07/11/2000
Application #:
08654321
Filing Dt:
05/28/1996
Title:
METHOD AND APPARATUS FOR SEGMENTING MEMORY TO REDUCE THE MEMORY REQUIRED FOR BIDIRECTIONALLY PREDICTIVE-CODED FRAMES
18
Patent #:
Issue Dt:
12/30/1997
Application #:
08655249
Filing Dt:
06/05/1996
Title:
MULTI-LEVEL RESOLUTION LITHOGRAPHY
19
Patent #:
Issue Dt:
02/02/1999
Application #:
08655438
Filing Dt:
05/29/1996
Title:
DOMINO SCAN ARCHITECTURE AND DOMINO SCAN FLIP-FLOP FOR THE TESTING OF DOMINO AND HYBRID CMOS CIRCUITS
20
Patent #:
Issue Dt:
09/30/1997
Application #:
08655599
Filing Dt:
05/30/1996
Title:
APPARATUS TO DECOUPLE CORE CIRCUITS POWER SUPPLY FROM INPUT-OUTPUT CIRCUITS POWER SUPPLY IN A SEMICONDUCTOR DEVICE PACKAGE
21
Patent #:
Issue Dt:
11/25/1997
Application #:
08656033
Filing Dt:
05/31/1996
Title:
WIRE BONDABLE PACKAGE DESIGN WITH MAXIUM ELECTRICAL PERFORMANCE AND MINIMUM NUMBER OF LAYERS
22
Patent #:
Issue Dt:
05/18/1999
Application #:
08659708
Filing Dt:
06/10/1996
Title:
MICROPROCESSOR ADAPTED FOR EXECUTING BOTH A NON-COMPRESSED FIXED LENGTH INSTRUCTION SET AND A COMPRESSED VARIABLE LENGTH INSTRUCTION SET
23
Patent #:
Issue Dt:
08/11/1998
Application #:
08659709
Filing Dt:
06/10/1996
Title:
METHOD AND APPARATUS FOR ALLOWING EXECUTION OF BOTH COMPRESSED INSTRUCTIONS AND DECOMPRESSED INSTRUCTIONS IN A MICROPROCESSOR
24
Patent #:
Issue Dt:
04/07/1998
Application #:
08659860
Filing Dt:
06/07/1996
Title:
METHOD FOR FABRICATING A FIELD EFFECT TRANSISTOR USING MICROTRENCHES TO CONTROL HOT ELECTRON EFFECTS
25
Patent #:
Issue Dt:
08/18/1998
Application #:
08660423
Filing Dt:
06/07/1996
Title:
SYSTEM AND METHOD FOR PERFORMING MOTION ESTIMATION IN THE DCT DOMAIN WITH IMPROVED EFFICIENCY
26
Patent #:
Issue Dt:
04/20/1999
Application #:
08661003
Filing Dt:
06/10/1996
Title:
APPARATUS FOR DETECTING INSTRUCTIONS FROM A VARIABLE-LENGTH COMPRESSED INSTRUCTION SET HAVING EXTENDED AND NON-EXTENDED INSTRUCTIONS
27
Patent #:
Issue Dt:
08/31/1999
Application #:
08661183
Filing Dt:
06/10/1996
Title:
OBJECT-ORIENTED MULTI-MEDIA ARCHITECTURE
28
Patent #:
Issue Dt:
11/25/1997
Application #:
08661186
Filing Dt:
06/10/1996
Title:
GENERIC GATE LEVEL MODEL FOR CHARACTERIZATION OF GLITCH POWER IN LOGIC CELLS
29
Patent #:
Issue Dt:
11/10/1998
Application #:
08661888
Filing Dt:
06/11/1996
Title:
SIMULATION BASED EXTRACTOR OF EXPECTED WAVEFORMS FOR GATE-LEVEL POWER ANAYSIS TOOL
30
Patent #:
Issue Dt:
06/16/1998
Application #:
08661889
Filing Dt:
06/11/1996
Title:
PARAMETRIZED WAVEFORM PROCESSOR FOR GATE-LEVEL POWER ANALYSIS TOOL
31
Patent #:
Issue Dt:
06/15/1999
Application #:
08664135
Filing Dt:
06/14/1996
Title:
MPEG DECODER FRAME MEMORY INTERFACE WHICH IS RECONFIGURABLE FOR DIFFERENT FRAME STORE ARCHITECTURES
32
Patent #:
Issue Dt:
09/14/1999
Application #:
08667150
Filing Dt:
06/20/1996
Title:
HIGH SPEED CLOCK RECOVERY CIRCUIT USING COMPLIMENTARY DIVIDERS
33
Patent #:
Issue Dt:
08/22/2000
Application #:
08667204
Filing Dt:
06/20/1996
Title:
TARGET DEVICE XOR ENGINE
34
Patent #:
Issue Dt:
02/02/1999
Application #:
08668064
Filing Dt:
06/19/1996
Title:
GATE NETLIST TO REGISTER TRANSFER LEVEL CONVERSION TOOL
35
Patent #:
Issue Dt:
07/07/1998
Application #:
08668657
Filing Dt:
06/25/1996
Title:
APPARATUS AND METHOD FOR GENERATING A CURRENT WITH A POSITIVE TEMPERATURE COEFFICIENT
36
Patent #:
Issue Dt:
02/29/2000
Application #:
08671651
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH MEDIAN CONTROL AND INCREASE IN RESOLUTION
37
Patent #:
Issue Dt:
12/01/1998
Application #:
08671656
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH UNIVERSAL AFFINITY DRIVEN DISCRETE PLACEMENT OPTIMIZATION
38
Patent #:
Issue Dt:
07/04/2000
Application #:
08671659
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH SINUSOIDAL OPTIMIZATION
39
Patent #:
Issue Dt:
02/09/1999
Application #:
08671699
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH FAST PROCEDURE FOR FINDING A LEVELIZING CUT POINT
40
Patent #:
Issue Dt:
09/01/1998
Application #:
08671850
Filing Dt:
06/28/1996
Title:
REDUCED SKEW DIFFERENTIAL RECEIVER
41
Patent #:
Issue Dt:
12/07/1999
Application #:
08671862
Filing Dt:
06/28/1996
Title:
META-HARDENED FLIP-FLOP
42
Patent #:
Issue Dt:
01/12/1999
Application #:
08671863
Filing Dt:
06/28/1996
Title:
METHOD AND APPARATUS FOR EFFICIENT MANAGEMENT OF NON-ALGINED I/O WRITE REQUEST IN HIGH BANDWIDTH RAID APPLICATIONS
43
Patent #:
Issue Dt:
11/23/1999
Application #:
08672180
Filing Dt:
06/27/1996
Title:
METHOD AND SYSTEM FOR RECOVERING DIGITAL DATA FROM A TRANSMITTED BALANCED SIGNAL
44
Patent #:
Issue Dt:
09/15/1998
Application #:
08672235
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH CELL PLACEMENT CRYSTALLIZATION
45
Patent #:
Issue Dt:
11/10/1998
Application #:
08672333
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH MINIMIZING MAXIMAL CUT DRIVEN AFFINITY SYSTEM
46
Patent #:
Issue Dt:
06/22/1999
Application #:
08672334
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH COARSE OVERFLOW REMOVER
47
Patent #:
Issue Dt:
04/06/1999
Application #:
08672335
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH ITERATIVE ONE DIMENSIONAL PREPLACEMENT OPTIMIZATION
48
Patent #:
Issue Dt:
10/26/1999
Application #:
08672423
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH OPTIMIZATION OF CELL NEIGHBORHOOD SYSTEM
49
Patent #:
Issue Dt:
02/02/1999
Application #:
08672534
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH DENSITY DRIVEN CAPACITY PENALTY SYSTEM
50
Patent #:
Issue Dt:
02/16/1999
Application #:
08672535
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM
51
Patent #:
Issue Dt:
02/09/1999
Application #:
08672652
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH DISPERSION-DRIVEN LEVELIZING SYSTEM
52
Patent #:
Issue Dt:
11/03/1998
Application #:
08672725
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH WIRE LENGTH DRIVEN AFFINITY SYSTEM
53
Patent #:
Issue Dt:
09/05/2000
Application #:
08672784
Filing Dt:
06/28/1996
Title:
METHOD AND APPARATUS FOR PROVIDING PRECISE CIRCUIT DELAYS
54
Patent #:
Issue Dt:
08/03/1999
Application #:
08672796
Filing Dt:
06/28/1996
Title:
SYSTEM FOR CD-ROM AUDIO PLAYBACK UTILIZING BLOCKING OF DATA WRITING, RESUMING WRITING RESPONSIVE TO DETECTING DATA IN RESPONSE TO DIFFERENCE BETWEEN DESIRED ADDRESS AND PRESENT ADDRESS
55
Patent #:
Issue Dt:
10/05/1999
Application #:
08672936
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH FUNCTIONAL SIEVE OPTIMIZATION TECHNIQUE
56
Patent #:
Issue Dt:
02/15/2000
Application #:
08672937
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH OVERLAP REMOVER WITH MINIMAL NOISE
57
Patent #:
Issue Dt:
11/13/2001
Application #:
08673390
Filing Dt:
06/28/1996
Title:
METHOD AND APPARATUS FOR UTILIZING A DATA PROCESSING SYSTEM FOR MULTI-LEVEL DATA COMMUNICATIONS PROVIDING SELF-CLOCKING
58
Patent #:
Issue Dt:
08/10/1999
Application #:
08673654
Filing Dt:
06/28/1996
Title:
SCALABLE HIERARCHIAL MEMORY STRUCTURE FOR HIGH DATA BANDWIDTH RAID APPLICATIONS
59
Patent #:
Issue Dt:
09/05/2000
Application #:
08673655
Filing Dt:
06/28/1996
Title:
INTEGRATED CIRCUIT DEVICE HAVING A CAPACITOR WITH THE DIELECTRIC PERIPHERAL REGION BEING GREATER THAN THE DIELECTRIC CENTRAL REGION
60
Patent #:
Issue Dt:
03/09/1999
Application #:
08674592
Filing Dt:
06/28/1996
Title:
INTER-BUS BRIDGE CIRCUIT WITH INTEGRATED MEMORY PORT
61
Patent #:
Issue Dt:
07/15/1997
Application #:
08674593
Filing Dt:
06/28/1996
Title:
NON-VOLATILE MEMORY WHICH IS PROGRAMMABLE FROM A POWER SOURCE
62
Patent #:
Issue Dt:
09/22/1998
Application #:
08674605
Filing Dt:
06/28/1996
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM WITH NEIGHBORHOOD SYSTEM DRIVEN OPTIMIZATION
63
Patent #:
Issue Dt:
04/07/1998
Application #:
08676019
Filing Dt:
06/28/1996
Title:
RAPID BATTERY CHARGING CIRCUIT WITH OVERVOLTAGE SHUNT
64
Patent #:
Issue Dt:
05/26/1998
Application #:
08678718
Filing Dt:
07/11/1996
Title:
RAPID THERMAL PROCESSING USING A NARROWBAND INFRARED SOURCE AND FEEDBACK
65
Patent #:
Issue Dt:
09/22/1998
Application #:
08683287
Filing Dt:
07/18/1996
Title:
INTEGRATED CIRCUIT DESIGN DECOMPOSITION
66
Patent #:
Issue Dt:
05/11/1999
Application #:
08683396
Filing Dt:
07/18/1996
Title:
SYSTEM SIMULATION FOR TESTING INTEGRATED CIRCUIT MODELS
67
Patent #:
Issue Dt:
03/17/1998
Application #:
08684022
Filing Dt:
07/19/1996
Title:
METHOD FOR FORMING MINIMUM AREA STRUCTURES FOR SUB-MICRON CMOS ESD PROTECTION IN INTEGRATED CIRCUIT STRUCTURES WITHOUT EXTRA IMPLANT AND MASK STEPS, AND ARTICLES FORMED THEREBY
68
Patent #:
Issue Dt:
08/19/1997
Application #:
08689905
Filing Dt:
08/15/1996
Title:
PHASE-LOCKED LOOP HAVING FILTER LEAKAGE CANCELLATION CIRCUIT
69
Patent #:
Issue Dt:
05/05/1998
Application #:
08689906
Filing Dt:
08/15/1996
Title:
HIGH SPEED METHOD AND APPARATUS FOR DETECTING ASSERTION OF MULTIPLE SIGNALS
70
Patent #:
Issue Dt:
05/09/2000
Application #:
08690577
Filing Dt:
07/31/1996
Title:
PROCESS FOR FORMING RE-ENTRANT GEOMETRY FOR GATE ELECTRODE OF INTEGRATED CIRCUIT STRUCTURE
71
Patent #:
Issue Dt:
03/02/1999
Application #:
08690592
Filing Dt:
07/31/1996
Title:
FORMATION OF GRADIENT DOPED PROFILE REGION BETWEEN CHANNEL REGION AND HEAVILY DOPED SOURCE/DRAIN CONTACT REGION OF MOS DEVICE IN INTEGRATED CIRCUIT STRUCTURE USING A RE-ENTRANT GATE ELECTRODE AND A HIGHER DOSE DRAIN IMPLANTATION
72
Patent #:
Issue Dt:
03/07/2000
Application #:
08691554
Filing Dt:
08/02/1996
Title:
MULTI-FREQUENCY WIRELESS COMMUNICATION DEVICE
73
Patent #:
Issue Dt:
12/21/1999
Application #:
08691745
Filing Dt:
08/02/1996
Title:
MULTI-FREQUENCY MULTI-PROTOCOL WIRELESS COMMUNICATION DEVICE
74
Patent #:
Issue Dt:
02/09/1999
Application #:
08696445
Filing Dt:
08/13/1996
Title:
SUBSONIC TO SUPERSONIC AND ULTRASONIC CONDITIONING OF A POLISHING PAD IN A CHEMICAL MECHANICAL POLISHING APPARATUS
75
Patent #:
Issue Dt:
03/10/1998
Application #:
08698306
Filing Dt:
08/15/1996
Title:
DIFFERENTIAL-TO-CMOS LEVEL CONVERTER HAVING CROSS-OVER VOLTAGE ADJUSTMENT
76
Patent #:
Issue Dt:
10/20/1998
Application #:
08698343
Filing Dt:
08/15/1996
Title:
HIGH SPEED SINGLE ENDED BIT LINE SENSE AMPLIFIER
77
Patent #:
Issue Dt:
02/23/1999
Application #:
08700781
Filing Dt:
08/22/1996
Title:
VIDEO DEVICE WITH REED-SOLOMON ERASURE DECODER AND METHOD THEREOF
78
Patent #:
Issue Dt:
05/18/1999
Application #:
08701476
Filing Dt:
08/22/1996
Title:
FUNCTIONAL OBIC ANALYSIS
79
Patent #:
Issue Dt:
09/22/1998
Application #:
08701632
Filing Dt:
08/22/1996
Title:
DIGITAL RECEIVER USING A CONCATENATED DECODER WITH ERROR AND ERASURE CORRECTION
80
Patent #:
Issue Dt:
01/13/1998
Application #:
08701710
Filing Dt:
08/22/1996
Title:
DIGITAL RECEIVER USING EQUALIZATION AND BLOCK DECODING WITH ERASURE AND ERROR CORRECTION
81
Patent #:
Issue Dt:
02/03/1998
Application #:
08701742
Filing Dt:
08/22/1996
Title:
VCO SUPPLY VOLTAGE REGULATOR
82
Patent #:
Issue Dt:
04/13/1999
Application #:
08702998
Filing Dt:
08/26/1996
Title:
METHOD AND APPARATUS FOR CONTROLLING I/O CHANNELS RESPONSIVE TO AN AVAILABILITY OF A PLURALITY OF I/O DEVICES TO TRANSFER DATA
83
Patent #:
Issue Dt:
06/09/1998
Application #:
08704472
Filing Dt:
08/20/1996
Title:
SELF-ALIGNED TWIN WELL PROCESS
84
Patent #:
Issue Dt:
01/05/1999
Application #:
08707935
Filing Dt:
09/10/1996
Title:
APPARATUS AND METHOD FOR ADDRESS TRANSLATION IN BUS BRIDGE DEVICES
85
Patent #:
Issue Dt:
11/10/1998
Application #:
08708258
Filing Dt:
09/06/1996
Title:
ELECTROSTATIC DISCHARGE (ESD) STRUCTURE AND BUFFER DRIVER STRUCTURE FOR PROVIDING ESD AND LATCHUP PROTECTION FOR INTEGRATED CIRCUIT STRUCTURES IN MINIMIZED I/O SPACE
86
Patent #:
Issue Dt:
12/02/1997
Application #:
08709100
Filing Dt:
09/06/1996
Title:
LOW VOLTAGE CURRENT REFERENCE CIRCUIT WITH ACTIVE FEEDBACK FOR PLL
87
Patent #:
Issue Dt:
11/03/1998
Application #:
08710207
Filing Dt:
09/13/1996
Title:
SHARED MEMORY FABRIC ARCHITECTURE FOR VERY HIGH SPEED ATM SWITCHES
88
Patent #:
Issue Dt:
12/30/1997
Application #:
08710783
Filing Dt:
09/20/1996
Title:
METHOD OF MAKING BURIED METALLIZATION STRUCTURE
89
Patent #:
Issue Dt:
02/16/1999
Application #:
08711502
Filing Dt:
09/10/1996
Title:
METHOD AND APPARATUS FOR PARALLEL HIGH SPEED DATA TRANSFER
90
Patent #:
Issue Dt:
12/08/1998
Application #:
08712128
Filing Dt:
09/11/1996
Title:
ADAPTIVE FILTER FOR VIDEO PROCESSING APPLICATIONS
91
Patent #:
Issue Dt:
09/28/1999
Application #:
08714005
Filing Dt:
09/13/1996
Title:
SCHEDULER DESIGN FOR ATM SWITCHES, AND ITS IMPLEMENTATION IN A DISTRIBUTED SHARED MEMORY ARCHITECTURE
92
Patent #:
Issue Dt:
05/04/1999
Application #:
08717601
Filing Dt:
09/20/1996
Title:
FLUXLESS SOLDER BALL ATTACHMENT PROCESS
93
Patent #:
Issue Dt:
03/24/1998
Application #:
08719266
Filing Dt:
09/24/1996
Title:
ARRAY OF SOLDER PADS ON AN INTEGRATED CIRCUIT
94
Patent #:
Issue Dt:
03/23/1999
Application #:
08719508
Filing Dt:
09/25/1996
Title:
PROTECTION OF PROPRIETARY CIRCUIT DESIGNS DURING GATE LEVEL STATIC TIMING ANALYSIS
95
Patent #:
Issue Dt:
06/12/2001
Application #:
08719773
Filing Dt:
09/25/1996
Title:
HYBRID SURFACE/BURIED-CHANNEL MOSFET
96
Patent #:
Issue Dt:
11/14/2000
Application #:
08719830
Filing Dt:
09/30/1996
Title:
METHOD AND STRUCTURE FOR INDEPENDENT DISK AND HOST TRANSFERS IN A STORAGE SUBSYSTEM TARGET DEVICE
97
Patent #:
Issue Dt:
03/09/1999
Application #:
08720595
Filing Dt:
09/30/1996
Title:
CIRCUIT ISOLATION UTILIZING MEV IMPLANTATION
98
Patent #:
Issue Dt:
08/26/1997
Application #:
08720601
Filing Dt:
09/30/1996
Title:
DRAIN EXCLUDED EPROM CELL
99
Patent #:
Issue Dt:
08/29/2000
Application #:
08723110
Filing Dt:
09/30/1996
Title:
METHOD TO STORE INITIATOR INFORMATION FOR SCSI DATA TRANSFER
100
Patent #:
Issue Dt:
09/21/1999
Application #:
08723140
Filing Dt:
10/01/1996
Title:
MICROELECTRONIC PACKAGE WITH POLYMER ESD PROTECTION
Assignor
1
Exec Dt:
04/06/2007
Assignee
1
1320 RIDDER PARK DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

Search Results as of: 05/24/2024 02:05 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT