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Reel/Frame:018688/0283   Pages: 4
Recorded: 12/28/2006
Attorney Dkt #:RIGHT CHANCE
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 12
1
Patent #:
Issue Dt:
05/26/1998
Application #:
08660522
Filing Dt:
06/07/1996
Title:
METHOD AND APPARATUS FOR RECOVERING A SERIAL DATA STREAM USING A LOCAL CLOCK
2
Patent #:
Issue Dt:
09/08/1998
Application #:
08740811
Filing Dt:
11/01/1996
Title:
HIGH SPEED ASYNCHRONOUS SERIAL TO PARALLEL DATA CONVERTER
3
Patent #:
Issue Dt:
09/22/1998
Application #:
08827744
Filing Dt:
04/10/1997
Title:
HANDSHAKE MINIMIZING SERIAL TO PARALLEL BUS INTERFACE IN A DATA PROCESSING SYSTEM
4
Patent #:
Issue Dt:
06/15/1999
Application #:
08884117
Filing Dt:
06/27/1997
Title:
HIGH SPEED SERIAL DATA TRANSMISSION ENCODER
5
Patent #:
Issue Dt:
10/01/2002
Application #:
09074844
Filing Dt:
05/08/1998
Title:
APPARATUS AND METHOD FOR OPTIMIZED SELF-SYNCHRONIZING SERIALIZER/DESERIALIZER/FRAMER
6
Patent #:
Issue Dt:
10/31/2000
Application #:
09096934
Filing Dt:
06/12/1998
Title:
ASYNCHRONOUS SERIALIZATION/DESERIALIZATION SYSTEM AND METHOD
7
Patent #:
Issue Dt:
09/19/2000
Application #:
09097477
Filing Dt:
06/15/1998
Title:
HANDSHAKE MINIMIZING SERIAL-TO-PARALLEL INTERFACE WITH SHIFT REGISTER COUPLED BY PARALLEL BUS TO ADDRESS LOGIC AND CONTROL LOGIC
8
Patent #:
Issue Dt:
05/17/2005
Application #:
09275496
Filing Dt:
03/24/1999
Title:
HIGH SPEED SERIAL INTERFACE
9
Patent #:
Issue Dt:
04/24/2001
Application #:
09330968
Filing Dt:
06/11/1999
Title:
HIGH SPEED PARALLEL/SERIAL LINK FOR DATA COMMUNICATION
10
Patent #:
Issue Dt:
10/08/2002
Application #:
09429281
Filing Dt:
10/28/1999
Title:
SELECTABLE LOW-VOLTAGE DIFFERENTIAL SIGNAL/CURRENT MODE LOGIC (LVDS/CML) RECEIVER WITH THE OPTION OF AC OR DC COUPLING
11
Patent #:
Issue Dt:
11/16/2004
Application #:
09753054
Filing Dt:
12/28/2000
Publication #:
Pub Dt:
07/04/2002
Title:
SELF-CORRECTING MULTIPHASE CLOCK RECOVERY
12
Patent #:
Issue Dt:
07/05/2005
Application #:
09753055
Filing Dt:
12/28/2000
Publication #:
Pub Dt:
07/04/2002
Title:
MULTIPHASE CLOCK RECOVERY USING D-TYPE PHASE DETECTOR
Assignor
1
Exec Dt:
12/26/2006
Assignee
1
P.O. BOX 3340, ROAD TOWN
TORTOLA, VIRGIN ISLANDS, BRITISH
Correspondence name and address
ANDREW D. FORTNEY
401 W FALLBROOK AVE STE 204
FRESNO, CA 93711

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