Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 036636/0294 | |
| Pages: | 7 |
| | Recorded: | 09/23/2015 | | |
| Attorney Dkt #: | BUR920150090US1 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/11/2017
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Application #:
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14862652
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Filing Dt:
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09/23/2015
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Publication #:
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Pub Dt:
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03/23/2017
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Title:
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INTEGRATED CIRCUIT CHIP DESIGN METHODS AND SYSTEMS USING PROCESS WINDOW-AWARE TIMING ANALYSIS
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Assignee
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| PO BOX 309 |
| UGLAND HOUSE |
| GRAND CAYMAN, CAYMAN ISLANDS KY1-1104 |
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Correspondence name and address
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GIBB & RILEY, LLC
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844 WEST STREET
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SUITE 200
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ANNAPOLIS, MD 21401
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