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Patent #:
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NONE
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Issue Dt:
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Application #:
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12870681
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Filing Dt:
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08/27/2010
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Publication #:
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Pub Dt:
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03/01/2012
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Title:
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Semiconductor Device and Method of Forming Leadframe as Vertical Interconnect Structure Between Stacked Semiconductor Die
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Patent #:
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Issue Dt:
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10/16/2012
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Application #:
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12951399
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Filing Dt:
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11/22/2010
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Publication #:
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Pub Dt:
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05/24/2012
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Title:
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METHOD OF FORMING PARTIALLY-ETCHED CONDUCTIVE LAYER RECESSED WITHIN SUBSTRATE FOR BONDING TO SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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03/21/2017
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Application #:
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12964823
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Filing Dt:
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12/10/2010
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Publication #:
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Pub Dt:
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06/14/2012
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Title:
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Semiconductor Device and Method of Forming Openings Through Insulating Layer Over Encapsulant for Enhanced Adhesion of Interconnect Structure
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Patent #:
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Issue Dt:
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10/18/2016
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Application #:
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13069191
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Filing Dt:
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03/22/2011
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Publication #:
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Pub Dt:
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09/27/2012
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Title:
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Semiconductor Device and Method of Forming Leadframe With Notched Fingers for Stacking Semiconductor Die
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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13098438
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Filing Dt:
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04/30/2011
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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Semiconductor Device and Method of Embedding TSV Semiconductor Die Within Substrate for Vertical Interconnect in POP
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13098443
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Filing Dt:
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04/30/2011
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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13098448
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Filing Dt:
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04/30/2011
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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Semiconductor Device and Method of Forming an Interconnect Structure with Conductive Material Recessed Within Conductive Ring Over Surface of Conductive Pillar
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Patent #:
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Issue Dt:
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04/12/2016
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Application #:
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13106591
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Filing Dt:
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05/12/2011
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Publication #:
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Pub Dt:
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11/15/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING LEADFRAME WITH CONDUCTIVE BODIES FOR VERTICAL ELECTRICAL INTERCONNECT OF SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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10/09/2018
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Application #:
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13107075
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Filing Dt:
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05/13/2011
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Publication #:
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Pub Dt:
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11/15/2012
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Title:
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Semiconductor Device and Method of Forming Dummy Pillars Between Semiconductor Die and Substrate for Maintaining Standoff Distance
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Patent #:
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Issue Dt:
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07/12/2016
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Application #:
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13112172
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Filing Dt:
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05/20/2011
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Publication #:
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Pub Dt:
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11/22/2012
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Title:
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Semiconductor Device and Method of Forming 3D Semiconductor Package with Semiconductor Die Stacked Over Semiconductor Wafer
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Patent #:
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Issue Dt:
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11/17/2015
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Application #:
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13163026
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Filing Dt:
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06/17/2011
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Publication #:
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Pub Dt:
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12/20/2012
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Title:
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Semiconductor Device and Method of Forming RF FEM and RF Transceiver in Semiconductor Package
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Patent #:
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Issue Dt:
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05/07/2013
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Application #:
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13167566
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Filing Dt:
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06/23/2011
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Publication #:
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Pub Dt:
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12/27/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTIVE COATING OVER INTERCONNECT STRUCTURE TO INHIBIT SURFACE OXIDATION
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Patent #:
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Issue Dt:
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12/29/2015
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Application #:
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13184253
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Filing Dt:
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07/15/2011
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Publication #:
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Pub Dt:
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03/29/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING TSV INTERPOSER WITH SEMICONDUCTOR DIE AND BUILD-UP INTERCONNECT STRUCTURE ON OPPOSING SURFACES OF THE INTERPOSER
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Patent #:
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Issue Dt:
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04/26/2016
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Application #:
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13195636
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Filing Dt:
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08/01/2011
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Publication #:
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Pub Dt:
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02/07/2013
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Title:
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Semiconductor Device and Method of Forming POP With Stacked Semiconductor Die and Bumps Formed Directly on the Lower Die
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Patent #:
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Issue Dt:
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11/17/2015
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Application #:
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13208027
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Filing Dt:
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08/11/2011
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Publication #:
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Pub Dt:
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02/14/2013
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Title:
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Semiconductor Device and Method of Forming a Stackable Semiconductor Package with Vertically-Oriented Discrete Electrical Devices as Interconnect Structures
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13218388
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Filing Dt:
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08/25/2011
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Publication #:
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Pub Dt:
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02/28/2013
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Title:
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Semiconductor Device and Method of Forming TIM Within Recesses of MUF Material
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Patent #:
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Issue Dt:
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08/20/2019
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Application #:
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13225683
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Filing Dt:
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09/06/2011
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Publication #:
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Pub Dt:
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03/07/2013
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Title:
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Semiconductor device and method of forming FO-WLCSP with recessed interconnect area in peripheral region of semiconductor die
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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13226767
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Filing Dt:
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09/07/2011
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Publication #:
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Pub Dt:
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03/07/2013
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Title:
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Semiconductor Device and Method of Forming a Low Profile Dual-Purpose Shield and Heat-Dissipation Structure
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Patent #:
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Issue Dt:
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01/05/2016
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Application #:
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13234366
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Filing Dt:
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09/16/2011
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Publication #:
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Pub Dt:
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03/21/2013
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Title:
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Semiconductor Device and Method of Forming Conductive Protrusions Over Conductive Pillars or Bond Pads as Fixed Offset Vertical Interconnect Structure
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Patent #:
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Issue Dt:
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03/01/2016
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Application #:
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13236952
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Filing Dt:
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09/20/2011
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Publication #:
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Pub Dt:
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03/21/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SEMICONDUCTOR PACKAGE USING PANEL FORM CARRIER
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Patent #:
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Issue Dt:
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11/01/2016
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Application #:
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13239080
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Filing Dt:
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09/21/2011
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Publication #:
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Pub Dt:
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03/21/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTION AND SUPPORT STRUCTURE FOR CONDUCTIVE INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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08/26/2014
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Application #:
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13242656
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Filing Dt:
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09/23/2011
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Publication #:
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Pub Dt:
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08/22/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FORMED UNDER-FILL AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/09/2015
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Application #:
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13284003
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Filing Dt:
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10/28/2011
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Publication #:
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Pub Dt:
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03/08/2012
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Title:
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Semiconductor Device and Method of Forming WLP With Semiconductor Die Embedded Within Penetrable Encapsulant Between TSV Interposers
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Patent #:
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Issue Dt:
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06/09/2015
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Application #:
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13287006
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Filing Dt:
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11/01/2011
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Publication #:
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Pub Dt:
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05/02/2013
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Title:
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SEMICONDUCTOR DIE AND METHOD OF FORMING SLOPED SURFACE IN PHOTORESIST LAYER TO ENHANCE FLOW OF UNDERFILL MATERIAL BETWEEN SEMICONDUCTOR DIE AND SUBSTRATE
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Patent #:
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Issue Dt:
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03/08/2016
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Application #:
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13287035
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Filing Dt:
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11/01/2011
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Publication #:
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Pub Dt:
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05/02/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THERMAL INTERFACE MATERIAL AND HEAT SPREADER OVER SEMICONDUCTOR DIE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13289811
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Filing Dt:
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11/04/2011
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Publication #:
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Pub Dt:
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05/09/2013
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Title:
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Semiconductor Device and Method of Forming Sloped Surface in Patterning Layer to Separate Bumps of Semiconductor Die from Patterning Layer
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Patent #:
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Issue Dt:
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02/10/2015
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Application #:
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13303019
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Filing Dt:
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11/22/2011
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Publication #:
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Pub Dt:
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05/23/2013
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Title:
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SEMICONDUCTOR DEVICE WITH CONDUCTIVE LAYER OVER SUBSTRATE WITH VENTS TO CHANNEL BUMP MATERIAL AND REDUCE INTERCONNECT VOIDS
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Patent #:
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Issue Dt:
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02/24/2015
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Application #:
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13312730
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Filing Dt:
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12/06/2011
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Publication #:
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Pub Dt:
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06/06/2013
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Title:
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Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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13314984
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Filing Dt:
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12/08/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING SINGLE LAYER SUBSTRATE WITH ASYMMETRICAL FIBERS AND REDUCED WARPAGE
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13315010
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Filing Dt:
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12/08/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THICK ENCAPSULANT FOR STIFFNESS WITH RECESSES FOR STRESS RELIEF IN FO-WLCSP
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Patent #:
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|
Issue Dt:
|
10/15/2013
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Application #:
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13315033
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Filing Dt:
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12/08/2011
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Publication #:
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Pub Dt:
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06/13/2013
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING GUARD RING AROUND CONDUCTIVE TSV THROUGH SEMICONDUCTOR WAFER
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|
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Patent #:
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Issue Dt:
|
06/03/2014
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Application #:
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13324349
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Filing Dt:
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12/13/2011
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Publication #:
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Pub Dt:
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06/13/2013
| | | | |
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Title:
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Semiconductor Device and Method of Forming Conductive Pillars Having Recesses or Protrusions to Detect Interconnect Continuity Between Semiconductor Die and Substrate
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Patent #:
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|
Issue Dt:
|
06/20/2017
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Application #:
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13324397
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Filing Dt:
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12/13/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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Semiconductor Device and Method of Forming Recesses in Conductive Layer to Detect Continuity for Interconnect Between Semiconductor Die and Substrate
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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13324446
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Filing Dt:
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12/13/2011
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Publication #:
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Pub Dt:
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06/13/2013
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING UBM STRUCTURE ON BACK SURFACE OF TSV SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13326128
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Filing Dt:
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12/14/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE WITH CONDUCTIVE MICRO VIA ARRAY FOR 3-D FO-WLCSP
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Patent #:
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Issue Dt:
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06/03/2014
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Application #:
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13333395
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Filing Dt:
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12/21/2011
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Publication #:
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Pub Dt:
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06/27/2013
| | | | |
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Title:
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Semiconductor Device and Method of Forming Insulating Layer in Notches Around Conductive TSV for Stress Relief
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Patent #:
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Issue Dt:
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01/12/2016
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Application #:
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13334556
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Filing Dt:
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12/22/2011
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Publication #:
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Pub Dt:
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04/19/2012
| | | | |
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Title:
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Semiconductor Die and Method of Forming Noise Absorbing Regions Between THVs in Peripheral Region of the Die
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Patent #:
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|
Issue Dt:
|
11/01/2016
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Application #:
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13336860
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Filing Dt:
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12/23/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING EXTENDED SEMICONDUCTOR DEVICE WITH FAN-OUT INTERCONNECT STRUCTURE TO REDUCE COMPLEXITY OF SUBSTRATE
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Patent #:
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Issue Dt:
|
08/02/2016
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Application #:
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13350692
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Filing Dt:
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01/13/2012
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Publication #:
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Pub Dt:
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05/10/2012
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Title:
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SEMICONDUCTOR DEVICE INCLUDING PRE-FABRICATED SHIELDING FRAME DISPOSED OVER SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
05/24/2016
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Application #:
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13365097
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Filing Dt:
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02/02/2012
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Publication #:
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Pub Dt:
|
05/24/2012
| | | | |
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Title:
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Semiconductor Device and Method of Forming Passive Devices
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|
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Patent #:
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|
Issue Dt:
|
09/03/2013
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Application #:
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13366008
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Filing Dt:
|
02/03/2012
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Publication #:
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Pub Dt:
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05/23/2013
| | | | |
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Title:
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Semiconductor Device and Method of Forming Reconstituted Wafer with Larger Carrier to Achieve More EWLB Packages per Wafer with Encapsulant Deposited Under Temperature and Pressure
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|
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
13408715
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Filing Dt:
|
02/29/2012
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|
Publication #:
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Pub Dt:
|
06/21/2012
| | | | |
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Title:
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Double-Sided Semiconductor Device and Method of Forming Top-Side and Bottom-Side Interconnect Structures
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|
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Patent #:
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Issue Dt:
|
02/04/2014
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Application #:
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13417034
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Filing Dt:
|
03/09/2012
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Publication #:
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Pub Dt:
|
09/12/2013
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING NON-LINEAR INTERCONNECT LAYER WITH EXTENDED LENGTH FOR JOINT RELIABILITY
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|
|
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Patent #:
|
|
Issue Dt:
|
01/26/2016
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Application #:
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13422981
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Filing Dt:
|
03/16/2012
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|
Publication #:
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Pub Dt:
|
09/19/2013
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPLIANT CONDUCTIVE INTERCONNECT STRUCTURE IN FLIPCHIP PACKAGE
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|
|
|
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Patent #:
|
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Issue Dt:
|
08/20/2013
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Application #:
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13423832
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Filing Dt:
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03/19/2012
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
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|
|
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Patent #:
|
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Issue Dt:
|
01/29/2019
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Application #:
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13424484
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Filing Dt:
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03/20/2012
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
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Title:
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Semiconductor Device and Method of Forming Vertical Interconnect Structure in Substrate for IPD and Baseband Circuit Separated by High-Resistivity Molding Compound
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13424710
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Filing Dt:
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03/20/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
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Patent #:
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Issue Dt:
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12/30/2014
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Application #:
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13426576
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Filing Dt:
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03/21/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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Semiconductor Device and Method of Simultaneous Testing of Multiple Interconnects for Electro-Migration
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Patent #:
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Issue Dt:
|
11/03/2015
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Application #:
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13430538
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Filing Dt:
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03/26/2012
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|
Publication #:
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Pub Dt:
|
07/19/2012
| | | | |
|
Title:
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Semiconductor Device and Method of Stacking Die on Leadframe Electrically Connected by Conductive Pillars
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Patent #:
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NONE
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Issue Dt:
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Application #:
|
13430577
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Filing Dt:
|
03/26/2012
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Publication #:
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Pub Dt:
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07/19/2012
| | | | |
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Title:
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Semiconductor Device and Method of Forming Bond Wires and Stud Bumps in Recessed Region of Peripheral Area around the Device for Electrical Interconnection to Other Devices
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Patent #:
|
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Issue Dt:
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01/09/2018
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Application #:
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13438696
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Filing Dt:
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04/03/2012
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Publication #:
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Pub Dt:
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07/26/2012
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Title:
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Semiconductor Device and Method of Forming a Fan-Out Structure with Integrated Passive Device and Discrete Component
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Patent #:
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Issue Dt:
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02/16/2016
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Application #:
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13446863
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Filing Dt:
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04/13/2012
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Publication #:
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Pub Dt:
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08/09/2012
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Title:
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Semiconductor Device Having a Vertical Interconnect Structure Using Stud Bumps
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Patent #:
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Issue Dt:
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11/21/2017
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Application #:
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13468981
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Filing Dt:
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05/10/2012
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Publication #:
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Pub Dt:
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04/18/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE PILLAR HAVING AN EXPANDED BASE
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Patent #:
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Issue Dt:
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12/19/2017
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Application #:
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13476410
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Filing Dt:
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05/21/2012
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Publication #:
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Pub Dt:
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09/06/2012
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Title:
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Semiconductor Device and Method of Forming Vertical Interconnect Structure Between Semiconductor Die and Substrate
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Patent #:
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Issue Dt:
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07/14/2015
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Application #:
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13478008
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Filing Dt:
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05/22/2012
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Publication #:
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Pub Dt:
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03/21/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTION AND SUPPORT STRUCTURE FOR CONDUCTIVE INTERCONNECT STRUCTURE
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Patent #:
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09/26/2017
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13529794
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06/21/2012
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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Solder Joint Flip Chip Interconnection Having Relief Structure
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Patent #:
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NONE
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Application #:
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13536120
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
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10/18/2012
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Title:
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Semiconductor Device and Method of Providing Common Voltage Bus and Wire Bondable Redistribution
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Patent #:
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Issue Dt:
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05/17/2016
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13543088
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Filing Dt:
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07/06/2012
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Publication #:
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Pub Dt:
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10/25/2012
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Title:
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Semiconductor Device and Method of Forming IPD in Fan-Out Wafer Level Chip Scale Package
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13543637
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Filing Dt:
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07/06/2012
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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Semiconductor Device and Method of Forming Wafer Level Multi-Row Etched Lead Package
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Patent #:
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Issue Dt:
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02/07/2017
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Application #:
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13545887
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Filing Dt:
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07/10/2012
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Publication #:
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Pub Dt:
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03/21/2013
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Title:
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Semiconductor Device and Method of Forming Semiconductor Die with Active Region Responsive to External Stimulus
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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13546726
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Filing Dt:
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07/11/2012
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Publication #:
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Pub Dt:
|
11/01/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING WAFER LEVEL DIE INTEGRATION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13553711
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Filing Dt:
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07/19/2012
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Publication #:
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Pub Dt:
|
11/08/2012
| | | | |
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Title:
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Semiconductor Die and Method of Forming through Organic Vias having Varying Width in Peripheral Region of the Die
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13553739
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Filing Dt:
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07/19/2012
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Publication #:
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Pub Dt:
|
11/08/2012
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Title:
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SEMICONDUCTOR DEVICE INCLUDING CONDUCTIVE THROUGH ORGANIC VIAS
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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13566287
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Filing Dt:
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08/03/2012
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Publication #:
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Pub Dt:
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11/22/2012
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING DIE WITH TSV IN CAVITY OF SUBSTRATE FOR ELECTRICAL INTERCONNECT OF FI-POP
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Patent #:
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Issue Dt:
|
03/22/2016
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Application #:
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13569088
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Filing Dt:
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08/07/2012
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Publication #:
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Pub Dt:
|
11/22/2012
| | | | |
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Title:
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Semiconductor Device and Method of Forming Holes in Substrate to Interconnect Top Shield and Ground Shield
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Patent #:
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Issue Dt:
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02/23/2016
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Application #:
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13569105
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Filing Dt:
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08/07/2012
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Publication #:
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Pub Dt:
|
11/22/2012
| | | | |
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Title:
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Semiconductor Device and Method of Forming an IPD over a High-Resistivity Encapsulant Separated from other IPDS and Baseband Circuit
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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13570979
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Filing Dt:
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08/09/2012
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Publication #:
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Pub Dt:
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12/06/2012
| | | | |
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Title:
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Semiconductor Device and Method of Forming WLCSP Structure using Protruded MLP
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Patent #:
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Issue Dt:
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07/14/2015
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Application #:
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13572517
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Filing Dt:
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08/10/2012
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Publication #:
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Pub Dt:
|
11/29/2012
| | | | |
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Title:
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Semicinductor Device with Cross-Talk Isolation Using M-CAP
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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13604539
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Filing Dt:
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09/05/2012
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
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Title:
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Semiconductor Device and Method of Forming a Conductive Via-in-Via Structure
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13609003
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Filing Dt:
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09/10/2012
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Publication #:
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Pub Dt:
|
01/03/2013
| | | | |
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Title:
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Semiconductor Device and Method of Forming a Wafer Level Package Structure Using Conductive Via and Exposed Bump
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13609050
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Filing Dt:
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09/10/2012
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Publication #:
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Pub Dt:
|
01/03/2013
| | | | |
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Title:
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Semiconductor Device and Method of Using Leadframe Bodies to Form Openings Through Encapsulant for Vertical Interconnect of Semiconductor Die
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Patent #:
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Issue Dt:
|
09/22/2015
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Application #:
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13622297
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Filing Dt:
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09/18/2012
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Publication #:
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Pub Dt:
|
01/17/2013
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING BASE SUBSTRATE WITH CAVITIES FORMED THROUGH ETCH-RESISTANT CONDUCTIVE LAYER FOR BUMP LOCKING
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Patent #:
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Issue Dt:
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10/13/2015
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Application #:
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13645397
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Filing Dt:
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10/04/2012
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Publication #:
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Pub Dt:
|
01/31/2013
| | | | |
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Title:
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FLIP CHIP INTERCONNECTION HAVING NARROW INTERCONNECTION SITES ON THE SUBSTRATE
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Patent #:
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Issue Dt:
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12/06/2016
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Application #:
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13682281
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Filing Dt:
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11/20/2012
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Publication #:
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Pub Dt:
|
03/28/2013
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE AND METHOD OF FORMING Z-DIRECTION CONDUCTIVE POSTS EMBEDDED IN STRUCTURALLY PROTECTIVE ENCAPSULANT
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Patent #:
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Issue Dt:
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08/16/2016
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Application #:
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13682510
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Filing Dt:
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11/20/2012
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Publication #:
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Pub Dt:
|
03/28/2013
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Title:
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Semiconductor Device and Method of Forming Insulating Layer on Conductive Traces for Electrical Isolation in Fine Pitch Bonding
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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13683946
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Filing Dt:
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11/21/2012
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Publication #:
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Pub Dt:
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05/02/2013
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE POSTS AND HEAT SINK OVER SEMICONDUCTOR DIE USING LEADFRAME
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Patent #:
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Issue Dt:
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10/04/2016
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Application #:
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13720516
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Filing Dt:
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12/19/2012
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Publication #:
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Pub Dt:
|
07/11/2013
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Title:
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Semiconductor Device and Method of Forming Reduced Surface Roughness in Molded Underfill for Improved C-SAM Inspection
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Patent #:
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Issue Dt:
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09/04/2018
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Application #:
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13726467
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Filing Dt:
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12/24/2012
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Publication #:
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Pub Dt:
|
06/06/2013
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY IN BUILD-UP INTERCONNECT STRUCTURE FOR SHORT SIGNAL PATH BETWEEN DIE
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Patent #:
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Issue Dt:
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06/03/2014
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Application #:
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13727116
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Filing Dt:
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12/26/2012
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Publication #:
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Pub Dt:
|
05/30/2013
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Title:
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SEMICONDUCTOR DEVICE HAVING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON RECESSED AND RAISED BOND FINGERS
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Patent #:
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Issue Dt:
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12/13/2016
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Application #:
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13728012
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Filing Dt:
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12/27/2012
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Publication #:
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Pub Dt:
|
06/06/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR FORMING SEMICONDUCTOR PACKAGE HAVING BUILD-UP INTERCONNECT STRUCTURE OVER SEMICONDUCTOR DIE WITH DIFFERENT CTE INSULATING LAYERS
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Patent #:
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Issue Dt:
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12/30/2014
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Application #:
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13732150
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Filing Dt:
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12/31/2012
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Publication #:
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Pub Dt:
|
05/16/2013
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Title:
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Semiconductor Device and Method of Forming EWLB Package Containing Stacked Semiconductor Die Electrically Connected through Conductive Vias Formed in Encapsulant Around Die
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Patent #:
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Issue Dt:
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05/12/2015
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Application #:
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13760187
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Filing Dt:
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02/06/2013
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADJACENT CHANNEL AND DAM MATERIAL AROUND DIE ATTACH AREA OF SUBSTRATE TO CONTROL OUTWARD FLOW OF UNDERFILL MATERIAL
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Patent #:
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Issue Dt:
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04/22/2014
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Application #:
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13765478
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Filing Dt:
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02/12/2013
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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Method of Forming Top Electrode for Capacitor and Interconnection in Integrated Passive Device (IPD)
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Patent #:
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Issue Dt:
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01/12/2016
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Application #:
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13765594
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Filing Dt:
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02/12/2013
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECT STRUCTURE ON LEADFRAME
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Patent #:
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Issue Dt:
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11/04/2014
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Application #:
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13766493
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Filing Dt:
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02/13/2013
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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10/21/2014
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Application #:
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13766646
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Filing Dt:
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02/13/2013
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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LEADFRAME INTERPOSER OVER SEMICONDUCTOR DIE AND TSV SUBSTRATE FOR VERTICAL ELECTRICAL INTERCONNECT
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13768862
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Filing Dt:
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02/15/2013
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13769302
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Filing Dt:
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02/16/2013
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Publication #:
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Pub Dt:
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08/08/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PRE-MOLDED SUBSTRATE TO REDUCE WARPAGE DURING DIE MOLDING
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Patent #:
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Issue Dt:
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01/30/2018
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Application #:
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13771825
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Filing Dt:
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02/20/2013
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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Thin 3D Fan-Out Embedded Wafer Level Package (EWLB) for Application Processor and Memory Integration
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Patent #:
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Issue Dt:
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06/24/2014
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Application #:
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13782618
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Filing Dt:
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03/01/2013
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Publication #:
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Pub Dt:
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07/11/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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13832333
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Filing Dt:
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03/15/2013
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Publication #:
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Pub Dt:
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08/08/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A VERTICAL INTERCONNECT STRUCTURE FOR 3-D FO-WLCSP
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Patent #:
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Issue Dt:
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07/29/2014
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Application #:
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13845329
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Filing Dt:
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03/18/2013
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Pub Dt:
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08/15/2013
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Title:
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Semiconductor Device and Method of Forming a Shielding Layer Over a Semiconductor Die After Forming a Build-up Interconnect Structure
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Patent #:
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Issue Dt:
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03/07/2017
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Application #:
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13846014
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Filing Dt:
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03/18/2013
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Publication #:
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Pub Dt:
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08/22/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING BASE LEADS FROM BASE SUBSTRATE AS STANDOFF FOR STACKING SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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12/16/2014
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Application #:
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13846742
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Filing Dt:
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03/18/2013
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Publication #:
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Pub Dt:
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09/05/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTIVE COATING OVER INTERCONNECT STRUCTURE TO INHIBIT SURFACE OXIDATION
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Patent #:
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Issue Dt:
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01/24/2017
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Application #:
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13853969
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03/29/2013
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Publication #:
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Pub Dt:
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08/29/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SEMICONDUCTOR DIE WITH ACTIVE REGION RESPONSIVE TO EXTERNAL STIMULUS
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Patent #:
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Issue Dt:
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11/25/2014
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Application #:
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13870928
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Filing Dt:
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04/25/2013
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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Semiconductor Device and Method of Forming Vertically Offset Conductive Pillars Over First Substrate Aligned to Vertically Offset BOT Interconnect Sites Formed Over Second Substrate
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Patent #:
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Issue Dt:
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06/28/2016
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Application #:
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13871157
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Filing Dt:
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04/26/2013
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Pub Dt:
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09/19/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING COVER TO SEMICONDUCTOR DIE AND INTERPOSER WITH ADHESIVE MATERIAL
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Patent #:
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Issue Dt:
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01/23/2018
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Application #:
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13874150
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Filing Dt:
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04/30/2013
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Publication #:
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Pub Dt:
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09/19/2013
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Title:
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Semiconductor Device and Method for Forming Semiconductor Package Having Build-Up Interconnect Structure Over Semiconductor Die with Different CTE Insulating Layers
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Issue Dt:
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09/20/2016
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13886556
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05/03/2013
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Pub Dt:
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09/19/2013
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Title:
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Semiconductor Device and Method of Forming Base Substrate with Recesses for Capturing Bumped Semiconductor Die
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Patent #:
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03/31/2015
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13887180
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05/03/2013
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Pub Dt:
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09/19/2013
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Title:
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Semiconductor Device and Method of Forming Interposer and Opposing Build-Up Interconnect Structure with Connecting Conductive TMV for Electrical Interconnect of FO-WLCSP
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