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Total properties:
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Patent #:
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Issue Dt:
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06/19/1990
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Application #:
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07259830
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Filing Dt:
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10/19/1988
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Issue Dt:
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07/03/1990
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Application #:
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07294271
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Filing Dt:
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01/06/1989
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Title:
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Patent #:
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Issue Dt:
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06/09/1992
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07618992
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Filing Dt:
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11/28/1990
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Title:
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Patent #:
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Issue Dt:
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10/06/1992
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07622227
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12/03/1990
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Title:
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Patent #:
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Issue Dt:
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04/20/1993
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07645981
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Filing Dt:
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01/23/1991
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Patent #:
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Issue Dt:
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09/01/1992
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07702151
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Filing Dt:
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05/14/1991
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Title:
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Patent #:
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Issue Dt:
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01/19/1993
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Application #:
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Filing Dt:
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08/08/1991
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Title:
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Patent #:
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Issue Dt:
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08/23/1994
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07834129
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Filing Dt:
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02/11/1992
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Title:
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Patent #:
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Issue Dt:
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12/15/1998
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07877253
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Filing Dt:
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04/28/1992
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Title:
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Patent #:
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Issue Dt:
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12/02/1997
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07/11/1994
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06/20/2000
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11/13/1995
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02/04/1997
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12/19/1995
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Title:
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06/13/2000
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04/24/1997
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08/22/2000
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04/24/1997
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07/04/2000
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08845563
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04/24/1997
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11/09/1999
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05/27/1997
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12/10/2002
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10/01/1997
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Title:
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01/09/2001
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11/12/1997
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Title:
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07/17/2001
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09047888
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03/25/1998
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09/12/2000
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04/27/1998
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04/23/2002
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08/05/1998
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Title:
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Patent #:
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01/23/2001
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09139252
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08/25/1998
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Title:
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Patent #:
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Issue Dt:
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04/24/2001
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Filing Dt:
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09/28/1998
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Title:
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Patent #:
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Issue Dt:
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12/26/2000
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10/26/1998
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09/05/2000
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11/13/1998
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Title:
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Patent #:
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03/07/2000
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09231101
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01/14/1999
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04/17/2001
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02/08/1999
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07/04/2000
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09256426
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02/23/1999
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Title:
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05/08/2001
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03/09/1999
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05/15/2001
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05/28/1999
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04/02/2002
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07/01/1999
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03/20/2001
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07/31/1999
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05/08/2001
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08/02/1999
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07/11/2000
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09365441
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08/02/1999
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BUS ARRANGEMENTS FOR INTERCONNECTION OF DISCRETE AND/OR INTEGRATED MODULES IN A DIGITAL SYSTEM AND ASSOCIATED METHOD
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10/29/2002
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08/17/1999
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02/04/2003
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09513709
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02/25/2000
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10/08/2002
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09531277
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03/20/2000
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02/17/2004
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06/02/2000
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05/18/2004
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06/02/2000
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11/20/2001
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09592364
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06/12/2000
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10/14/2003
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09593264
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06/13/2000
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05/21/2002
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06/13/2000
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10/30/2001
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07/19/2000
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05/18/2004
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09680679
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10/06/2000
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03/18/2003
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12/18/2001
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04/11/2002
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Title:
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06/17/2003
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11/17/2000
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04/27/2004
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04/18/2001
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10/24/2002
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05/20/2003
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05/07/2001
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11/07/2002
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10/14/2003
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05/24/2001
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08/08/2002
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08/05/2003
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05/30/2001
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12/05/2002
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10/26/2004
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06/04/2001
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04/25/2002
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09/20/2005
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06/06/2001
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02/21/2002
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CROSSPOINT SWITCH WITH SWITCH MATRIX MODULE
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06/07/2005
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06/14/2001
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02/14/2002
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05/18/2004
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06/26/2001
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08/07/2003
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12/16/2003
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06/28/2001
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01/30/2003
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04/08/2003
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09/17/2001
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01/18/2005
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09/18/2001
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03/20/2003
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08/12/2003
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10/09/2001
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08/22/2002
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03/30/2004
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10/11/2001
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06/06/2002
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06/08/2004
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11/14/2001
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05/15/2003
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01/24/2006
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01/07/2002
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07/10/2003
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09/20/2005
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10/24/2001
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04/24/2003
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03/02/2004
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01/14/2002
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05/23/2002
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10/05/2004
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02/12/2002
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06/20/2002
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01/27/2004
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03/12/2002
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07/18/2002
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10/08/2002
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Application #:
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10099668
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Filing Dt:
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03/14/2002
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Publication #:
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Pub Dt:
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08/01/2002
| | | | |
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Title:
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HIGH BANDWIDTH CLOCK BUFFER
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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10119545
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Filing Dt:
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04/10/2002
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Publication #:
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Pub Dt:
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10/16/2003
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Title:
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CLOCK AND DATA RECOVERY WITH A FEEDBACK LOOP TO ADJUST THE SLICE LEVEL OF AN INPUT SAMPLING CIRCUIT
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10145412
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Filing Dt:
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05/12/2002
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Publication #:
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Pub Dt:
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11/13/2003
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Title:
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PRECISE PHASE DETECTOR
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Patent #:
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Issue Dt:
|
08/02/2005
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Application #:
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10150531
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Filing Dt:
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05/17/2002
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Publication #:
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Pub Dt:
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12/12/2002
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Title:
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CONTROL TECHNIQUES AND DEVICES FOR AN OPTICAL SWITCH ARRAY
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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10159648
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Filing Dt:
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05/29/2002
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Title:
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DUAL-MIXER LOSS OF SIGNAL DETECTION CIRCUIT
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Patent #:
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Issue Dt:
|
02/01/2005
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Application #:
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10222341
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Filing Dt:
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08/16/2002
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Publication #:
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Pub Dt:
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09/11/2003
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Title:
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MULTIPLE ELEMENT CONTROLLED OPTICAL COUPLING
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Patent #:
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Issue Dt:
|
02/07/2006
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Application #:
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10266383
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Filing Dt:
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10/07/2002
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Publication #:
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Pub Dt:
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02/13/2003
| | | | |
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Title:
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MULTIPLE CHANNEL ADAPTIVE DATA RECOVERY SYSTEM
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10282398
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Filing Dt:
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10/29/2002
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Publication #:
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Pub Dt:
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04/29/2004
| | | | |
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Title:
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ADJUSTMENT OF A CLOCK DUTY CYCLE
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Patent #:
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Issue Dt:
|
02/14/2006
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Application #:
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10308458
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Filing Dt:
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12/02/2002
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Publication #:
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Pub Dt:
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07/31/2003
| | | | |
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Title:
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APPARATUS AND METHOD FOR INTER-CHIP OR CHIP-TO-SUBSTRATE CONNECTION WITH A SUB-CARRIER
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Patent #:
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Issue Dt:
|
03/29/2005
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Application #:
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10364075
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
|
08/12/2004
| | | | |
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Title:
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SELF-ALIGNED BIPOLAR TRANSISTOR
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|
Patent #:
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Issue Dt:
|
02/21/2006
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Application #:
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10677123
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Filing Dt:
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09/30/2003
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Publication #:
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Pub Dt:
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07/15/2004
| | | | |
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Title:
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METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
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Patent #:
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Issue Dt:
|
08/23/2005
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Application #:
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10721910
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Filing Dt:
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11/24/2003
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Publication #:
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Pub Dt:
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02/17/2005
| | | | |
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Title:
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METHOD OF OVERTONE SELECTION AND LEVEL CONTROL IN AN INTEGRATED CIRCUIT CMOS NEGATIVE RESISTANCE OSCILLATOR TO ACHIEVE LOW JITTER
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10754250
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Filing Dt:
|
01/09/2004
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|
Publication #:
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Pub Dt:
|
07/14/2005
| | | | |
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Title:
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SWITCHING MODE REGULATOR FOR SFP ETHERNET ADAPTOR
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|
