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Reel/Frame:052935/0327   Pages: 27
Recorded: 06/15/2020
Attorney Dkt #:2515.5050
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 100
Page 1 of 2
Pages: 1 2
1
Patent #:
Issue Dt:
06/30/2009
Application #:
11053564
Filing Dt:
02/07/2005
Publication #:
Pub Dt:
08/10/2006
Title:
MULTI-LEADFRAME SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURE
2
Patent #:
Issue Dt:
06/08/2010
Application #:
11162617
Filing Dt:
09/16/2005
Publication #:
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR SYSTEM WITH FINE PITCH LEAD FINGERS
3
Patent #:
Issue Dt:
01/12/2010
Application #:
11163561
Filing Dt:
10/23/2005
Publication #:
Pub Dt:
05/18/2006
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFRAME SUBSTRATE
4
Patent #:
Issue Dt:
11/24/2009
Application #:
11163771
Filing Dt:
10/29/2005
Publication #:
Pub Dt:
05/03/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING HIGH-DENSITY SMALL FOOTPRINT SYSTEM-IN-PACKAGE
5
Patent #:
Issue Dt:
10/06/2009
Application #:
11164453
Filing Dt:
11/22/2005
Publication #:
Pub Dt:
09/07/2006
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DIE AND PACKAGE COMBINATION
6
Patent #:
Issue Dt:
10/06/2009
Application #:
11276681
Filing Dt:
03/09/2006
Publication #:
Pub Dt:
09/13/2007
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH SUBSTRATE HAVING DIFFERENT BONDABLE HEIGHTS AT LEAD FINGER TIPS
7
Patent #:
Issue Dt:
07/27/2010
Application #:
11276945
Filing Dt:
03/17/2006
Publication #:
Pub Dt:
09/20/2007
Title:
SYSTEM FOR REMOVAL OF AN INTEGRATED CIRCUIT FROM A MOUNT MATERIAL
8
Patent #:
Issue Dt:
03/02/2010
Application #:
11277991
Filing Dt:
03/30/2006
Publication #:
Pub Dt:
10/11/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH GROUND RING
9
Patent #:
Issue Dt:
05/04/2010
Application #:
11278418
Filing Dt:
04/01/2006
Publication #:
Pub Dt:
10/11/2007
Title:
MULTICHIP PACKAGE SYSTEM
10
Patent #:
Issue Dt:
07/27/2010
Application #:
11278420
Filing Dt:
04/01/2006
Publication #:
Pub Dt:
10/11/2007
Title:
HYBRID STACKING PACKAGE SYSTEM
11
Patent #:
Issue Dt:
06/15/2010
Application #:
11306854
Filing Dt:
01/12/2006
Publication #:
Pub Dt:
07/12/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING HONEYCOMB MOLDING
12
Patent #:
Issue Dt:
10/06/2009
Application #:
11307247
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
05/17/2007
Title:
STACKABLE POWER SEMICONDUCTOR PACKAGE SYSTEM
13
Patent #:
Issue Dt:
07/07/2009
Application #:
11307285
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
05/17/2007
Title:
THERMALLY ENHANCED POWER SEMICONDUCTOR PACKAGE SYSTEM
14
Patent #:
Issue Dt:
11/10/2009
Application #:
11307313
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
15
Patent #:
Issue Dt:
07/06/2010
Application #:
11307482
Filing Dt:
02/09/2006
Publication #:
Pub Dt:
08/09/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING ZERO FILLET RESIN
16
Patent #:
Issue Dt:
05/11/2010
Application #:
11307614
Filing Dt:
02/14/2006
Publication #:
Pub Dt:
05/17/2007
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH THERMAL DIE BONDING
17
Patent #:
Issue Dt:
06/22/2010
Application #:
11307906
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
08/30/2007
Title:
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
18
Patent #:
Issue Dt:
05/25/2010
Application #:
11326206
Filing Dt:
01/04/2006
Publication #:
Pub Dt:
07/19/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH IMAGE SENSOR SYSTEM
19
Patent #:
Issue Dt:
09/01/2009
Application #:
11381901
Filing Dt:
05/05/2006
Publication #:
Pub Dt:
11/09/2006
Title:
MULTIPLE CHIP PACKAGE MODULE INCLUDING DIE STACKED OVER ENCAPSULATED PACKAGE
20
Patent #:
Issue Dt:
06/29/2010
Application #:
11383407
Filing Dt:
05/15/2006
Publication #:
Pub Dt:
11/16/2006
Title:
OFFSET INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM
21
Patent #:
Issue Dt:
06/09/2009
Application #:
11394363
Filing Dt:
03/30/2006
Publication #:
Pub Dt:
10/12/2006
Title:
MULTIPACKAGE MODULE HAVING STACKED PACKAGES WITH ASYMMETRICALLY ARRANGED DIE AND MOLDING
22
Patent #:
Issue Dt:
09/15/2009
Application #:
11396954
Filing Dt:
04/03/2006
Publication #:
Pub Dt:
10/12/2006
Title:
SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GRID ARRAY PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE
23
Patent #:
Issue Dt:
06/01/2010
Application #:
11419748
Filing Dt:
05/22/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING SHIELD
24
Patent #:
Issue Dt:
06/08/2010
Application #:
11421051
Filing Dt:
05/30/2006
Publication #:
Pub Dt:
12/06/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EDGE CONNECTION SYSTEM
25
Patent #:
Issue Dt:
06/23/2009
Application #:
11424202
Filing Dt:
06/14/2006
Publication #:
Pub Dt:
12/20/2007
Title:
PACKAGE-ON-PACKAGE SYSTEM
26
Patent #:
Issue Dt:
07/07/2009
Application #:
11428272
Filing Dt:
06/30/2006
Publication #:
Pub Dt:
01/03/2008
Title:
METHOD OF FABRICATING AN INTEGRATED CIRCUIT WITH ETCHED RING AND DIE PADDLE
27
Patent #:
Issue Dt:
06/15/2010
Application #:
11435305
Filing Dt:
05/15/2006
Publication #:
Pub Dt:
02/19/2009
Title:
FLIP CHIP INTERCONNECTION
28
Patent #:
Issue Dt:
07/21/2009
Application #:
11456532
Filing Dt:
07/10/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERCONNECT SUPPORT
29
Patent #:
Issue Dt:
06/09/2009
Application #:
11456544
Filing Dt:
07/10/2006
Publication #:
Pub Dt:
01/10/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STIFFENER
30
Patent #:
Issue Dt:
07/20/2010
Application #:
11456846
Filing Dt:
07/11/2006
Publication #:
Pub Dt:
01/17/2008
Title:
INTEGRATED CIRCUIT HEAT SPREADER STACKING METHOD
31
Patent #:
Issue Dt:
06/01/2010
Application #:
11459305
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
01/24/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKED DIE
32
Patent #:
Issue Dt:
03/23/2010
Application #:
11459320
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
04/24/2008
Title:
INTEGRATED CIRCUIT LEADLESS PACKAGE SYSTEM
33
Patent #:
Issue Dt:
02/23/2010
Application #:
11459568
Filing Dt:
07/24/2006
Publication #:
Pub Dt:
01/24/2008
Title:
LEADED STACKED PACKAGES HAVING INTEGRATED UPPER LEAD
34
Patent #:
Issue Dt:
04/27/2010
Application #:
11462303
Filing Dt:
08/03/2006
Publication #:
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
35
Patent #:
Issue Dt:
04/20/2010
Application #:
11462545
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING WAFER LEVEL CHIP SCALE PACKAGING
36
Patent #:
Issue Dt:
01/12/2010
Application #:
11462568
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
02/07/2008
Title:
STACKABLE MULTI-CHIP PACKAGE SYSTEM WITH SUPPORT STRUCTURE
37
Patent #:
Issue Dt:
11/24/2009
Application #:
11462588
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND MANUFACTURING METHOD THEREOF
38
Patent #:
Issue Dt:
03/30/2010
Application #:
11463072
Filing Dt:
08/08/2006
Publication #:
Pub Dt:
02/14/2008
Title:
QUAD FLAT PACKAGE
39
Patent #:
Issue Dt:
11/17/2009
Application #:
11463505
Filing Dt:
08/09/2006
Publication #:
Pub Dt:
02/14/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUPPORTED STACKED DIE
40
Patent #:
Issue Dt:
03/30/2010
Application #:
11463855
Filing Dt:
08/10/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ARCHED PEDESTAL
41
Patent #:
Issue Dt:
02/09/2010
Application #:
11532387
Filing Dt:
09/15/2006
Publication #:
Pub Dt:
03/20/2008
Title:
STACKED DIE SEMICONDUCTOR DEVICE HAVING CIRCUIT TAPE
42
Patent #:
Issue Dt:
09/01/2009
Application #:
11558404
Filing Dt:
11/09/2006
Publication #:
Pub Dt:
05/15/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATION LOCK
43
Patent #:
Issue Dt:
07/20/2010
Application #:
11608123
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
06/12/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING THIN PROFILE TECHNIQUES
44
Patent #:
Issue Dt:
12/22/2009
Application #:
11608829
Filing Dt:
12/09/2006
Publication #:
Pub Dt:
06/12/2008
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
45
Patent #:
Issue Dt:
03/30/2010
Application #:
11617413
Filing Dt:
12/28/2006
Publication #:
Pub Dt:
07/03/2008
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH ADHESIVE SPACING STRUCTURES
46
Patent #:
Issue Dt:
03/23/2010
Application #:
11635941
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
06/12/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING STRUCTURAL SUPPORT
47
Patent #:
Issue Dt:
02/09/2010
Application #:
11640534
Filing Dt:
12/14/2006
Publication #:
Pub Dt:
10/18/2007
Title:
SOLDER JOINT FLIP CHIP INTERCONNECTION HAVING RELIEF STRUCTURE
48
Patent #:
Issue Dt:
07/06/2010
Application #:
11672164
Filing Dt:
02/07/2007
Publication #:
Pub Dt:
08/07/2008
Title:
MULTI-CHIP PACKAGE SYSTEM WITH MULTIPLE SUBSTRATES
49
Patent #:
Issue Dt:
02/09/2010
Application #:
11694933
Filing Dt:
03/30/2007
Publication #:
Pub Dt:
10/02/2008
Title:
INTEGRATED CIRCUIT SYSTEM WITH A DEBRIS TRAPPING SYSTEM
50
Patent #:
Issue Dt:
08/04/2009
Application #:
11744657
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
THROUGH-HOLE VIA ON SAW STREETS
51
Patent #:
Issue Dt:
03/30/2010
Application #:
11744743
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
EXTENDED REDISTRIBUTION LAYERS BUMPED WAFER
52
Patent #:
Issue Dt:
11/10/2009
Application #:
11751440
Filing Dt:
05/21/2007
Publication #:
Pub Dt:
11/27/2008
Title:
STANDOFF HEIGHT IMPROVEMENT FOR BUMPING TECHNOLOGY USING SOLDER RESIST
53
Patent #:
Issue Dt:
05/25/2010
Application #:
11759227
Filing Dt:
06/07/2007
Publication #:
Pub Dt:
12/11/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONTOURED DIE
54
Patent #:
Issue Dt:
11/24/2009
Application #:
11760712
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
10/04/2007
Title:
STACKED SEMICONDUCTOR PACKAGES AND METHOD THEREFOR
55
Patent #:
Issue Dt:
06/01/2010
Application #:
11766710
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
12/25/2008
Title:
GROOVING BUMPED WAFER PRE-UNDERFILL SYSTEM
56
Patent #:
Issue Dt:
07/27/2010
Application #:
11768730
Filing Dt:
06/26/2007
Publication #:
Pub Dt:
01/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH TOP AND BOTTOM TERMINALS
57
Patent #:
Issue Dt:
04/20/2010
Application #:
11833882
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
02/05/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM FOR FINE PITCH SUBSTRATES
58
Patent #:
Issue Dt:
03/09/2010
Application #:
11844354
Filing Dt:
08/24/2007
Publication #:
Pub Dt:
12/13/2007
Title:
STACKED DIE PACKAGE SYSTEM
59
Patent #:
Issue Dt:
02/09/2010
Application #:
11849127
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
03/05/2009
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH CARRIER INTERPOSER
60
Patent #:
Issue Dt:
07/28/2009
Application #:
11850197
Filing Dt:
09/05/2007
Publication #:
Pub Dt:
03/05/2009
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH ANTI-MOLD FLASH FEATURE
61
Patent #:
Issue Dt:
04/20/2010
Application #:
11856879
Filing Dt:
09/18/2007
Publication #:
Pub Dt:
03/27/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR CHIP ON LEAD
62
Patent #:
Issue Dt:
07/20/2010
Application #:
11858588
Filing Dt:
09/20/2007
Publication #:
Pub Dt:
03/26/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DEVICE UNITS
63
Patent #:
Issue Dt:
07/13/2010
Application #:
11858861
Filing Dt:
09/20/2007
Publication #:
Pub Dt:
01/10/2008
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
64
Patent #:
Issue Dt:
03/16/2010
Application #:
11859462
Filing Dt:
09/21/2007
Publication #:
Pub Dt:
03/26/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PASSIVE COMPONENTS
65
Patent #:
Issue Dt:
02/23/2010
Application #:
11865064
Filing Dt:
09/30/2007
Publication #:
Pub Dt:
04/02/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD LOCK SUBASSEMBLY
66
Patent #:
Issue Dt:
01/26/2010
Application #:
11869737
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
02/07/2008
Title:
MICRO CHIP-SCALE-PACKAGE SYSTEM
67
Patent #:
Issue Dt:
11/17/2009
Application #:
11869738
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE STACKING
68
Patent #:
Issue Dt:
08/18/2009
Application #:
11934654
Filing Dt:
11/02/2007
Publication #:
Pub Dt:
05/07/2009
Title:
ELECTROSTATIC DISCHARGE (ESD) PROTECTION STRUCTURE
69
Patent #:
Issue Dt:
01/12/2010
Application #:
11941409
Filing Dt:
11/16/2007
Publication #:
Pub Dt:
05/21/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE SUBSTRATE HAVING CORNER CONTACTS
70
Patent #:
Issue Dt:
04/06/2010
Application #:
11947617
Filing Dt:
11/29/2007
Publication #:
Pub Dt:
06/04/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING PASSIVE CIRCUIT ELEMENTS WITH THROUGH SILICON VIAS TO BACKSIDE INTERCONNECT STRUCTURES
71
Patent #:
Issue Dt:
02/02/2010
Application #:
11953340
Filing Dt:
12/10/2007
Publication #:
Pub Dt:
06/19/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THERMO-MECHANICAL INTERLOCKING SUBSTRATES
72
Patent #:
Issue Dt:
05/04/2010
Application #:
11958838
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
73
Patent #:
Issue Dt:
07/20/2010
Application #:
11964529
Filing Dt:
12/26/2007
Publication #:
Pub Dt:
07/02/2009
Title:
SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR
74
Patent #:
Issue Dt:
05/11/2010
Application #:
11965586
Filing Dt:
12/27/2007
Publication #:
Pub Dt:
07/02/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELDING
75
Patent #:
Issue Dt:
02/02/2010
Application #:
11968626
Filing Dt:
01/02/2008
Publication #:
Pub Dt:
05/29/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PEDESTAL STRUCTURE
76
Patent #:
Issue Dt:
03/23/2010
Application #:
12037084
Filing Dt:
02/25/2008
Publication #:
Pub Dt:
09/04/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH UNDERFILL
77
Patent #:
Issue Dt:
03/30/2010
Application #:
12042312
Filing Dt:
03/04/2008
Publication #:
Pub Dt:
07/17/2008
Title:
METHOD OF FABRICATING A SEMICONDUCTOR MULTI PACKAGE MODULE HAVING AN INVERTED PACKAGE STACKED OVER BALL GRID ARRAY (BGA) PACKAGE
78
Patent #:
Issue Dt:
03/30/2010
Application #:
12045606
Filing Dt:
03/10/2008
Publication #:
Pub Dt:
07/17/2008
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREFOR
79
Patent #:
Issue Dt:
06/08/2010
Application #:
12050428
Filing Dt:
03/18/2008
Publication #:
Pub Dt:
09/24/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ISOLATED LEADS
80
Patent #:
Issue Dt:
07/20/2010
Application #:
12055152
Filing Dt:
03/25/2008
Publication #:
Pub Dt:
10/01/2009
Title:
FLIP CHIP INTERCONNECTION STRUCTURE WITH BUMP ON PARTIAL PAD AND METHOD THEREOF
81
Patent #:
Issue Dt:
06/22/2010
Application #:
12055962
Filing Dt:
03/26/2008
Publication #:
Pub Dt:
10/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING MODULE
82
Patent #:
Issue Dt:
07/06/2010
Application #:
12056418
Filing Dt:
03/27/2008
Publication #:
Pub Dt:
10/01/2009
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
83
Patent #:
Issue Dt:
04/20/2010
Application #:
12062293
Filing Dt:
04/03/2008
Publication #:
Pub Dt:
09/04/2008
Title:
A METHOD OF FORMING A BUMP-ON-LEAD FLIP CHIP INTERCONNECTION HAVING HIGHER ESCAPE ROUTING DENSITY
84
Patent #:
Issue Dt:
03/30/2010
Application #:
12101961
Filing Dt:
04/11/2008
Publication #:
Pub Dt:
10/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH CENTRAL BOND WIRES
85
Patent #:
Issue Dt:
01/12/2010
Application #:
12125770
Filing Dt:
05/22/2008
Publication #:
Pub Dt:
09/11/2008
Title:
METHOD OF FABRICATING MODULE HAVING STACKED CHIP SCALE SEMICONDUCTOR PACKAGES
86
Patent #:
Issue Dt:
02/23/2010
Application #:
12127357
Filing Dt:
05/27/2008
Publication #:
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DOUBLE-SIDED THROUGH VIAS IN SAW STREETS
87
Patent #:
Issue Dt:
06/22/2010
Application #:
12127417
Filing Dt:
05/27/2008
Publication #:
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
88
Patent #:
Issue Dt:
01/19/2010
Application #:
12127472
Filing Dt:
05/27/2008
Publication #:
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING EMBEDDED PASSIVE CIRCUIT ELEMENTS INTERCONNECTED TO THROUGH HOLE VIAS
89
Patent #:
Issue Dt:
03/23/2010
Application #:
12131038
Filing Dt:
05/30/2008
Publication #:
Pub Dt:
12/03/2009
Title:
PACKAGE-ON-PACKAGE SYSTEM WITH HEAT SPREADER
90
Patent #:
Issue Dt:
04/27/2010
Application #:
12133177
Filing Dt:
06/04/2008
Publication #:
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING RECESSED CONDUCTIVE VIAS IN SAW STREETS
91
Patent #:
Issue Dt:
11/17/2009
Application #:
12140092
Filing Dt:
06/16/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING ALONG A PROFILE DISPOSED IN PERIPHERAL REGION AROUND THE DEVICE
92
Patent #:
Issue Dt:
07/06/2010
Application #:
12188210
Filing Dt:
08/08/2008
Publication #:
Pub Dt:
02/11/2010
Title:
TRIPLE TIER PACKAGE ON PACKAGE SYSTEM
93
Patent #:
Issue Dt:
01/26/2010
Application #:
12235521
Filing Dt:
09/22/2008
Publication #:
Pub Dt:
01/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING STACKED DIE
94
Patent #:
Issue Dt:
03/16/2010
Application #:
12236227
Filing Dt:
09/23/2008
Publication #:
Pub Dt:
01/29/2009
Title:
STACKED INTEGRATED CIRCUIT LEADFRAME PACKAGE SYSTEM
95
Patent #:
Issue Dt:
06/08/2010
Application #:
12248878
Filing Dt:
10/09/2008
Publication #:
Pub Dt:
04/15/2010
Title:
MULTI-CHIP PACKAGE SYSTEM INCORPORATING AN INTERNAL STACKING MODULE WITH SUPPORT PROTRUSIONS
96
Patent #:
Issue Dt:
02/23/2010
Application #:
12332077
Filing Dt:
12/10/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PLACING SEMICONDUCTOR DIE ON A TEMPORARY CARRIER USING FIDUCIAL PATTERNS
97
Patent #:
Issue Dt:
06/22/2010
Application #:
12336141
Filing Dt:
12/16/2008
Publication #:
Pub Dt:
04/16/2009
Title:
INTEGRATED CIRCUIT UNDERFILL PACKAGE SYSTEM
98
Patent #:
Issue Dt:
06/15/2010
Application #:
12353489
Filing Dt:
01/14/2009
Publication #:
Pub Dt:
06/25/2009
Title:
OPTICAL DIE-DOWN QUAD FLAT NON-LEADED PACKAGE
99
Patent #:
Issue Dt:
05/18/2010
Application #:
12409491
Filing Dt:
03/24/2009
Publication #:
Pub Dt:
07/16/2009
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM AND METHOD OF MANUFACTURE THEREOF
100
Patent #:
Issue Dt:
04/06/2010
Application #:
12488557
Filing Dt:
06/20/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED DEVICE AND METHOD OF MANUFACTURE THEREOF
Assignor
1
Exec Dt:
05/03/2019
Assignees
1
46429 LANDING PARKWAY
FREMONT, CALIFORNIA 94538
2
5 YISHUN STREET 23
SINGAPORE, SINGAPORE 768442
Correspondence name and address
PATENT LAW GROUP: ATKINS AND ASSOCIATES
123 W. CHANDLER HEIGHTS ROAD, #12535
CHANDLER, AZ 85248

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