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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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08872530
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Filing Dt:
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06/11/1997
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Title:
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SCHEDULING TECHNIQUES FOR DATA CELLS IN A DATA SWITCH
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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08883147
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Filing Dt:
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06/27/1997
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Title:
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METHOD AND APPARATUS FOR DUAL ISSUE OF PROGRAM INSTRUCTIONS TO SYMMETRIC MULTIFUNCTIONAL EXECUTION UNITS
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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08924604
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Filing Dt:
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09/05/1997
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Title:
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A WRITEBACK CACHE CELL WITH A DUAL PORTED DIRTY BIT CELL AND METHOD FOR OPERATING SUCH A CACHE CELL
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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08959056
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Filing Dt:
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10/28/1997
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Title:
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ASYNCHRONOUS TRANSFER MODE SWITCHING ARCHITECTURES HAVING CONNECTION BUFFERS
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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08982822
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Filing Dt:
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12/02/1997
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Title:
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CACHE MEMORY CELL WITH A PRE-PROGRAMMED STATE
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09059614
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Filing Dt:
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04/13/1998
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Title:
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METHOD AND APPARATUS FOR COMMUNICATING SIGNALS BETWEEN CIRCUITS OPERATING AT DIFFERENT FREQUENCIES
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09059615
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Filing Dt:
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04/13/1998
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Title:
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SYSTEM BUS ARBITRATOR FOR FACILITATING MULTIPLE TRANSACTIONS IN A COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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03/06/2001
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Application #:
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09060228
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Filing Dt:
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04/14/1998
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Title:
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ASYNCHRONOUS TRANSFER MODE TRAFFIC SHAPERS
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Patent #:
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Issue Dt:
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02/19/2002
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Application #:
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09062301
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Filing Dt:
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04/17/1998
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Title:
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METHOD AND APPARATUS FOR FORMING A VIRTUAL CIRCUIT
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09126680
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Filing Dt:
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07/30/1998
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Title:
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CIRCUIT, ARCHITECTURE AND METHOD FOR ANALYZING THE OPERATION OF A DIGITAL PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09235148
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Filing Dt:
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01/21/1999
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Title:
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FLOATING-POINT AND INTEGER MULTIPLY-ADD AND MULTIPLY-ACCUMULATE
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09277659
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Filing Dt:
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03/26/1999
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Title:
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APPARATUS AND METHOD FOR OPERATING A DUAL PORT MEMORY CELL
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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09281620
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Filing Dt:
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03/30/1999
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Title:
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PROCESSOR WITH MULTIPLE EXECUTION UNITS AND LOCAL AND GLOBAL REGISTER BYPASSES
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09422045
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Filing Dt:
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10/20/1999
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Title:
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METHOD AND APPARATUS FOR VECTOR REGISTER WITH SCALAR VALUES
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09519524
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Filing Dt:
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03/06/2000
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Publication #:
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Pub Dt:
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12/26/2002
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Title:
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METHOD AND APPARATUS FOR DUAL ISSUE OF PROGRAM INSTRUCTIONS TO SYMMETRIC MULTIFUNCTIONAL EXECUTION UNITS
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09562055
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Filing Dt:
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05/01/2000
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Title:
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Low-voltage CMOS phase-locked loop (PLL) for high-performance microprocessor clock generation
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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09562056
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Filing Dt:
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05/01/2000
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Title:
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FLOATING POINT PIPELINE METHOD AND CIRCUIT FOR FAST INVERSE SQUARE ROOT CALCULATIONS
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09562057
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Filing Dt:
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05/01/2000
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Title:
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Digital programmable delay element
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09562058
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Filing Dt:
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05/01/2000
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Title:
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Reduced line select decoder for a memory array
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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09562061
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Filing Dt:
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05/01/2000
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Title:
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METHOD AND SYSTEM FOR REDUCING TAKEN BRANCH PENALTY
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09562062
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Filing Dt:
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05/01/2000
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Title:
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SCALABLE REPLACEMENT METHOD AND SYSTEM IN A CACHE MEMORY
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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09562071
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Filing Dt:
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05/01/2000
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Title:
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LOW-POWER CACHE SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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03/06/2007
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Application #:
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09564715
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Filing Dt:
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05/03/2000
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Title:
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PIPELINED PROCESSING WITH COMMIT SPECULATION STAGING BUFFER AND LOAD/STORE CENTRIC EXCEPTION HANDLING
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09569543
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Filing Dt:
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05/12/2000
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Title:
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CACHE MEMORY CELL WITH A PRE-PROGRAMMED STATE
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09569818
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Filing Dt:
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05/12/2000
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Title:
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SINGLE PHASE EDGE TRIGGER REGISTER
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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09654717
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Filing Dt:
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09/05/2000
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Title:
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A HIGH PERFORMANCE METHOD AND SYSTEM FOR PROCESSING INFORMANTION ON AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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09654718
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Filing Dt:
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09/05/2000
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Title:
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METHOD FOR COORDINATING INFORMATION FLOW BETWEEN COMPONENTS
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Patent #:
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Issue Dt:
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03/16/2004
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Application #:
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09654759
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Filing Dt:
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09/05/2000
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Title:
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METHOD AND SYSTEM FOR INITIATING COMPUTATION UPOPN UNORDERED RECEIPT OF DATA
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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09753797
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Filing Dt:
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01/02/2001
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Publication #:
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Pub Dt:
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05/24/2001
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Title:
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ASYNCHRONOUS TRANSFER MODE TRAFFIC SHAPERS
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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09780054
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Filing Dt:
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02/09/2001
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Publication #:
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Pub Dt:
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07/26/2001
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Title:
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SCHEDULING TECHNIQUES FOR DATA CELLS IN A DATA SWITCH
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Patent #:
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Issue Dt:
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02/03/2004
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Application #:
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09909316
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Filing Dt:
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07/19/2001
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Title:
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SYSTEM AND METHOD FOR A HIGH SPEED, BI-DIRECTIONAL, ZERO TURNAROUND TIME, PSEUDO DIFFERENTIAL BUS CAPABLE OF SUPPORTING ARBITRARY NUMBER OF DRIVERS AND RECEIVERS
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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09939454
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Filing Dt:
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08/24/2001
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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NETWORK SWITCH WITH A PARALLEL SHARED MEMORY
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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09939464
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Filing Dt:
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08/24/2001
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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PROGRAMMABLE INTEGRATED CIRCUIT FOR USE IN A NETWORK SWITCH
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Patent #:
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Issue Dt:
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05/16/2006
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Application #:
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09940148
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Filing Dt:
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08/24/2001
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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NETWORK SWITCH FOR ROUTING NETWORK TRAFFIC
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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09996865
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11/27/2001
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Title:
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DYNAMIC CIRCUIT USING EXCLUSIVE STATES
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Patent #:
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01/16/2007
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10023623
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12/17/2001
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Pub Dt:
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06/20/2002
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Title:
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ADAPTIVE LINK QUALITY MANAGEMENT FOR WIRELESS MEDIUM
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Patent #:
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NONE
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10023633
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12/17/2001
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06/20/2002
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Title:
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Network node with multi-medium interfaces
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02/05/2008
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10023958
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12/17/2001
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06/20/2002
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Title:
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METHOD OF GENERATING, TRANSMITTING, RECEIVING AND RECOVERING SYNCHRONOUS FRAMES WITH NON-STANDARD SPEEDS
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02/06/2007
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10023963
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12/17/2001
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06/20/2002
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Title:
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HYBRID NETWORK TO CARRY SYNCHRONOUS AND ASYNCHRONOUS TRAFFIC OVER SYMMETRIC AND ASYMMETRIC LINKS
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NONE
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10023972
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12/17/2001
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06/20/2002
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Title:
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Integration of network, data link, and physical layer to adapt network traffic
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02/19/2008
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10023974
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12/17/2001
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06/20/2002
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Title:
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DYNAMIC MIXING TDM DATA WITH DATA PACKETS
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04/17/2007
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10093324
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03/06/2002
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Title:
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INTERFACING 622.08 MHZ LINE INTERFACE TO A 77.76 MHZ SONET FRAMER
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Patent #:
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Issue Dt:
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08/29/2006
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10209079
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07/31/2002
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Title:
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ADVANCED ERROR CORRECTING OPTICAL TRANSPORT NETWORK
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01/16/2007
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10210750
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07/31/2002
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Title:
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ADVANCED MULTI-PROTOCOL OPTICAL TRANSPORT NETWORK
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09/16/2008
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10302015
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11/21/2002
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05/27/2004
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Title:
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ADVANCED TELECOMMUNICATIONS ROUTER AND CROSSBAR SWITCH CONTROLLER
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05/19/2009
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10452229
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06/03/2003
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Title:
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ADVANCED COMMUNICATION APPARATUS AND METHOD FOR VERIFIED COMMUNICATION
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Patent #:
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04/03/2012
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10452563
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Filing Dt:
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05/30/2003
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Title:
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MULTI-PROTOCOL COMMUNICATION CIRCUIT
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Patent #:
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NONE
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Application #:
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10682579
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Filing Dt:
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10/08/2003
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Publication #:
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Pub Dt:
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05/27/2004
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Title:
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Advanced telecommunications processor
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Patent #:
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Issue Dt:
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11/26/2013
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10687784
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Filing Dt:
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10/17/2003
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Publication #:
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Pub Dt:
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04/21/2005
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Title:
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ENCODING-BASED MULTICAST PACKET DUPLICATION CONTROL SUITABLE FOR VLAN SYSTEMS
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02/06/2007
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10687785
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10/17/2003
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Publication #:
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Pub Dt:
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04/21/2005
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Title:
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METHOD AND APPARATUS FOR PROVIDING INTERNAL TABLE EXTENSIBILITY WITH EXTERNAL INTERFACE
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Patent #:
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Issue Dt:
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09/08/2009
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10687786
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10/17/2003
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Pub Dt:
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04/21/2005
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Title:
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METHOD AND APPARATUS FOR PACKET TRANSMIT QUEUE CONTROL
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12/30/2008
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10687789
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10/17/2003
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Publication #:
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Pub Dt:
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04/21/2005
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Title:
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METHOD AND APPARATUS FOR PROVIDING INTERNAL TABLE EXTENSIBILITY BASED ON PRODUCT CONFIGURATION
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11/10/2009
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10703842
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11/07/2003
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Pub Dt:
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05/12/2005
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Title:
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METHOD AND APPARATUS FOR ENHANCED HASHING
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06/19/2007
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10735107
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12/12/2003
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Title:
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METHOD AND APPARATUS FOR IMPLEMENTING A SEARCH ENGINE USING AN SRAM
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08/21/2007
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10739874
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12/17/2003
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TECHNIQUE FOR DEALLOCATION OF MEMORY IN A MULTICASTING ENVIRONMENT
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11/04/2008
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10766695
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01/27/2004
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12/23/2004
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Title:
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METHOD AND DEVICE FOR THE CLASSIFICATION AND REDIRECTION OF DATA PACKETS IN A HETEROGENEOUS NETWORK
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05/01/2007
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10789667
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02/27/2004
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METHOD AND APPARATUS FOR DETERMINING PRECEDENCE IN A CLASSIFICATION ENGINE
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09/16/2008
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10789668
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02/27/2004
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Title:
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METHOD AND APPARATUS FOR CONSTRUCTING A SEARCH KEY
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Issue Dt:
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04/07/2009
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10789791
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02/27/2004
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Title:
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METHOD AND APPARATUS FOR ACTION GROUP GENERATION AND ARBITRATION IN A CLASSIFICATION ENGINE
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Patent #:
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Issue Dt:
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11/03/2009
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Application #:
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10826215
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04/16/2004
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Title:
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STACKED NETWORK SWITCH USING RESILIENT PACKET RING COMMUNICATION PROTOCOL
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Patent #:
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12/02/2008
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Application #:
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10897576
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07/23/2004
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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ADVANCED PROCESSOR SYSTEM USING REQUEST, DATA, SNOOP, AND RESPONSE RINGS
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Patent #:
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12/01/2009
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10897577
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07/23/2004
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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ADVANCED PROCESSOR WITH CACHE COHERENCY
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Issue Dt:
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07/19/2011
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10898007
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07/23/2004
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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ADVANCED PROCESSOR SCHEDULING IN A MULTITHREADED SYSTEM
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02/19/2008
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10898008
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07/23/2004
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
|
ADVANCED PROCESSOR WITH SYSTEM ON A CHIP INTERCONNECT TECHNOLOGY
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Patent #:
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|
Issue Dt:
|
03/18/2008
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Application #:
|
10898150
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Filing Dt:
|
07/23/2004
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
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Title:
|
ADVANCED PROCESSOR TRANSLATION LOOKASIDE BUFFER MANAGEMENT IN A MULTITHREADED SYSTEM
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Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
10930175
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Filing Dt:
|
08/31/2004
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
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Title:
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Advanced processor with a thread aware return address stack optimally used across active threads
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Patent #:
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|
Issue Dt:
|
03/24/2009
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Application #:
|
10930179
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Filing Dt:
|
08/31/2004
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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ADVANCED PROCESSOR WITH USE OF BRIDGES ON A DATA MOVEMENT RING FOR OPTIMAL REDIRECTION OF MEMORY AND I/O TRAFFIC
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Patent #:
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Issue Dt:
|
12/16/2008
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Application #:
|
10930186
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Filing Dt:
|
08/31/2004
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Publication #:
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Pub Dt:
|
04/21/2005
| | | | |
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Title:
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ADVANCED PROCESSOR WITH SCHEME FOR OPTIMAL PACKET FLOW IN A MULTI-PROCESSOR SYSTEM ON A CHIP
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|
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Patent #:
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Issue Dt:
|
12/02/2008
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Application #:
|
10930187
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Filing Dt:
|
08/31/2004
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Publication #:
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Pub Dt:
|
03/16/2006
| | | | |
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Title:
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ADVANCED PROCESSOR WITH IMPLEMENTATION OF MEMORY ORDERING ON A RING BASED DATA MOVEMENT NETWORK
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|
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Patent #:
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|
Issue Dt:
|
04/12/2011
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Application #:
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10930455
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Filing Dt:
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08/31/2004
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Publication #:
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Pub Dt:
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02/24/2005
| | | | |
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Title:
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ADVANCED PROCESSOR WITH MECHANISM FOR FAST PACKET QUEUING OPERATIONS
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Patent #:
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Issue Dt:
|
06/14/2011
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Application #:
|
10930456
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Filing Dt:
|
08/31/2004
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Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
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Title:
|
ADVANCED PROCESSOR WITH MECHANISM FOR ENFORCING ORDERING BETWEEN INFORMATION SENT ON TWO INDEPENDENT NETWORKS
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Patent #:
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|
Issue Dt:
|
07/21/2015
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Application #:
|
10930937
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Filing Dt:
|
08/31/2004
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|
Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
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Title:
|
ADVANCED PROCESSOR WITH INTERFACING MESSAGING NETWORK TO A CPU
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|
|
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Patent #:
|
|
Issue Dt:
|
05/08/2012
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Application #:
|
10930938
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Filing Dt:
|
08/31/2004
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|
Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
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Title:
|
MULTI-CORE MULTI-THREADED PROCESSING SYSTEMS WITH INSTRUCTION REORDERING IN AN IN-ORDER PIPELINE
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Patent #:
|
NONE
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Issue Dt:
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Application #:
|
10930939
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Filing Dt:
|
08/31/2004
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|
Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
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Title:
|
Advanced processor with mechanism for maximizing resource usage in an in-order pipeline with multiple threads
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
10931003
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Filing Dt:
|
08/31/2004
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Publication #:
|
|
Pub Dt:
|
02/10/2005
| | | | |
|
Title:
|
Advanced processor with interrupt delivery mechanism for multi-threaded multi-CPU system on a chip
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Patent #:
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Issue Dt:
|
09/06/2011
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Application #:
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10931014
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Filing Dt:
|
08/31/2004
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|
Publication #:
|
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Pub Dt:
|
02/03/2005
| | | | |
|
Title:
|
ADVANCED PROCESSOR WITH MECHANISM FOR PACKET DISTRIBUTION AT HIGH LINE RATE
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Patent #:
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|
Issue Dt:
|
04/26/2011
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Application #:
|
10968460
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Filing Dt:
|
10/18/2004
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|
Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
|
Title:
|
PREFIX MATCHING STRUCTURE AND METHOD FOR FAST PACKET SWITCHING
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Patent #:
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|
Issue Dt:
|
05/17/2011
|
Application #:
|
11093184
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Filing Dt:
|
03/28/2005
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|
Publication #:
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Pub Dt:
|
09/28/2006
| | | | |
|
Title:
|
MECHANISM FOR MANAGING ACCESS TO RESOURCES IN A HETEROGENEOUS DATA REDIRECTION DEVICE
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Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
11236324
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Filing Dt:
|
09/26/2005
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Publication #:
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Pub Dt:
|
03/29/2007
| | | | |
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Title:
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Scaleable channel scheduler system and method
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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11283154
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Filing Dt:
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11/18/2005
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Publication #:
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Pub Dt:
|
05/25/2006
| | | | |
|
Title:
|
HIGH PERFORMANCE INTEGRATED CIRCUIT WITH LOW SKEW CLOCKING NETWORKS AND IMPROVED LOW POWER OPERATING MODE HAVING REDUCED RECOVERY TIME
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Patent #:
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Issue Dt:
|
03/23/2010
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Application #:
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11336188
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Filing Dt:
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01/20/2006
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Publication #:
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Pub Dt:
|
08/24/2006
| | | | |
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Title:
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SYSTEM AND METHOD FOR PERFORMING CONCATENTATION OF DIVERSELY ROUTED CHANNELS
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Patent #:
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Issue Dt:
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09/14/2010
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Application #:
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11652827
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Filing Dt:
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01/11/2007
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Publication #:
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Pub Dt:
|
07/17/2008
| | | | |
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Title:
|
SYSTEMS AND METHODS FOR UTILIZING AN EXTENDED TRANSLATION LOOK-ASIDE BUFFER HAVING A HYBRID MEMORY STRUCTURE
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Patent #:
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Issue Dt:
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03/24/2009
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Application #:
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11704709
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Filing Dt:
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02/08/2007
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Publication #:
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Pub Dt:
|
08/30/2007
| | | | |
|
Title:
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ADVANCED PROCESSOR TRANSLATION LOOKASIDE BUFFER MANAGEMENT IN A MULTITHREADED SYSTEM
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Patent #:
|
NONE
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Issue Dt:
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|
Application #:
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11710249
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Filing Dt:
|
02/23/2007
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Publication #:
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Pub Dt:
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08/28/2008
| | | | |
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Title:
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Methods and systems for optimizing placement on a clock signal distribution network
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Patent #:
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Issue Dt:
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07/14/2009
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Application #:
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11726940
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Filing Dt:
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03/23/2007
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Publication #:
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Pub Dt:
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07/26/2007
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Title:
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METHOD AND APPARATUS FOR DETERMINING PRECEDENCE IN A CLASSIFICATION ENGINE
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Patent #:
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Issue Dt:
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05/04/2010
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Application #:
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11799293
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Filing Dt:
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04/30/2007
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Publication #:
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Pub Dt:
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10/30/2008
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Title:
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UNIVERSAL BRANCH IDENTIFIER FOR INVALIDATION OF SPECULATIVE INSTRUCTIONS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11801937
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Filing Dt:
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05/10/2007
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Publication #:
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Pub Dt:
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11/13/2008
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Title:
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Method and apparatus for implementing a search engine using an SRAM
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11820350
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Filing Dt:
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06/19/2007
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Publication #:
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Pub Dt:
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12/25/2008
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Title:
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MASKING ENTRIES IN AN AGE MATRIX CONTAINING DISPATCH INDICATORS
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11824501
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Filing Dt:
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06/29/2007
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Publication #:
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Pub Dt:
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01/01/2009
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Title:
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SYSTEM AND METHOD FOR DEFLATE PROCESSING WITHIN A COMPRESSION ENGINE
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Patent #:
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Issue Dt:
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10/09/2012
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Application #:
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11830727
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
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12/25/2008
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Title:
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AGE MATRIX FOR QUEUE DISPATCH ORDER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11831884
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
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11/22/2007
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Title:
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Technique For Deallocation of Memory In A Multicasting Environment
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Patent #:
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Issue Dt:
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10/11/2011
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Application #:
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11831887
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
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03/13/2008
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Title:
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DELEGATING NETWORK PROCESSOR OPERATIONS TO STAR TOPOLOGY SERIAL BUS INTERFACES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11847170
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Filing Dt:
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08/29/2007
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Publication #:
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Pub Dt:
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12/25/2008
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Title:
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AGE MATRIX FOR QUEUE DISPATCH ORDER
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11849166
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Filing Dt:
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08/31/2007
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Publication #:
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Pub Dt:
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03/05/2009
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Title:
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SYSTEM AND METHOD FOR HUFFMAN DECODING WITHIN A COMPRESSION ENGINE
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Patent #:
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Issue Dt:
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11/23/2010
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Application #:
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11852916
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Filing Dt:
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09/10/2007
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Title:
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SYSTEM AND METHOD FOR PERFORMING A REGISTER RENAMING OPERATION UTILIZING HARDWARE WHICH IS CAPABLE OF OPERATING IN AT LEAST TWO MODES UTILIZING REGISTERS OF MULTIPLE WIDTHS
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Patent #:
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Issue Dt:
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12/01/2009
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Application #:
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11961884
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Filing Dt:
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12/20/2007
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Publication #:
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Pub Dt:
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05/29/2008
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Title:
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ADVANCED PROCESSOR MESSAGING APPARATUS INCLUDING FAST MESSAGING RING COMPONENTS CONFIGURED TO ACCOMODATE POINT-TO-POINT TRANSFER OF NON-MEMORY RELATED MESSAGES
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Patent #:
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Issue Dt:
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08/02/2011
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Application #:
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11961910
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Filing Dt:
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12/20/2007
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Publication #:
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Pub Dt:
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09/04/2008
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Title:
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ADVANCED PROCESSOR TRANSLATION LOOKASIDE BUFFER MANAGEMENT IN A MULTITHREADED SYSTEM
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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11967690
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Filing Dt:
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12/31/2007
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Publication #:
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Pub Dt:
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07/02/2009
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Title:
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System, method and device to encode and decode video data having multiple video data formats
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Patent #:
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Issue Dt:
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12/30/2014
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Application #:
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11967697
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Filing Dt:
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12/31/2007
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Publication #:
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Pub Dt:
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07/02/2009
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Title:
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SYSTEM, METHOD AND DEVICE FOR PROCESSING MACROBLOCK VIDEO DATA
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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12014685
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Filing Dt:
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01/15/2008
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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METHOD OF FORMING A DIGITAL OR ANALOG MULTIPLEXING DATA FRAME
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