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Patent #:
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06/28/2005
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Application #:
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10104230
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Filing Dt:
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03/22/2002
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Publication #:
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Pub Dt:
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09/25/2003
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Title:
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LOCKED LOOP WITH DUAL RAIL REGULATION
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Patent #:
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Issue Dt:
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11/14/2006
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Application #:
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10374251
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Filing Dt:
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02/25/2003
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Publication #:
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Pub Dt:
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03/04/2004
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Title:
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PHASE JUMPING LOCKED LOOP CIRCUIT
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Patent #:
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Issue Dt:
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10/04/2005
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Application #:
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10374252
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Filing Dt:
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02/25/2003
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Publication #:
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Pub Dt:
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09/25/2003
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Title:
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SYSTEM WITH DUAL RAIL REGULATED LOCKED LOOP
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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10374390
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Filing Dt:
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02/25/2003
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Publication #:
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Pub Dt:
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10/02/2003
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Title:
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SYSTEM WITH PHASE JUMPING LOCKED LOOP CIRCUIT
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Patent #:
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Issue Dt:
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07/26/2005
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Application #:
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10374615
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Filing Dt:
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02/25/2003
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Publication #:
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Pub Dt:
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03/04/2004
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Title:
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LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
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Patent #:
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Issue Dt:
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07/08/2008
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Application #:
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10662872
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Filing Dt:
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09/16/2003
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Publication #:
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Pub Dt:
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10/14/2004
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Title:
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PARTIAL RESPONSE RECEIVER
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Patent #:
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Issue Dt:
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10/24/2006
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Application #:
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10740087
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Filing Dt:
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12/17/2003
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Publication #:
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Pub Dt:
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06/23/2005
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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Patent #:
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Issue Dt:
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07/15/2008
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Application #:
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10766761
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Filing Dt:
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01/28/2004
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Publication #:
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Pub Dt:
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07/28/2005
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Title:
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PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
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Patent #:
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Issue Dt:
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08/22/2006
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Application #:
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10766765
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Filing Dt:
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01/28/2004
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Publication #:
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Pub Dt:
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07/28/2005
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Title:
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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10851505
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Filing Dt:
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05/21/2004
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Publication #:
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Pub Dt:
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06/23/2005
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS AND REFLECTION CANCELLATION
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10852650
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Filing Dt:
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05/24/2004
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Publication #:
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Pub Dt:
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01/06/2005
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Title:
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SYSTEM WITH PHASE JUMPING LOCKED LOOP CIRCUIT
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Patent #:
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Issue Dt:
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08/15/2006
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Application #:
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10867153
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Filing Dt:
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06/14/2004
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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DATA-LEVEL CLOCK RECOVERY
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Patent #:
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Issue Dt:
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06/19/2007
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Application #:
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10875086
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Filing Dt:
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06/23/2004
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Publication #:
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Pub Dt:
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06/23/2005
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Title:
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OFFSET CANCELLATION IN A MULTI-LEVEL SIGNALING SYSTEM
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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10923421
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Filing Dt:
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08/20/2004
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Publication #:
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Pub Dt:
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03/09/2006
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Title:
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INDIVIDUAL DATA LINE STROBE-OFFSET CONTROL IN MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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10942225
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Filing Dt:
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09/15/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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MEMORY SYSTEMS WITH VARIABLE DELAYS FOR WRITE DATA SIGNALS
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Patent #:
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Issue Dt:
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05/11/2010
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Application #:
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10966070
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Filing Dt:
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10/18/2004
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Publication #:
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Pub Dt:
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05/26/2005
| | | | |
Title:
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PARTIAL RESPONSE RECEIVER
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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10998402
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Filing Dt:
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11/29/2004
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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Micro-threaded memory
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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11022291
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Filing Dt:
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12/24/2004
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Publication #:
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Pub Dt:
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07/21/2005
| | | | |
Title:
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SIGNAL RECEIVER WITH DATA PRECESSING FUNCTION
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Patent #:
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Issue Dt:
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05/11/2010
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Application #:
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11022292
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Filing Dt:
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12/24/2004
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Publication #:
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Pub Dt:
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07/21/2005
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Title:
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SIGNALING SYSTEM WITH SELECTIVELY-INHIBITED ADAPTIVE EQUALIZATION
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Patent #:
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Issue Dt:
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05/16/2006
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Application #:
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11114433
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Filing Dt:
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04/26/2005
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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SYSTEM WITH DUAL RAIL REGULATED LOCKED LOOP
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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11130682
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Filing Dt:
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05/17/2005
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Publication #:
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Pub Dt:
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09/22/2005
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Title:
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LOCKED LOOP WITH DUAL RAIL REGULATION
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Patent #:
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Issue Dt:
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05/19/2009
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Application #:
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11131950
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Filing Dt:
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05/18/2005
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Publication #:
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Pub Dt:
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09/22/2005
| | | | |
Title:
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LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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11386984
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Filing Dt:
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03/21/2006
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Publication #:
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Pub Dt:
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07/20/2006
| | | | |
Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS AND REFLECTION CANCELLATION
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Patent #:
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Issue Dt:
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10/07/2008
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Application #:
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11404502
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Filing Dt:
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04/14/2006
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Publication #:
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Pub Dt:
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10/19/2006
| | | | |
Title:
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PARTIAL RESPONSE RECEIVER WITH CLOCK DATA RECOVERY
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11428818
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Filing Dt:
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07/05/2006
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Pub Dt:
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12/14/2006
| | | | |
Title:
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DATA-LEVEL CLOCK RECOVERY
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Patent #:
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Issue Dt:
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08/19/2008
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11459294
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Filing Dt:
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07/21/2006
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Publication #:
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Pub Dt:
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12/28/2006
| | | | |
Title:
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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Patent #:
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Issue Dt:
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09/09/2008
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Application #:
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11538333
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Filing Dt:
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10/03/2006
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Publication #:
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Pub Dt:
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04/12/2007
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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11621491
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Filing Dt:
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01/09/2007
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Pub Dt:
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05/17/2007
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Title:
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INDIVIDUAL DATA LINE STROBE-OFFSET CONTROL IN MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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01/20/2009
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11746007
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Filing Dt:
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05/08/2007
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Publication #:
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Pub Dt:
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09/06/2007
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Title:
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MEMORY COMPONENT WITH MULTIPLE DELAYED TIMING SIGNALS
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Patent #:
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Issue Dt:
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03/27/2012
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11754102
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05/25/2007
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Publication #:
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Pub Dt:
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12/06/2007
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Title:
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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Patent #:
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Issue Dt:
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07/15/2008
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11754107
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Filing Dt:
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05/25/2007
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Publication #:
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Pub Dt:
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10/04/2007
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Title:
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PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
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Patent #:
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NONE
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11767863
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06/25/2007
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Pub Dt:
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10/25/2007
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Title:
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Multi-Mode Memory
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04/24/2012
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12173530
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07/15/2008
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Pub Dt:
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02/05/2009
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Title:
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PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
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02/02/2010
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12206629
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09/08/2008
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Pub Dt:
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01/01/2009
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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05/25/2010
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12246415
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10/06/2008
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Pub Dt:
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03/05/2009
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Title:
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MEMORY CONTROLLER WITH MULTIPLE DELAYED TIMING SIGNALS
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05/11/2010
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12403340
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03/12/2009
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Pub Dt:
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07/09/2009
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Title:
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PARTIAL RESPONSE RECEIVER
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03/08/2011
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12464631
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05/12/2009
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09/03/2009
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Title:
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LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
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04/27/2010
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12508030
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07/23/2009
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11/19/2009
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Title:
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PARTIAL RESPONSE RECEIVER
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05/22/2012
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12693285
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01/25/2010
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Pub Dt:
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05/13/2010
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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03/13/2012
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12694251
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01/26/2010
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Pub Dt:
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05/13/2010
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Title:
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STROBE-OFFSET CONTROL CIRCUIT
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05/01/2012
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12710615
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02/23/2010
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Pub Dt:
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06/10/2010
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Title:
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PARTIAL RESPONSE RECEIVER
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10/25/2011
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12757035
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04/08/2010
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Pub Dt:
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07/29/2010
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Title:
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MEMORY-WRITE TIMING CALIBRATION INCLUDING GENERATION OF MULTIPLE DELAYED TIMING SIGNALS
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09/25/2012
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12777024
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05/10/2010
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Pub Dt:
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10/21/2010
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Title:
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SIGNALING SYSTEM WITH SELECTIVELY-INHIBITED ADAPTIVE EQUALIZATION
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02/21/2012
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13042276
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03/07/2011
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Pub Dt:
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06/30/2011
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Title:
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LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
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07/10/2012
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13228070
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09/08/2011
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12/29/2011
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Title:
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MEMORY COMPONENT HAVING A WRITE-TIMING CALIBRATION MODE
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11/13/2012
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13276708
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10/19/2011
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Pub Dt:
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02/09/2012
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Title:
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STROBE-OFFSET CONTROL CIRCUIT
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03/25/2014
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13367197
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02/06/2012
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Pub Dt:
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02/14/2013
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Title:
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LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
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04/16/2013
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13409534
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03/01/2012
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06/21/2012
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Title:
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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02/04/2014
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13452543
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04/20/2012
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Pub Dt:
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09/20/2012
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Title:
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PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
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05/05/2015
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13460732
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04/30/2012
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08/23/2012
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Title:
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PARTIAL RESPONSE RECEIVER
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04/23/2013
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13469685
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05/11/2012
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09/06/2012
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EQUALIZING RECEIVER
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10/22/2013
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13476247
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05/21/2012
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11/15/2012
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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01/29/2013
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13544967
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07/09/2012
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11/01/2012
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Title:
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MEMORY CONTROLLER HAVING A WRITE-TIMING CALIBRATION MODE
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04/01/2014
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13656238
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10/19/2012
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02/21/2013
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Title:
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STROBE-OFFSET CONTROL CIRCUIT
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07/23/2013
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13741255
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01/14/2013
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07/11/2013
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Title:
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MEMORY CONTROLLER HAVING A WRITE-TIMING CALIBRATION MODE
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Patent #:
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Issue Dt:
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04/08/2014
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13846413
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03/18/2013
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Pub Dt:
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09/05/2013
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Title:
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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Patent #:
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Issue Dt:
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06/03/2014
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13890801
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05/09/2013
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Publication #:
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Pub Dt:
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10/03/2013
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Title:
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MEMORY MODULE HAVING A WRITE-TIMING CALIBRATION MODE
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Patent #:
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Issue Dt:
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03/22/2016
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13901014
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05/23/2013
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Pub Dt:
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10/10/2013
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Title:
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Micro-Threaded Memory
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04/07/2015
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13913156
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06/07/2013
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Publication #:
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Pub Dt:
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10/17/2013
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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Patent #:
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Issue Dt:
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03/31/2015
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13913242
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06/07/2013
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Pub Dt:
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10/17/2013
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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01/06/2015
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14145966
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01/01/2014
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Pub Dt:
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05/15/2014
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Title:
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PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
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Patent #:
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Issue Dt:
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05/26/2015
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Application #:
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14201778
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Filing Dt:
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03/07/2014
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Publication #:
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Pub Dt:
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07/10/2014
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Title:
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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Patent #:
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Issue Dt:
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08/18/2015
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14230558
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Filing Dt:
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03/31/2014
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Pub Dt:
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08/14/2014
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Title:
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STROBE-OFFSET CONTROL CIRCUIT
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01/05/2016
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14267446
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05/01/2014
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08/28/2014
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Title:
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MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
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05/16/2017
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14449610
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08/01/2014
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11/20/2014
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Title:
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MEMORY CONTROLLER FOR MICRO-THREADED MEMORY OPERATIONS
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10/13/2015
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14535006
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11/06/2014
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Publication #:
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Pub Dt:
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03/05/2015
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Title:
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Periodic Calibration For Communication Channels By Drift Tracking
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Patent #:
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Issue Dt:
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03/15/2016
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14620163
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Filing Dt:
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02/11/2015
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08/06/2015
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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08/02/2016
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14683081
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04/09/2015
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Pub Dt:
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11/05/2015
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Title:
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PARTIAL RESPONSE RECEIVER
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05/30/2017
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14695597
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04/24/2015
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Pub Dt:
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08/13/2015
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Title:
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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Patent #:
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Issue Dt:
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05/30/2017
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14718019
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Filing Dt:
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05/20/2015
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Pub Dt:
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09/10/2015
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Title:
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PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
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Patent #:
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08/21/2018
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14827771
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08/17/2015
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Pub Dt:
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12/10/2015
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Title:
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STROBE-OFFSET CONTROL CIRCUIT
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Patent #:
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04/18/2017
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14932192
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11/04/2015
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Pub Dt:
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02/25/2016
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Title:
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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09/06/2016
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14951190
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11/24/2015
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05/26/2016
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Title:
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MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
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07/11/2017
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15006041
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01/25/2016
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07/28/2016
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Title:
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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03/13/2018
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15092435
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04/06/2016
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10/20/2016
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PARTIAL RESPONSE RECEIVER
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11/28/2017
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15242425
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08/19/2016
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02/09/2017
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MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
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06/25/2019
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15486068
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04/12/2017
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10/05/2017
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06/11/2019
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15490627
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04/18/2017
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11/02/2017
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Periodic Calibration For Communication Channels By Drift Tracking
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05/28/2019
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15498031
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04/26/2017
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11/16/2017
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COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
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09/10/2019
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15616408
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06/07/2017
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11/23/2017
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HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
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06/18/2019
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15805009
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11/06/2017
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06/14/2018
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MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
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03/05/2019
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15907205
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02/27/2018
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10/04/2018
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08/11/2020
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08/21/2018
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02/14/2019
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09/01/2020
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02/27/2019
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08/29/2019
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10/03/2019
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12/31/2019
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04/24/2019
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11/14/2019
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Periodic Calibration For Communication Channels By Drift Tracking
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10/24/2023
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11/07/2019
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05/21/2019
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11/07/2019
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09/08/2020
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03/12/2020
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10/27/2020
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06/18/2020
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08/31/2021
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04/28/2020
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11/05/2020
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08/24/2021
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09/24/2020
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07/28/2020
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02/11/2021
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11/15/2022
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02/18/2021
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03/25/2021
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06/30/2022
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09/01/2022
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