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Reel/Frame:065229/0338   Pages: 13
Recorded: 10/13/2023
Attorney Dkt #:K0379-A00062US01
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 106
Page 1 of 2
Pages: 1 2
1
Patent #:
Issue Dt:
06/28/2005
Application #:
10104230
Filing Dt:
03/22/2002
Publication #:
Pub Dt:
09/25/2003
Title:
LOCKED LOOP WITH DUAL RAIL REGULATION
2
Patent #:
Issue Dt:
11/14/2006
Application #:
10374251
Filing Dt:
02/25/2003
Publication #:
Pub Dt:
03/04/2004
Title:
PHASE JUMPING LOCKED LOOP CIRCUIT
3
Patent #:
Issue Dt:
10/04/2005
Application #:
10374252
Filing Dt:
02/25/2003
Publication #:
Pub Dt:
09/25/2003
Title:
SYSTEM WITH DUAL RAIL REGULATED LOCKED LOOP
4
Patent #:
Issue Dt:
07/06/2004
Application #:
10374390
Filing Dt:
02/25/2003
Publication #:
Pub Dt:
10/02/2003
Title:
SYSTEM WITH PHASE JUMPING LOCKED LOOP CIRCUIT
5
Patent #:
Issue Dt:
07/26/2005
Application #:
10374615
Filing Dt:
02/25/2003
Publication #:
Pub Dt:
03/04/2004
Title:
LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
6
Patent #:
Issue Dt:
07/08/2008
Application #:
10662872
Filing Dt:
09/16/2003
Publication #:
Pub Dt:
10/14/2004
Title:
PARTIAL RESPONSE RECEIVER
7
Patent #:
Issue Dt:
10/24/2006
Application #:
10740087
Filing Dt:
12/17/2003
Publication #:
Pub Dt:
06/23/2005
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
8
Patent #:
Issue Dt:
07/15/2008
Application #:
10766761
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
07/28/2005
Title:
PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
9
Patent #:
Issue Dt:
08/22/2006
Application #:
10766765
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
07/28/2005
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
10
Patent #:
Issue Dt:
04/18/2006
Application #:
10851505
Filing Dt:
05/21/2004
Publication #:
Pub Dt:
06/23/2005
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS AND REFLECTION CANCELLATION
11
Patent #:
Issue Dt:
11/01/2005
Application #:
10852650
Filing Dt:
05/24/2004
Publication #:
Pub Dt:
01/06/2005
Title:
SYSTEM WITH PHASE JUMPING LOCKED LOOP CIRCUIT
12
Patent #:
Issue Dt:
08/15/2006
Application #:
10867153
Filing Dt:
06/14/2004
Publication #:
Pub Dt:
03/17/2005
Title:
DATA-LEVEL CLOCK RECOVERY
13
Patent #:
Issue Dt:
06/19/2007
Application #:
10875086
Filing Dt:
06/23/2004
Publication #:
Pub Dt:
06/23/2005
Title:
OFFSET CANCELLATION IN A MULTI-LEVEL SIGNALING SYSTEM
14
Patent #:
Issue Dt:
01/30/2007
Application #:
10923421
Filing Dt:
08/20/2004
Publication #:
Pub Dt:
03/09/2006
Title:
INDIVIDUAL DATA LINE STROBE-OFFSET CONTROL IN MEMORY SYSTEMS
15
Patent #:
Issue Dt:
11/27/2007
Application #:
10942225
Filing Dt:
09/15/2004
Publication #:
Pub Dt:
03/16/2006
Title:
MEMORY SYSTEMS WITH VARIABLE DELAYS FOR WRITE DATA SIGNALS
16
Patent #:
Issue Dt:
05/11/2010
Application #:
10966070
Filing Dt:
10/18/2004
Publication #:
Pub Dt:
05/26/2005
Title:
PARTIAL RESPONSE RECEIVER
17
Patent #:
Issue Dt:
11/26/2013
Application #:
10998402
Filing Dt:
11/29/2004
Publication #:
Pub Dt:
06/01/2006
Title:
Micro-threaded memory
18
Patent #:
Issue Dt:
02/13/2007
Application #:
11022291
Filing Dt:
12/24/2004
Publication #:
Pub Dt:
07/21/2005
Title:
SIGNAL RECEIVER WITH DATA PRECESSING FUNCTION
19
Patent #:
Issue Dt:
05/11/2010
Application #:
11022292
Filing Dt:
12/24/2004
Publication #:
Pub Dt:
07/21/2005
Title:
SIGNALING SYSTEM WITH SELECTIVELY-INHIBITED ADAPTIVE EQUALIZATION
20
Patent #:
Issue Dt:
05/16/2006
Application #:
11114433
Filing Dt:
04/26/2005
Publication #:
Pub Dt:
09/01/2005
Title:
SYSTEM WITH DUAL RAIL REGULATED LOCKED LOOP
21
Patent #:
Issue Dt:
07/25/2006
Application #:
11130682
Filing Dt:
05/17/2005
Publication #:
Pub Dt:
09/22/2005
Title:
LOCKED LOOP WITH DUAL RAIL REGULATION
22
Patent #:
Issue Dt:
05/19/2009
Application #:
11131950
Filing Dt:
05/18/2005
Publication #:
Pub Dt:
09/22/2005
Title:
LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
23
Patent #:
Issue Dt:
04/03/2007
Application #:
11386984
Filing Dt:
03/21/2006
Publication #:
Pub Dt:
07/20/2006
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS AND REFLECTION CANCELLATION
24
Patent #:
Issue Dt:
10/07/2008
Application #:
11404502
Filing Dt:
04/14/2006
Publication #:
Pub Dt:
10/19/2006
Title:
PARTIAL RESPONSE RECEIVER WITH CLOCK DATA RECOVERY
25
Patent #:
Issue Dt:
08/12/2008
Application #:
11428818
Filing Dt:
07/05/2006
Publication #:
Pub Dt:
12/14/2006
Title:
DATA-LEVEL CLOCK RECOVERY
26
Patent #:
Issue Dt:
08/19/2008
Application #:
11459294
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
12/28/2006
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
27
Patent #:
Issue Dt:
09/09/2008
Application #:
11538333
Filing Dt:
10/03/2006
Publication #:
Pub Dt:
04/12/2007
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
28
Patent #:
Issue Dt:
02/23/2010
Application #:
11621491
Filing Dt:
01/09/2007
Publication #:
Pub Dt:
05/17/2007
Title:
INDIVIDUAL DATA LINE STROBE-OFFSET CONTROL IN MEMORY SYSTEMS
29
Patent #:
Issue Dt:
01/20/2009
Application #:
11746007
Filing Dt:
05/08/2007
Publication #:
Pub Dt:
09/06/2007
Title:
MEMORY COMPONENT WITH MULTIPLE DELAYED TIMING SIGNALS
30
Patent #:
Issue Dt:
03/27/2012
Application #:
11754102
Filing Dt:
05/25/2007
Publication #:
Pub Dt:
12/06/2007
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
31
Patent #:
Issue Dt:
07/15/2008
Application #:
11754107
Filing Dt:
05/25/2007
Publication #:
Pub Dt:
10/04/2007
Title:
PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
32
Patent #:
NONE
Issue Dt:
Application #:
11767863
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
10/25/2007
Title:
Multi-Mode Memory
33
Patent #:
Issue Dt:
04/24/2012
Application #:
12173530
Filing Dt:
07/15/2008
Publication #:
Pub Dt:
02/05/2009
Title:
PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
34
Patent #:
Issue Dt:
02/02/2010
Application #:
12206629
Filing Dt:
09/08/2008
Publication #:
Pub Dt:
01/01/2009
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
35
Patent #:
Issue Dt:
05/25/2010
Application #:
12246415
Filing Dt:
10/06/2008
Publication #:
Pub Dt:
03/05/2009
Title:
MEMORY CONTROLLER WITH MULTIPLE DELAYED TIMING SIGNALS
36
Patent #:
Issue Dt:
05/11/2010
Application #:
12403340
Filing Dt:
03/12/2009
Publication #:
Pub Dt:
07/09/2009
Title:
PARTIAL RESPONSE RECEIVER
37
Patent #:
Issue Dt:
03/08/2011
Application #:
12464631
Filing Dt:
05/12/2009
Publication #:
Pub Dt:
09/03/2009
Title:
LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
38
Patent #:
Issue Dt:
04/27/2010
Application #:
12508030
Filing Dt:
07/23/2009
Publication #:
Pub Dt:
11/19/2009
Title:
PARTIAL RESPONSE RECEIVER
39
Patent #:
Issue Dt:
05/22/2012
Application #:
12693285
Filing Dt:
01/25/2010
Publication #:
Pub Dt:
05/13/2010
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
40
Patent #:
Issue Dt:
03/13/2012
Application #:
12694251
Filing Dt:
01/26/2010
Publication #:
Pub Dt:
05/13/2010
Title:
STROBE-OFFSET CONTROL CIRCUIT
41
Patent #:
Issue Dt:
05/01/2012
Application #:
12710615
Filing Dt:
02/23/2010
Publication #:
Pub Dt:
06/10/2010
Title:
PARTIAL RESPONSE RECEIVER
42
Patent #:
Issue Dt:
10/25/2011
Application #:
12757035
Filing Dt:
04/08/2010
Publication #:
Pub Dt:
07/29/2010
Title:
MEMORY-WRITE TIMING CALIBRATION INCLUDING GENERATION OF MULTIPLE DELAYED TIMING SIGNALS
43
Patent #:
Issue Dt:
09/25/2012
Application #:
12777024
Filing Dt:
05/10/2010
Publication #:
Pub Dt:
10/21/2010
Title:
SIGNALING SYSTEM WITH SELECTIVELY-INHIBITED ADAPTIVE EQUALIZATION
44
Patent #:
Issue Dt:
02/21/2012
Application #:
13042276
Filing Dt:
03/07/2011
Publication #:
Pub Dt:
06/30/2011
Title:
LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
45
Patent #:
Issue Dt:
07/10/2012
Application #:
13228070
Filing Dt:
09/08/2011
Publication #:
Pub Dt:
12/29/2011
Title:
MEMORY COMPONENT HAVING A WRITE-TIMING CALIBRATION MODE
46
Patent #:
Issue Dt:
11/13/2012
Application #:
13276708
Filing Dt:
10/19/2011
Publication #:
Pub Dt:
02/09/2012
Title:
STROBE-OFFSET CONTROL CIRCUIT
47
Patent #:
Issue Dt:
03/25/2014
Application #:
13367197
Filing Dt:
02/06/2012
Publication #:
Pub Dt:
02/14/2013
Title:
LOCKED LOOP CIRCUIT WITH CLOCK HOLD FUNCTION
48
Patent #:
Issue Dt:
04/16/2013
Application #:
13409534
Filing Dt:
03/01/2012
Publication #:
Pub Dt:
06/21/2012
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
49
Patent #:
Issue Dt:
02/04/2014
Application #:
13452543
Filing Dt:
04/20/2012
Publication #:
Pub Dt:
09/20/2012
Title:
PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
50
Patent #:
Issue Dt:
05/05/2015
Application #:
13460732
Filing Dt:
04/30/2012
Publication #:
Pub Dt:
08/23/2012
Title:
PARTIAL RESPONSE RECEIVER
51
Patent #:
Issue Dt:
04/23/2013
Application #:
13469685
Filing Dt:
05/11/2012
Publication #:
Pub Dt:
09/06/2012
Title:
EQUALIZING RECEIVER
52
Patent #:
Issue Dt:
10/22/2013
Application #:
13476247
Filing Dt:
05/21/2012
Publication #:
Pub Dt:
11/15/2012
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
53
Patent #:
Issue Dt:
01/29/2013
Application #:
13544967
Filing Dt:
07/09/2012
Publication #:
Pub Dt:
11/01/2012
Title:
MEMORY CONTROLLER HAVING A WRITE-TIMING CALIBRATION MODE
54
Patent #:
Issue Dt:
04/01/2014
Application #:
13656238
Filing Dt:
10/19/2012
Publication #:
Pub Dt:
02/21/2013
Title:
STROBE-OFFSET CONTROL CIRCUIT
55
Patent #:
Issue Dt:
07/23/2013
Application #:
13741255
Filing Dt:
01/14/2013
Publication #:
Pub Dt:
07/11/2013
Title:
MEMORY CONTROLLER HAVING A WRITE-TIMING CALIBRATION MODE
56
Patent #:
Issue Dt:
04/08/2014
Application #:
13846413
Filing Dt:
03/18/2013
Publication #:
Pub Dt:
09/05/2013
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
57
Patent #:
Issue Dt:
06/03/2014
Application #:
13890801
Filing Dt:
05/09/2013
Publication #:
Pub Dt:
10/03/2013
Title:
MEMORY MODULE HAVING A WRITE-TIMING CALIBRATION MODE
58
Patent #:
Issue Dt:
03/22/2016
Application #:
13901014
Filing Dt:
05/23/2013
Publication #:
Pub Dt:
10/10/2013
Title:
Micro-Threaded Memory
59
Patent #:
Issue Dt:
04/07/2015
Application #:
13913156
Filing Dt:
06/07/2013
Publication #:
Pub Dt:
10/17/2013
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
60
Patent #:
Issue Dt:
03/31/2015
Application #:
13913242
Filing Dt:
06/07/2013
Publication #:
Pub Dt:
10/17/2013
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
61
Patent #:
Issue Dt:
01/06/2015
Application #:
14145966
Filing Dt:
01/01/2014
Publication #:
Pub Dt:
05/15/2014
Title:
PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
62
Patent #:
Issue Dt:
05/26/2015
Application #:
14201778
Filing Dt:
03/07/2014
Publication #:
Pub Dt:
07/10/2014
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
63
Patent #:
Issue Dt:
08/18/2015
Application #:
14230558
Filing Dt:
03/31/2014
Publication #:
Pub Dt:
08/14/2014
Title:
STROBE-OFFSET CONTROL CIRCUIT
64
Patent #:
Issue Dt:
01/05/2016
Application #:
14267446
Filing Dt:
05/01/2014
Publication #:
Pub Dt:
08/28/2014
Title:
MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
65
Patent #:
Issue Dt:
05/16/2017
Application #:
14449610
Filing Dt:
08/01/2014
Publication #:
Pub Dt:
11/20/2014
Title:
MEMORY CONTROLLER FOR MICRO-THREADED MEMORY OPERATIONS
66
Patent #:
Issue Dt:
10/13/2015
Application #:
14535006
Filing Dt:
11/06/2014
Publication #:
Pub Dt:
03/05/2015
Title:
Periodic Calibration For Communication Channels By Drift Tracking
67
Patent #:
Issue Dt:
03/15/2016
Application #:
14620163
Filing Dt:
02/11/2015
Publication #:
Pub Dt:
08/06/2015
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
68
Patent #:
Issue Dt:
08/02/2016
Application #:
14683081
Filing Dt:
04/09/2015
Publication #:
Pub Dt:
11/05/2015
Title:
PARTIAL RESPONSE RECEIVER
69
Patent #:
Issue Dt:
05/30/2017
Application #:
14695597
Filing Dt:
04/24/2015
Publication #:
Pub Dt:
08/13/2015
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
70
Patent #:
Issue Dt:
05/30/2017
Application #:
14718019
Filing Dt:
05/20/2015
Publication #:
Pub Dt:
09/10/2015
Title:
PERIODIC CALIBRATION FOR COMMUNICATION CHANNELS BY DRIFT TRACKING
71
Patent #:
Issue Dt:
08/21/2018
Application #:
14827771
Filing Dt:
08/17/2015
Publication #:
Pub Dt:
12/10/2015
Title:
STROBE-OFFSET CONTROL CIRCUIT
72
Patent #:
Issue Dt:
04/18/2017
Application #:
14932192
Filing Dt:
11/04/2015
Publication #:
Pub Dt:
02/25/2016
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
73
Patent #:
Issue Dt:
09/06/2016
Application #:
14951190
Filing Dt:
11/24/2015
Publication #:
Pub Dt:
05/26/2016
Title:
MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
74
Patent #:
Issue Dt:
07/11/2017
Application #:
15006041
Filing Dt:
01/25/2016
Publication #:
Pub Dt:
07/28/2016
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
75
Patent #:
Issue Dt:
03/13/2018
Application #:
15092435
Filing Dt:
04/06/2016
Publication #:
Pub Dt:
10/20/2016
Title:
PARTIAL RESPONSE RECEIVER
76
Patent #:
Issue Dt:
11/28/2017
Application #:
15242425
Filing Dt:
08/19/2016
Publication #:
Pub Dt:
02/09/2017
Title:
MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
77
Patent #:
Issue Dt:
06/25/2019
Application #:
15486068
Filing Dt:
04/12/2017
Publication #:
Pub Dt:
10/05/2017
Title:
Memory Controller For Micro-Threaded Memory Operations
78
Patent #:
Issue Dt:
06/11/2019
Application #:
15490627
Filing Dt:
04/18/2017
Publication #:
Pub Dt:
11/02/2017
Title:
Periodic Calibration For Communication Channels By Drift Tracking
79
Patent #:
Issue Dt:
05/28/2019
Application #:
15498031
Filing Dt:
04/26/2017
Publication #:
Pub Dt:
11/16/2017
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
80
Patent #:
Issue Dt:
09/10/2019
Application #:
15616408
Filing Dt:
06/07/2017
Publication #:
Pub Dt:
11/23/2017
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
81
Patent #:
Issue Dt:
06/18/2019
Application #:
15805009
Filing Dt:
11/06/2017
Publication #:
Pub Dt:
06/14/2018
Title:
MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
82
Patent #:
Issue Dt:
03/05/2019
Application #:
15907205
Filing Dt:
02/27/2018
Publication #:
Pub Dt:
10/04/2018
Title:
PARTIAL RESPONSE RECEIVER
83
Patent #:
Issue Dt:
08/11/2020
Application #:
16106355
Filing Dt:
08/21/2018
Publication #:
Pub Dt:
02/14/2019
Title:
STROBE-OFFSET CONTROL CIRCUIT
84
Patent #:
Issue Dt:
09/01/2020
Application #:
16287941
Filing Dt:
02/27/2019
Publication #:
Pub Dt:
08/29/2019
Title:
PARTIAL RESPONSE RECEIVER
85
Patent #:
Issue Dt:
06/02/2020
Application #:
16378084
Filing Dt:
04/08/2019
Publication #:
Pub Dt:
10/03/2019
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
86
Patent #:
Issue Dt:
12/31/2019
Application #:
16393817
Filing Dt:
04/24/2019
Publication #:
Pub Dt:
11/14/2019
Title:
Periodic Calibration For Communication Channels By Drift Tracking
87
Patent #:
Issue Dt:
10/24/2023
Application #:
16405479
Filing Dt:
05/07/2019
Publication #:
Pub Dt:
11/07/2019
Title:
Memory Controller For Micro-Threaded Memory Operations
88
Patent #:
Issue Dt:
08/25/2020
Application #:
16418316
Filing Dt:
05/21/2019
Publication #:
Pub Dt:
11/07/2019
Title:
MEMORY COMPONENT THAT ENABLES CALIBRATED COMMAND- AND DATA-TIMING SIGNAL ARRIVAL
89
Patent #:
Issue Dt:
09/08/2020
Application #:
16548708
Filing Dt:
08/22/2019
Publication #:
Pub Dt:
03/12/2020
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
90
Patent #:
Issue Dt:
10/27/2020
Application #:
16692029
Filing Dt:
11/22/2019
Publication #:
Pub Dt:
06/18/2020
Title:
Periodic Calibration For Communication Channels By Drift Tracking
91
Patent #:
Issue Dt:
08/31/2021
Application #:
16861164
Filing Dt:
04/28/2020
Publication #:
Pub Dt:
11/05/2020
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
92
Patent #:
Issue Dt:
08/24/2021
Application #:
16897157
Filing Dt:
06/09/2020
Publication #:
Pub Dt:
09/24/2020
Title:
MEMORY CONTROLLER WITH CLOCK-TO-STROBE SKEW COMPENSATION
93
Patent #:
Issue Dt:
01/10/2023
Application #:
16940858
Filing Dt:
07/28/2020
Publication #:
Pub Dt:
02/11/2021
Title:
STROBE-OFFSET CONTROL CIRCUIT
94
Patent #:
Issue Dt:
11/15/2022
Application #:
16999853
Filing Dt:
08/21/2020
Publication #:
Pub Dt:
03/11/2021
Title:
PARTIAL RESPONSE RECEIVER
95
Patent #:
Issue Dt:
01/25/2022
Application #:
17000191
Filing Dt:
08/21/2020
Publication #:
Pub Dt:
02/18/2021
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
96
Patent #:
Issue Dt:
02/22/2022
Application #:
17024835
Filing Dt:
09/18/2020
Publication #:
Pub Dt:
03/25/2021
Title:
Periodic Calibration For Communication Channels By Drift Tracking
97
Patent #:
Issue Dt:
01/10/2023
Application #:
17386111
Filing Dt:
07/27/2021
Publication #:
Pub Dt:
02/17/2022
Title:
COMMUNICATION CHANNEL CALIBRATION FOR DRIFT CONDITIONS
98
Patent #:
Issue Dt:
05/30/2023
Application #:
17391521
Filing Dt:
08/02/2021
Publication #:
Pub Dt:
03/31/2022
Title:
MEMORY SYSTEM COMPONENT THAT ENABLES CLOCK-TO-STROBE SKEW COMPENSATION
99
Patent #:
Issue Dt:
07/18/2023
Application #:
17573471
Filing Dt:
01/11/2022
Publication #:
Pub Dt:
06/30/2022
Title:
HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS
100
Patent #:
Issue Dt:
05/30/2023
Application #:
17575255
Filing Dt:
01/13/2022
Publication #:
Pub Dt:
09/01/2022
Title:
Periodic Calibration For Communication Channels By Drift Tracking
Assignor
1
Exec Dt:
09/28/2023
Assignee
1
4921 SW 11TH AVE
CAPE CORAL, FLORIDA 33914
Correspondence name and address
IAN D. MACKINNON
333 S. 7TH STREET
SUITE 2700
MINNEAPOLIS, MN 55402-2438

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