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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038378/0360   Pages: 8
Recorded: 04/07/2016
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 78
1
Patent #:
Issue Dt:
01/02/2001
Application #:
09104031
Filing Dt:
06/24/1998
Title:
METHOD OF FORMING EXTENDED LEAD PACKAGE
2
Patent #:
Issue Dt:
08/15/2000
Application #:
09161408
Filing Dt:
09/28/1998
Title:
MOLDED TAPE SUPPORT FOR A MOLDED CIRCUIT PACKAGE PRIOR TO DICING
3
Patent #:
Issue Dt:
08/07/2001
Application #:
09174620
Filing Dt:
10/19/1998
Title:
UNIVERSAL DOCKING SYSTEM
4
Patent #:
Issue Dt:
10/09/2001
Application #:
09182762
Filing Dt:
10/30/1998
Title:
RELIABLE METHOD AND APPARATUS FOR INTERFACING BETWEEN A BALL GRID ARRAY HANDLER AND A BALL GRID ARRAY TESTING SYSTEM
5
Patent #:
Issue Dt:
03/12/2002
Application #:
09249251
Filing Dt:
02/12/1999
Title:
METHOD OF MOLDING FLEXIBLE CIRCUIT WITH MOLDED STIFFENER
6
Patent #:
Issue Dt:
06/11/2002
Application #:
09252629
Filing Dt:
02/18/1999
Title:
TESTING OF BGA AND OTHER CSP PACKAGES USING PROBING TECHNIQUES
7
Patent #:
Issue Dt:
01/23/2001
Application #:
09307838
Filing Dt:
05/10/1999
Title:
VELCRO STRAPPING FOR SEMICONDUCTOR CARRYING TRAYS
8
Patent #:
Issue Dt:
02/06/2001
Application #:
09320752
Filing Dt:
05/27/1999
Title:
CONTACTOR SLEEVE ASSEMBLY FOR A PICK AND PLACE SEMICONDUCTOR DEVICE HANDLER
9
Patent #:
Issue Dt:
07/03/2001
Application #:
09366752
Filing Dt:
08/04/1999
Title:
FLIP CHIP THERMALLY ENHANCED BALL GRID ARRAY
10
Patent #:
Issue Dt:
07/16/2002
Application #:
09395923
Filing Dt:
09/14/1999
Title:
LEADFRAME BASED CHIP SCALE PACKAGE AND METHOD OF PRODUCING THE SAME
11
Patent #:
Issue Dt:
06/05/2001
Application #:
09412631
Filing Dt:
10/04/1999
Title:
DEVICE PROBE SOCKET FORMING PART OF A TEST HEAD, INTERFACING BETWEEN TEST HEAD AND A PROBE HANDLER, USED FOR DEVICE STRIP TESTING
12
Patent #:
Issue Dt:
11/20/2001
Application #:
09467119
Filing Dt:
12/20/1999
Title:
ZIG-ZAGGED PLATING BUS LINES
13
Patent #:
Issue Dt:
04/08/2003
Application #:
09614011
Filing Dt:
07/11/2000
Title:
COPLANARITY INSPECTION AT THE SINGULATION PROCESS
14
Patent #:
Issue Dt:
10/22/2002
Application #:
09635582
Filing Dt:
08/09/2000
Title:
PBGA SINGULATED SUBSTRATE FOR MODEL MELAMINE CLEANING
15
Patent #:
Issue Dt:
09/04/2001
Application #:
09638749
Filing Dt:
08/14/2000
Title:
Boat and assembly method for ball grid array packages
16
Patent #:
Issue Dt:
06/11/2002
Application #:
09639679
Filing Dt:
08/14/2000
Title:
HEAT SPREADER HOLE PIN 1 IDENTIFIER
17
Patent #:
Issue Dt:
08/13/2002
Application #:
09640546
Filing Dt:
08/17/2000
Title:
METHODS OF FORMING DROP-IN HEAT SPREADER PLASTIC BALL GRID ARRAY (PBGA) PACKAGES
18
Patent #:
Issue Dt:
02/25/2003
Application #:
09659729
Filing Dt:
09/11/2000
Title:
GROUND PIN CONCEPT FOR SINGULATED BALL GRID ARRAY
19
Patent #:
Issue Dt:
08/21/2001
Application #:
09670380
Filing Dt:
09/27/2000
Title:
Copper pads for heat spreader attach
20
Patent #:
Issue Dt:
11/19/2002
Application #:
09705251
Filing Dt:
11/02/2000
Title:
LEADED SEMICONDUCTOR PACKAGES AND METHOD OF TRIMMING AND SINGULATING SUCH PACKAGES
21
Patent #:
Issue Dt:
07/30/2002
Application #:
09713800
Filing Dt:
11/16/2000
Title:
VELCRO STRAPPING FOR SEMICONDUCTOR CARRYING TRAYS
22
Patent #:
Issue Dt:
03/25/2003
Application #:
09849671
Filing Dt:
05/07/2001
Publication #:
Pub Dt:
11/07/2002
Title:
ENHANCED BGA GROUNDED HEATSINK
23
Patent #:
Issue Dt:
03/25/2003
Application #:
09867095
Filing Dt:
05/30/2001
Publication #:
Pub Dt:
12/05/2002
Title:
SUPER THIN/SUPER THERMAL BALL GRID ARRAY PACKAGE
24
Patent #:
Issue Dt:
11/12/2002
Application #:
09877324
Filing Dt:
06/11/2001
Publication #:
Pub Dt:
10/04/2001
Title:
FLIP CHIP THERMALLY ENHANCED BALL GRID ARRAY
25
Patent #:
Issue Dt:
04/30/2002
Application #:
09920599
Filing Dt:
08/02/2001
Title:
DIE PADDLE ENHANCEMENT FOR EXPOSED PAD IN SEMICONDUCTOR PACKAGING
26
Patent #:
Issue Dt:
03/18/2003
Application #:
10116983
Filing Dt:
04/05/2002
Title:
SEMICONDUCTOR PACKAGE HAVING HEAT SINK ATTACHED TO PRE-MOLDED CAVITIES AND METHOD FOR CREATING THE PACKAGE
27
Patent #:
Issue Dt:
03/18/2003
Application #:
10140572
Filing Dt:
05/08/2002
Publication #:
Pub Dt:
09/12/2002
Title:
TESTING OF BGA AND OTHER CSP PACKAGES USING PROBING TECHNIQUES
28
Patent #:
Issue Dt:
09/14/2010
Application #:
12474131
Filing Dt:
05/28/2009
Publication #:
Pub Dt:
10/22/2009
Title:
LEADFRAME PACKAGE FOR MEMS MICROPHONE ASSEMBLY
29
Patent #:
Issue Dt:
09/02/2014
Application #:
12982102
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
07/07/2011
Title:
REMOTE CONTROL WITH INTEGRATED POSITION, VIEWER IDENTIFICATION AND OPTICAL AND AUDIO TEST
30
Patent #:
Issue Dt:
06/02/2015
Application #:
13190339
Filing Dt:
07/25/2011
Publication #:
Pub Dt:
11/17/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO HEAT SPREADER ON TEMPORARY CARRIER AND FORMING POLYMER LAYER AND CONDUCTIVE LAYER OVER THE DIE
31
Patent #:
Issue Dt:
02/11/2014
Application #:
13191386
Filing Dt:
07/26/2011
Publication #:
Pub Dt:
11/17/2011
Title:
SEMICONDUCTOR PACKAGE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO OPPOSITE SIDES OF TSV SUBSTRATE
32
Patent #:
Issue Dt:
02/05/2013
Application #:
13223478
Filing Dt:
09/01/2011
Publication #:
Pub Dt:
12/22/2011
Title:
Semiconductor Device and Method of Forming Dam Material Around Periphery of Die to Reduce Warpage
33
Patent #:
Issue Dt:
12/16/2014
Application #:
13231789
Filing Dt:
09/13/2011
Publication #:
Pub Dt:
01/05/2012
Title:
Semiconductor Device and Method of Forming Compliant Stress Relief Buffer Around Large Array WLCSP
34
Patent #:
Issue Dt:
10/22/2013
Application #:
13268091
Filing Dt:
10/07/2011
Publication #:
Pub Dt:
02/02/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON DIFFERENT HEIGHT TRACES
35
Patent #:
Issue Dt:
06/09/2015
Application #:
13284003
Filing Dt:
10/28/2011
Publication #:
Pub Dt:
03/08/2012
Title:
Semiconductor Device and Method of Forming WLP With Semiconductor Die Embedded Within Penetrable Encapsulant Between TSV Interposers
36
Patent #:
Issue Dt:
03/31/2015
Application #:
13284811
Filing Dt:
10/28/2011
Publication #:
Pub Dt:
02/16/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING WAFER-LEVEL MULTI-ROW ETCHED LEADFRAME WITH BASE LEADS AND EMBEDDED SEMICONDUCTOR DIE
37
Patent #:
Issue Dt:
02/03/2015
Application #:
13349510
Filing Dt:
01/12/2012
Publication #:
Pub Dt:
05/03/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED INTERCONNECT LAYER FOR STACKED SEMICONDUCTOR DIE
38
Patent #:
Issue Dt:
11/12/2013
Application #:
13349829
Filing Dt:
01/13/2012
Publication #:
Pub Dt:
05/10/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING PENETRABLE MATERIAL OVER SEMICONDUCTOR DIE
39
Patent #:
Issue Dt:
07/23/2013
Application #:
13349919
Filing Dt:
01/13/2012
Publication #:
Pub Dt:
05/10/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING PENETRABLE MATERIAL OVER SEMICONDUCTOR DIE
40
Patent #:
Issue Dt:
10/09/2012
Application #:
13350299
Filing Dt:
01/13/2012
Publication #:
Pub Dt:
05/10/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED INTERCONNECT LAYER FOR STACKED SEMICONDUCTOR DIE
41
Patent #:
Issue Dt:
06/02/2015
Application #:
13420400
Filing Dt:
03/14/2012
Publication #:
Pub Dt:
07/05/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
42
Patent #:
Issue Dt:
08/20/2013
Application #:
13423832
Filing Dt:
03/19/2012
Publication #:
Pub Dt:
07/12/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
43
Patent #:
Issue Dt:
12/02/2014
Application #:
13438402
Filing Dt:
04/03/2012
Publication #:
Pub Dt:
07/26/2012
Title:
Semiconductor Device and Method of Forming Column Interconnect Structure to Reduce Wafer Stress
44
Patent #:
Issue Dt:
11/25/2014
Application #:
13438463
Filing Dt:
04/03/2012
Publication #:
Pub Dt:
07/26/2012
Title:
Semiconductor Device and Method of Forming Shielding Layer Around Back Surface and Sides of Semiconductor Wafer Containing IPD Structure
45
Patent #:
Issue Dt:
09/03/2013
Application #:
13441691
Filing Dt:
04/06/2012
Publication #:
Pub Dt:
08/02/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STUD BUMPS OVER EMBEDDED DIE
46
Patent #:
Issue Dt:
12/09/2014
Application #:
13446664
Filing Dt:
04/13/2012
Publication #:
Pub Dt:
08/09/2012
Title:
Semiconductor Device and Method of Forming Sacrificial Protective Layer to Protect Semiconductor Die Edge During Singulation
47
Patent #:
Issue Dt:
10/29/2013
Application #:
13458289
Filing Dt:
04/27/2012
Publication #:
Pub Dt:
08/23/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
48
Patent #:
Issue Dt:
04/07/2015
Application #:
13492687
Filing Dt:
06/08/2012
Publication #:
Pub Dt:
10/04/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THERMALLY CONDUCTIVE LAYER BETWEEN SEMICONDUCTOR DIE AND BUILD-UP INTERCONNECT STRUCTURE
49
Patent #:
Issue Dt:
10/21/2014
Application #:
13536177
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
10/18/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING BUMPS FORMED ON SEMICONDUCTOR DIE INTO PENETRABLE ADHESIVE LAYER TO REDUCE DIE SHIFTING DURING ENCAPSULATION
50
Patent #:
Issue Dt:
04/29/2014
Application #:
13560008
Filing Dt:
07/27/2012
Publication #:
Pub Dt:
11/22/2012
Title:
Semiconductor Device and Method of Forming Discontinuous ESD Protection Layers Between Semiconductor Die
51
Patent #:
Issue Dt:
08/27/2013
Application #:
13570979
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
12/06/2012
Title:
Semiconductor Device and Method of Forming WLCSP Structure using Protruded MLP
52
Patent #:
Issue Dt:
08/19/2014
Application #:
13571020
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER OVER SEMICONDUCTOR DIE MOUNTED TO TSV INTERPOSER
53
Patent #:
Issue Dt:
03/17/2015
Application #:
13571068
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
11/29/2012
Title:
Semiconductor Device and Method of Forming RF Balun having Reduced Capacitive Coupling and High CMRR
54
Patent #:
Issue Dt:
08/06/2013
Application #:
13606631
Filing Dt:
09/07/2012
Publication #:
Pub Dt:
12/27/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PARTIALLY-ETCHED CONDUCTIVE LAYER RECESSED WITHIN SUBSTRATE FOR BONDING TO SEMICONDUCTOR DIE
55
Patent #:
Issue Dt:
07/22/2014
Application #:
13664626
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
03/07/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING REPASSIVATION LAYER WITH REDUCED OPENING TO CONTACT PAD OF SEMICONDUCTOR DIE
56
Patent #:
Issue Dt:
06/23/2015
Application #:
13683946
Filing Dt:
11/21/2012
Publication #:
Pub Dt:
05/02/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE POSTS AND HEAT SINK OVER SEMICONDUCTOR DIE USING LEADFRAME
57
Patent #:
Issue Dt:
11/25/2014
Application #:
13684055
Filing Dt:
11/21/2012
Publication #:
Pub Dt:
03/28/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DIFFERENT HEIGHT CONDUCTIVE PILLARS TO ELECTRICALLY INTERCONNECT STACKED LATERALLY OFFSET SEMICONDUCTOR DIE
58
Patent #:
Issue Dt:
08/27/2013
Application #:
13691427
Filing Dt:
11/30/2012
Publication #:
Pub Dt:
04/11/2013
Title:
SEMICONDUCTOR DEVICE INCLUDING BUMP FORMED ON SUBSTRATE TO PREVENT EXTRIMELY-LOW DIELECTRIC CONSTANT (ELK) INTERLAYER DIELECTRIC LAYER (ILD) DELAMINATION DURING REFLOW PROCESS
59
Patent #:
Issue Dt:
04/22/2014
Application #:
13691578
Filing Dt:
11/30/2012
Publication #:
Pub Dt:
04/11/2013
Title:
Semiconductor Device and Method of Forming Conductive TSV With Insulating Annular Ring
60
Patent #:
Issue Dt:
01/13/2015
Application #:
13714061
Filing Dt:
12/13/2012
Publication #:
Pub Dt:
04/25/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERPOSER FRAME ELECTRICALLY CONNECTED TO EMBEDDED SEMICONDUCTOR DIE
61
Patent #:
Issue Dt:
12/30/2014
Application #:
13732150
Filing Dt:
12/31/2012
Publication #:
Pub Dt:
05/16/2013
Title:
Semiconductor Device and Method of Forming EWLB Package Containing Stacked Semiconductor Die Electrically Connected through Conductive Vias Formed in Encapsulant Around Die
62
Patent #:
Issue Dt:
05/12/2015
Application #:
13760187
Filing Dt:
02/06/2013
Publication #:
Pub Dt:
06/13/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADJACENT CHANNEL AND DAM MATERIAL AROUND DIE ATTACH AREA OF SUBSTRATE TO CONTROL OUTWARD FLOW OF UNDERFILL MATERIAL
63
Patent #:
Issue Dt:
11/04/2014
Application #:
13766493
Filing Dt:
02/13/2013
Publication #:
Pub Dt:
06/13/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
64
Patent #:
Issue Dt:
10/21/2014
Application #:
13766646
Filing Dt:
02/13/2013
Publication #:
Pub Dt:
06/20/2013
Title:
LEADFRAME INTERPOSER OVER SEMICONDUCTOR DIE AND TSV SUBSTRATE FOR VERTICAL ELECTRICAL INTERCONNECT
65
Patent #:
Issue Dt:
04/29/2014
Application #:
13768862
Filing Dt:
02/15/2013
Publication #:
Pub Dt:
06/20/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES
66
Patent #:
Issue Dt:
09/16/2014
Application #:
13769302
Filing Dt:
02/16/2013
Publication #:
Pub Dt:
08/08/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PRE-MOLDED SUBSTRATE TO REDUCE WARPAGE DURING DIE MOLDING
67
Patent #:
Issue Dt:
06/24/2014
Application #:
13782618
Filing Dt:
03/01/2013
Publication #:
Pub Dt:
07/11/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
68
Patent #:
Issue Dt:
12/16/2014
Application #:
13846742
Filing Dt:
03/18/2013
Publication #:
Pub Dt:
09/05/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTIVE COATING OVER INTERCONNECT STRUCTURE TO INHIBIT SURFACE OXIDATION
69
Patent #:
Issue Dt:
11/25/2014
Application #:
13870928
Filing Dt:
04/25/2013
Publication #:
Pub Dt:
09/12/2013
Title:
Semiconductor Device and Method of Forming Vertically Offset Conductive Pillars Over First Substrate Aligned to Vertically Offset BOT Interconnect Sites Formed Over Second Substrate
70
Patent #:
Issue Dt:
03/31/2015
Application #:
13887180
Filing Dt:
05/03/2013
Publication #:
Pub Dt:
09/19/2013
Title:
Semiconductor Device and Method of Forming Interposer and Opposing Build-Up Interconnect Structure with Connecting Conductive TMV for Electrical Interconnect of FO-WLCSP
71
Patent #:
Issue Dt:
02/24/2015
Application #:
13893616
Filing Dt:
05/14/2013
Publication #:
Pub Dt:
09/26/2013
Title:
METHOD OF FORMING RDL WIDER THAN CONTACT PAD ALONG FIRST AXIS AND NARROWER THAN CONTACT PAD ALONG SECOND
72
Patent #:
Issue Dt:
01/13/2015
Application #:
13896635
Filing Dt:
05/17/2013
Publication #:
Pub Dt:
09/26/2013
Title:
Semiconductor Device and Method of Forming Partially-Etched Conductive Layer Recessed Within Substrate for Bonding to Semiconductor Die
73
Patent #:
Issue Dt:
11/11/2014
Application #:
13906844
Filing Dt:
05/31/2013
Publication #:
Pub Dt:
10/10/2013
Title:
SEMICONDUCTOR DEVICE WITH BUMP FORMED ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS
74
Patent #:
Issue Dt:
07/22/2014
Application #:
14020996
Filing Dt:
09/09/2013
Publication #:
Pub Dt:
01/02/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
75
Patent #:
Issue Dt:
11/18/2014
Application #:
14021056
Filing Dt:
09/09/2013
Publication #:
Pub Dt:
01/09/2014
Title:
Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure
76
Patent #:
Issue Dt:
06/23/2015
Application #:
14021914
Filing Dt:
09/09/2013
Publication #:
Pub Dt:
01/09/2014
Title:
Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
77
Patent #:
Issue Dt:
03/31/2015
Application #:
14043751
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
01/30/2014
Title:
Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP
78
Patent #:
Issue Dt:
07/21/2015
Application #:
14274599
Filing Dt:
05/09/2014
Publication #:
Pub Dt:
09/04/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
Assignor
1
Exec Dt:
03/29/2016
Assignee
1
5 YISHUN STREET 23
SINGAPORE, SINGAPORE
Correspondence name and address
EDWARD J. MAYLE
1850 K STREET, N.W.
SUITE 1100
WASHINGTON, DC 20006

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