Total properties:
78
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2001
|
Application #:
|
09104031
|
Filing Dt:
|
06/24/1998
|
Title:
|
METHOD OF FORMING EXTENDED LEAD PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2000
|
Application #:
|
09161408
|
Filing Dt:
|
09/28/1998
|
Title:
|
MOLDED TAPE SUPPORT FOR A MOLDED CIRCUIT PACKAGE PRIOR TO DICING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2001
|
Application #:
|
09174620
|
Filing Dt:
|
10/19/1998
|
Title:
|
UNIVERSAL DOCKING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2001
|
Application #:
|
09182762
|
Filing Dt:
|
10/30/1998
|
Title:
|
RELIABLE METHOD AND APPARATUS FOR INTERFACING BETWEEN A BALL GRID ARRAY HANDLER AND A BALL GRID ARRAY TESTING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09249251
|
Filing Dt:
|
02/12/1999
|
Title:
|
METHOD OF MOLDING FLEXIBLE CIRCUIT WITH MOLDED STIFFENER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2002
|
Application #:
|
09252629
|
Filing Dt:
|
02/18/1999
|
Title:
|
TESTING OF BGA AND OTHER CSP PACKAGES USING PROBING TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2001
|
Application #:
|
09307838
|
Filing Dt:
|
05/10/1999
|
Title:
|
VELCRO STRAPPING FOR SEMICONDUCTOR CARRYING TRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2001
|
Application #:
|
09320752
|
Filing Dt:
|
05/27/1999
|
Title:
|
CONTACTOR SLEEVE ASSEMBLY FOR A PICK AND PLACE SEMICONDUCTOR DEVICE HANDLER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2001
|
Application #:
|
09366752
|
Filing Dt:
|
08/04/1999
|
Title:
|
FLIP CHIP THERMALLY ENHANCED BALL GRID ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09395923
|
Filing Dt:
|
09/14/1999
|
Title:
|
LEADFRAME BASED CHIP SCALE PACKAGE AND METHOD OF PRODUCING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2001
|
Application #:
|
09412631
|
Filing Dt:
|
10/04/1999
|
Title:
|
DEVICE PROBE SOCKET FORMING PART OF A TEST HEAD, INTERFACING BETWEEN TEST HEAD AND A PROBE HANDLER, USED FOR DEVICE STRIP TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2001
|
Application #:
|
09467119
|
Filing Dt:
|
12/20/1999
|
Title:
|
ZIG-ZAGGED PLATING BUS LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09614011
|
Filing Dt:
|
07/11/2000
|
Title:
|
COPLANARITY INSPECTION AT THE SINGULATION PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2002
|
Application #:
|
09635582
|
Filing Dt:
|
08/09/2000
|
Title:
|
PBGA SINGULATED SUBSTRATE FOR MODEL MELAMINE CLEANING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2001
|
Application #:
|
09638749
|
Filing Dt:
|
08/14/2000
|
Title:
|
Boat and assembly method for ball grid array packages
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2002
|
Application #:
|
09639679
|
Filing Dt:
|
08/14/2000
|
Title:
|
HEAT SPREADER HOLE PIN 1 IDENTIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09640546
|
Filing Dt:
|
08/17/2000
|
Title:
|
METHODS OF FORMING DROP-IN HEAT SPREADER PLASTIC BALL GRID ARRAY (PBGA) PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
09659729
|
Filing Dt:
|
09/11/2000
|
Title:
|
GROUND PIN CONCEPT FOR SINGULATED BALL GRID ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2001
|
Application #:
|
09670380
|
Filing Dt:
|
09/27/2000
|
Title:
|
Copper pads for heat spreader attach
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09705251
|
Filing Dt:
|
11/02/2000
|
Title:
|
LEADED SEMICONDUCTOR PACKAGES AND METHOD OF TRIMMING AND SINGULATING SUCH PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09713800
|
Filing Dt:
|
11/16/2000
|
Title:
|
VELCRO STRAPPING FOR SEMICONDUCTOR CARRYING TRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09849671
|
Filing Dt:
|
05/07/2001
|
Publication #:
|
|
Pub Dt:
|
11/07/2002
| | | | |
Title:
|
ENHANCED BGA GROUNDED HEATSINK
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09867095
|
Filing Dt:
|
05/30/2001
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
Title:
|
SUPER THIN/SUPER THERMAL BALL GRID ARRAY PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09877324
|
Filing Dt:
|
06/11/2001
|
Publication #:
|
|
Pub Dt:
|
10/04/2001
| | | | |
Title:
|
FLIP CHIP THERMALLY ENHANCED BALL GRID ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2002
|
Application #:
|
09920599
|
Filing Dt:
|
08/02/2001
|
Title:
|
DIE PADDLE ENHANCEMENT FOR EXPOSED PAD IN SEMICONDUCTOR PACKAGING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
10116983
|
Filing Dt:
|
04/05/2002
|
Title:
|
SEMICONDUCTOR PACKAGE HAVING HEAT SINK ATTACHED TO PRE-MOLDED CAVITIES AND METHOD FOR CREATING THE PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
10140572
|
Filing Dt:
|
05/08/2002
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
Title:
|
TESTING OF BGA AND OTHER CSP PACKAGES USING PROBING TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2010
|
Application #:
|
12474131
|
Filing Dt:
|
05/28/2009
|
Publication #:
|
|
Pub Dt:
|
10/22/2009
| | | | |
Title:
|
LEADFRAME PACKAGE FOR MEMS MICROPHONE ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
12982102
|
Filing Dt:
|
12/30/2010
|
Publication #:
|
|
Pub Dt:
|
07/07/2011
| | | | |
Title:
|
REMOTE CONTROL WITH INTEGRATED POSITION, VIEWER IDENTIFICATION AND OPTICAL AND AUDIO TEST
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
13190339
|
Filing Dt:
|
07/25/2011
|
Publication #:
|
|
Pub Dt:
|
11/17/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO HEAT SPREADER ON TEMPORARY CARRIER AND FORMING POLYMER LAYER AND CONDUCTIVE LAYER OVER THE DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2014
|
Application #:
|
13191386
|
Filing Dt:
|
07/26/2011
|
Publication #:
|
|
Pub Dt:
|
11/17/2011
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO OPPOSITE SIDES OF TSV SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
|
Application #:
|
13223478
|
Filing Dt:
|
09/01/2011
|
Publication #:
|
|
Pub Dt:
|
12/22/2011
| | | | |
Title:
|
Semiconductor Device and Method of Forming Dam Material Around Periphery of Die to Reduce Warpage
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2014
|
Application #:
|
13231789
|
Filing Dt:
|
09/13/2011
|
Publication #:
|
|
Pub Dt:
|
01/05/2012
| | | | |
Title:
|
Semiconductor Device and Method of Forming Compliant Stress Relief Buffer Around Large Array WLCSP
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13268091
|
Filing Dt:
|
10/07/2011
|
Publication #:
|
|
Pub Dt:
|
02/02/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON DIFFERENT HEIGHT TRACES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
13284003
|
Filing Dt:
|
10/28/2011
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
Title:
|
Semiconductor Device and Method of Forming WLP With Semiconductor Die Embedded Within Penetrable Encapsulant Between TSV Interposers
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2015
|
Application #:
|
13284811
|
Filing Dt:
|
10/28/2011
|
Publication #:
|
|
Pub Dt:
|
02/16/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING WAFER-LEVEL MULTI-ROW ETCHED LEADFRAME WITH BASE LEADS AND EMBEDDED SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
|
Application #:
|
13349510
|
Filing Dt:
|
01/12/2012
|
Publication #:
|
|
Pub Dt:
|
05/03/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED INTERCONNECT LAYER FOR STACKED SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13349829
|
Filing Dt:
|
01/13/2012
|
Publication #:
|
|
Pub Dt:
|
05/10/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING PENETRABLE MATERIAL OVER SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13349919
|
Filing Dt:
|
01/13/2012
|
Publication #:
|
|
Pub Dt:
|
05/10/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING PENETRABLE MATERIAL OVER SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
13350299
|
Filing Dt:
|
01/13/2012
|
Publication #:
|
|
Pub Dt:
|
05/10/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED INTERCONNECT LAYER FOR STACKED SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
13420400
|
Filing Dt:
|
03/14/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13423832
|
Filing Dt:
|
03/19/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
13438402
|
Filing Dt:
|
04/03/2012
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
Semiconductor Device and Method of Forming Column Interconnect Structure to Reduce Wafer Stress
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2014
|
Application #:
|
13438463
|
Filing Dt:
|
04/03/2012
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
Semiconductor Device and Method of Forming Shielding Layer Around Back Surface and Sides of Semiconductor Wafer Containing IPD Structure
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2013
|
Application #:
|
13441691
|
Filing Dt:
|
04/06/2012
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STUD BUMPS OVER EMBEDDED DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
13446664
|
Filing Dt:
|
04/13/2012
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
Semiconductor Device and Method of Forming Sacrificial Protective Layer to Protect Semiconductor Die Edge During Singulation
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
13458289
|
Filing Dt:
|
04/27/2012
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2015
|
Application #:
|
13492687
|
Filing Dt:
|
06/08/2012
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THERMALLY CONDUCTIVE LAYER BETWEEN SEMICONDUCTOR DIE AND BUILD-UP INTERCONNECT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
13536177
|
Filing Dt:
|
06/28/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING BUMPS FORMED ON SEMICONDUCTOR DIE INTO PENETRABLE ADHESIVE LAYER TO REDUCE DIE SHIFTING DURING ENCAPSULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
13560008
|
Filing Dt:
|
07/27/2012
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
Title:
|
Semiconductor Device and Method of Forming Discontinuous ESD Protection Layers Between Semiconductor Die
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13570979
|
Filing Dt:
|
08/09/2012
|
Publication #:
|
|
Pub Dt:
|
12/06/2012
| | | | |
Title:
|
Semiconductor Device and Method of Forming WLCSP Structure using Protruded MLP
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
13571020
|
Filing Dt:
|
08/09/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER OVER SEMICONDUCTOR DIE MOUNTED TO TSV INTERPOSER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2015
|
Application #:
|
13571068
|
Filing Dt:
|
08/09/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
Semiconductor Device and Method of Forming RF Balun having Reduced Capacitive Coupling and High CMRR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
13606631
|
Filing Dt:
|
09/07/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PARTIALLY-ETCHED CONDUCTIVE LAYER RECESSED WITHIN SUBSTRATE FOR BONDING TO SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
13664626
|
Filing Dt:
|
10/31/2012
|
Publication #:
|
|
Pub Dt:
|
03/07/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING REPASSIVATION LAYER WITH REDUCED OPENING TO CONTACT PAD OF SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2015
|
Application #:
|
13683946
|
Filing Dt:
|
11/21/2012
|
Publication #:
|
|
Pub Dt:
|
05/02/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE POSTS AND HEAT SINK OVER SEMICONDUCTOR DIE USING LEADFRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2014
|
Application #:
|
13684055
|
Filing Dt:
|
11/21/2012
|
Publication #:
|
|
Pub Dt:
|
03/28/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DIFFERENT HEIGHT CONDUCTIVE PILLARS TO ELECTRICALLY INTERCONNECT STACKED LATERALLY OFFSET SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13691427
|
Filing Dt:
|
11/30/2012
|
Publication #:
|
|
Pub Dt:
|
04/11/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING BUMP FORMED ON SUBSTRATE TO PREVENT EXTRIMELY-LOW DIELECTRIC CONSTANT (ELK) INTERLAYER DIELECTRIC LAYER (ILD) DELAMINATION DURING REFLOW PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2014
|
Application #:
|
13691578
|
Filing Dt:
|
11/30/2012
|
Publication #:
|
|
Pub Dt:
|
04/11/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Conductive TSV With Insulating Annular Ring
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13714061
|
Filing Dt:
|
12/13/2012
|
Publication #:
|
|
Pub Dt:
|
04/25/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERPOSER FRAME ELECTRICALLY CONNECTED TO EMBEDDED SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13732150
|
Filing Dt:
|
12/31/2012
|
Publication #:
|
|
Pub Dt:
|
05/16/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming EWLB Package Containing Stacked Semiconductor Die Electrically Connected through Conductive Vias Formed in Encapsulant Around Die
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Patent #:
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Issue Dt:
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05/12/2015
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Application #:
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13760187
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Filing Dt:
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02/06/2013
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADJACENT CHANNEL AND DAM MATERIAL AROUND DIE ATTACH AREA OF SUBSTRATE TO CONTROL OUTWARD FLOW OF UNDERFILL MATERIAL
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Patent #:
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Issue Dt:
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11/04/2014
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Application #:
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13766493
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Filing Dt:
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02/13/2013
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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10/21/2014
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Application #:
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13766646
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Filing Dt:
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02/13/2013
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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LEADFRAME INTERPOSER OVER SEMICONDUCTOR DIE AND TSV SUBSTRATE FOR VERTICAL ELECTRICAL INTERCONNECT
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13768862
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Filing Dt:
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02/15/2013
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13769302
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Filing Dt:
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02/16/2013
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Publication #:
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Pub Dt:
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08/08/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PRE-MOLDED SUBSTRATE TO REDUCE WARPAGE DURING DIE MOLDING
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Patent #:
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Issue Dt:
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06/24/2014
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Application #:
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13782618
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Filing Dt:
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03/01/2013
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Publication #:
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Pub Dt:
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07/11/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
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Patent #:
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Issue Dt:
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12/16/2014
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Application #:
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13846742
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Filing Dt:
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03/18/2013
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Publication #:
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Pub Dt:
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09/05/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTIVE COATING OVER INTERCONNECT STRUCTURE TO INHIBIT SURFACE OXIDATION
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Patent #:
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Issue Dt:
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11/25/2014
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Application #:
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13870928
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Filing Dt:
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04/25/2013
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Publication #:
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Pub Dt:
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09/12/2013
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Title:
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Semiconductor Device and Method of Forming Vertically Offset Conductive Pillars Over First Substrate Aligned to Vertically Offset BOT Interconnect Sites Formed Over Second Substrate
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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13887180
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Filing Dt:
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05/03/2013
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Publication #:
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Pub Dt:
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09/19/2013
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Title:
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Semiconductor Device and Method of Forming Interposer and Opposing Build-Up Interconnect Structure with Connecting Conductive TMV for Electrical Interconnect of FO-WLCSP
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Patent #:
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Issue Dt:
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02/24/2015
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Application #:
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13893616
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Filing Dt:
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05/14/2013
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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METHOD OF FORMING RDL WIDER THAN CONTACT PAD ALONG FIRST AXIS AND NARROWER THAN CONTACT PAD ALONG SECOND
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Patent #:
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Issue Dt:
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01/13/2015
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Application #:
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13896635
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Filing Dt:
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05/17/2013
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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Semiconductor Device and Method of Forming Partially-Etched Conductive Layer Recessed Within Substrate for Bonding to Semiconductor Die
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Patent #:
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Issue Dt:
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11/11/2014
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Application #:
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13906844
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Filing Dt:
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05/31/2013
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Publication #:
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Pub Dt:
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10/10/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH BUMP FORMED ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS
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Patent #:
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Issue Dt:
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07/22/2014
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Application #:
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14020996
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/02/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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11/18/2014
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Application #:
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14021056
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
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Title:
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Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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14021914
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
Title:
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Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
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Patent #:
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Issue Dt:
|
03/31/2015
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Application #:
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14043751
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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01/30/2014
| | | | |
Title:
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Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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14274599
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Filing Dt:
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05/09/2014
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Publication #:
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Pub Dt:
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09/04/2014
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
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