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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:059723/0382   Pages: 236
Recorded: 04/15/2022
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 524
Page 5 of 6
Pages: 1 2 3 4 5 6
1
Patent #:
NONE
Issue Dt:
Application #:
10939292
Filing Dt:
09/10/2004
Publication #:
Pub Dt:
02/17/2005
Title:
Wire bonding method for copper interconnects in semiconductor devices
2
Patent #:
NONE
Issue Dt:
Application #:
10951430
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
03/30/2006
Title:
Whisker-free lead frames
3
Patent #:
Issue Dt:
05/22/2007
Application #:
10953291
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
METHOD AND STRUCTURES FOR TESTING A SEMICONDUCTOR WAFER PRIOR TO PERFORMING A FLIP CHIP BUMPING PROCESS
4
Patent #:
Issue Dt:
12/05/2006
Application #:
10954940
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
04/06/2006
Title:
CONSTRUCTION TO IMPROVE THERMAL PERFORMANCE AND REDUCE DIE BACKSIDE WARPAGE
5
Patent #:
Issue Dt:
05/06/2008
Application #:
10955912
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
03/30/2006
Title:
SYSTEM AND METHOD FOR FORMING SOLDER JOINTS
6
Patent #:
Issue Dt:
10/03/2006
Application #:
10955913
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
03/30/2006
Title:
REINFORCED BOND PAD FOR A SEMICONDUCTOR DEVICE
7
Patent #:
Issue Dt:
10/17/2006
Application #:
10960680
Filing Dt:
10/07/2004
Publication #:
Pub Dt:
04/13/2006
Title:
MULTI-CHIP INTEGRATED CIRCUIT MODULE FOR HIGH-FREQUENCY OPERATION
8
Patent #:
Issue Dt:
04/01/2008
Application #:
10979491
Filing Dt:
11/02/2004
Publication #:
Pub Dt:
03/24/2005
Title:
INTEGRATED CIRCUIT PACKAGE DESIGN
9
Patent #:
Issue Dt:
05/22/2007
Application #:
10997630
Filing Dt:
11/24/2004
Publication #:
Pub Dt:
05/25/2006
Title:
LEADFRAME DESIGNS FOR INTEGRATED CIRCUIT PLASTIC PACKAGES
10
Patent #:
NONE
Issue Dt:
Application #:
11012838
Filing Dt:
12/15/2004
Publication #:
Pub Dt:
05/05/2005
Title:
System and method for using film deposition techniques to provide an antenna within an integrated circuit package
11
Patent #:
Issue Dt:
05/29/2007
Application #:
11015534
Filing Dt:
12/18/2004
Publication #:
Pub Dt:
06/22/2006
Title:
SEMICONDUCTOR DEVICE PACKAGE WITH REDUCED LEAKAGE
12
Patent #:
Issue Dt:
06/07/2011
Application #:
11015535
Filing Dt:
12/18/2004
Publication #:
Pub Dt:
06/22/2006
Title:
PACKAGES FOR ENCAPSULATED SEMICONDUCTOR DEVICES AND METHOD OF MAKING SAME
13
Patent #:
Issue Dt:
04/10/2007
Application #:
11028695
Filing Dt:
01/04/2005
Publication #:
Pub Dt:
07/06/2006
Title:
FAILURE ANALYSIS AND TESTING OF SEMI-CONDUCTOR DEVICES USING INTELLIGENT SOFTWARE ON AUTOMATED TEST EQUIPMENT (ATE)
14
Patent #:
Issue Dt:
06/26/2007
Application #:
11049246
Filing Dt:
02/02/2005
Publication #:
Pub Dt:
08/03/2006
Title:
DEVICE PACKAGES
15
Patent #:
Issue Dt:
07/10/2007
Application #:
11049407
Filing Dt:
02/02/2005
Publication #:
Pub Dt:
08/03/2006
Title:
DEVICE PACKAGE
16
Patent #:
Issue Dt:
10/07/2008
Application #:
11055712
Filing Dt:
02/10/2005
Publication #:
Pub Dt:
06/29/2006
Title:
PACKAGING FOR ELECTRONIC MODULES
17
Patent #:
Issue Dt:
03/09/2010
Application #:
11065838
Filing Dt:
02/25/2005
Publication #:
Pub Dt:
08/31/2006
Title:
INTEGRATED CIRCUIT WITH STAGGERED DIFFERENTIAL WIRE BOND PAIRS
18
Patent #:
Issue Dt:
07/25/2006
Application #:
11073802
Filing Dt:
03/07/2005
Title:
SUBSTRATE VIA LAYOUT TO IMPROVE BIAS HUMIDITY TESTING RELIABILITY
19
Patent #:
Issue Dt:
11/07/2006
Application #:
11074358
Filing Dt:
03/07/2005
Publication #:
Pub Dt:
09/07/2006
Title:
INTEGRATED CIRCUIT PACKAGE WITH LEAD FINGERS EXTENDING INTO A SLOT OF A DIE PADDLE
20
Patent #:
Issue Dt:
02/17/2009
Application #:
11079028
Filing Dt:
03/14/2005
Publication #:
Pub Dt:
10/19/2006
Title:
COMPOSABLE SYSTEM-IN-PACKAGE INTEGRATED CIRCUITS AND PROCESS OF COMPOSING THE SAME
21
Patent #:
Issue Dt:
05/29/2007
Application #:
11080859
Filing Dt:
03/15/2005
Publication #:
Pub Dt:
07/21/2005
Title:
ELECTRONIC COMPONENT PACKAGE
22
Patent #:
Issue Dt:
08/05/2008
Application #:
11095929
Filing Dt:
03/31/2005
Publication #:
Pub Dt:
10/05/2006
Title:
CONTROLLING WARPING IN INTEGRATED CIRCUIT DEVICES
23
Patent #:
Issue Dt:
02/28/2006
Application #:
11097796
Filing Dt:
04/02/2005
Title:
METHOD OF TESTING ELECTRONIC WAFERS HAVING LEAD-FREE SOLDER CONTACTS
24
Patent #:
Issue Dt:
01/15/2008
Application #:
11097895
Filing Dt:
04/01/2005
Publication #:
Pub Dt:
10/05/2006
Title:
BALL ASSIGNMENT SYSTEM
25
Patent #:
Issue Dt:
05/06/2008
Application #:
11102156
Filing Dt:
04/08/2005
Publication #:
Pub Dt:
10/26/2006
Title:
TEST VEHICLE DATA ANALYSIS
26
Patent #:
Issue Dt:
05/30/2006
Application #:
11131885
Filing Dt:
05/18/2005
Title:
PROBING FIXTURE FOR SEMICONDUCTOR WAFER
27
Patent #:
Issue Dt:
04/08/2008
Application #:
11132751
Filing Dt:
05/18/2005
Publication #:
Pub Dt:
07/20/2006
Title:
METHOD AND APPARATUS FOR AVOIDING DICING CHIP-OUTS IN INTEGRATED CIRCUIT DIE
28
Patent #:
Issue Dt:
05/05/2009
Application #:
11140455
Filing Dt:
05/27/2005
Publication #:
Pub Dt:
11/30/2006
Title:
ZERO ATE INSERTION FORCE INTERPOSER DAUGHTER CARD
29
Patent #:
Issue Dt:
03/04/2014
Application #:
11158370
Filing Dt:
06/22/2005
Publication #:
Pub Dt:
12/28/2006
Title:
INTEGRATED CIRCUIT WITH HEAT CONDUCTING STRUCTURES FOR LOCALIZED THERMAL CONTROL
30
Patent #:
Issue Dt:
06/02/2009
Application #:
11158435
Filing Dt:
06/22/2005
Publication #:
Pub Dt:
11/03/2005
Title:
Integrated circuit die for wire bonding and flip-chip mounting
31
Patent #:
Issue Dt:
02/05/2008
Application #:
11235920
Filing Dt:
09/27/2005
Publication #:
Pub Dt:
03/29/2007
Title:
INTEGRATED CIRCUIT DEVICE INCORPORATING METALLURIGICAL BOND TO ENHANCE THERMAL CONDUCTION TO A HEAT SINK
32
Patent #:
Issue Dt:
09/01/2009
Application #:
11258253
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
02/16/2006
Title:
I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS IN DEEP-SUBMICRON CMOS PROCESS
33
Patent #:
Issue Dt:
07/29/2008
Application #:
11260334
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
05/03/2007
Title:
ASYMMETRIC ALIGNMENT OF SUBSTRATE INTERCONNECT TO SEMICONDUCTOR DIE
34
Patent #:
Issue Dt:
11/01/2011
Application #:
11277188
Filing Dt:
03/22/2006
Publication #:
Pub Dt:
09/27/2007
Title:
DEVICE FOR AVOIDING PARASITIC CAPACITANCE IN AN INTEGRATED CIRCUIT PACKAGE
35
Patent #:
Issue Dt:
11/20/2007
Application #:
11283340
Filing Dt:
11/18/2005
Publication #:
Pub Dt:
05/24/2007
Title:
SCALING OF FUNCTIONAL ASSIGNMENTS IN PACKAGES
36
Patent #:
Issue Dt:
03/17/2009
Application #:
11298030
Filing Dt:
12/09/2005
Publication #:
Pub Dt:
06/14/2007
Title:
INTEGRATED CIRCUIT HAVING BOND PAD WITH IMPROVED THERMAL AND MECHANICAL PROPERTIES
37
Patent #:
Issue Dt:
05/27/2008
Application #:
11300789
Filing Dt:
12/14/2005
Publication #:
Pub Dt:
06/14/2007
Title:
METHOD OF USING AUTOMATED TEST EQUIPMENT TO SCREEN FOR LEAKAGE INDUCING DEFECTS AFTER CALIBRATION TO INTRINSIC LEAKAGE
38
Patent #:
Issue Dt:
06/02/2009
Application #:
11302690
Filing Dt:
12/14/2005
Publication #:
Pub Dt:
05/11/2006
Title:
INTEGRATED CIRCUIT DEVICE HAVING FLEXIBLE LEADFRAME
39
Patent #:
Issue Dt:
03/03/2009
Application #:
11304862
Filing Dt:
12/14/2005
Publication #:
Pub Dt:
06/14/2007
Title:
SEMICONDUCTOR PACKAGE HAVING INCREASED RESISTANCE TO ELECTROSTATIC DISCHARGE
40
Patent #:
Issue Dt:
08/17/2010
Application #:
11324119
Filing Dt:
12/30/2005
Title:
SOCKETLESS/BOARDLESS TEST INTERPOSER CARD
41
Patent #:
Issue Dt:
06/15/2010
Application #:
11334870
Filing Dt:
01/19/2006
Publication #:
Pub Dt:
07/19/2007
Title:
POWER CONFIGURATION METHOD FOR STRUCTURED ASICS
42
Patent #:
Issue Dt:
07/01/2008
Application #:
11360200
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
08/23/2007
Title:
FLEXIBLE CIRCUIT SUBSTRATE FOR FLIP-CHIP-ON-FLEX APPLICATIONS
43
Patent #:
Issue Dt:
01/20/2009
Application #:
11375302
Filing Dt:
03/14/2006
Publication #:
Pub Dt:
09/20/2007
Title:
LOW THERMAL RESISTANCE ASSEMBLY FOR FLIP CHIP APPLICATIONS
44
Patent #:
Issue Dt:
04/27/2010
Application #:
11385086
Filing Dt:
03/21/2006
Publication #:
Pub Dt:
07/20/2006
Title:
METHODS AND APPARATUS FOR DETERMINING PAD HEIGHT FOR A WIRE-BONDING OPERATION IN AN INTEGRATED CIRCUIT
45
Patent #:
Issue Dt:
10/28/2008
Application #:
11385245
Filing Dt:
03/21/2006
Publication #:
Pub Dt:
07/20/2006
Title:
METHODS AND APPARATUS FOR WIRE BONDING WITH WIRE LENGTH ADJUSTMENT IN AN INTEGRATED CIRCUIT
46
Patent #:
Issue Dt:
09/27/2011
Application #:
11395779
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
08/03/2006
Title:
METHODS AND APPARATUS FOR INTEGRATED CIRCUIT BALL BONDING WITH SUBSTANTIALLY PERPENDICULAR WIRE BOND PROFILES
47
Patent #:
Issue Dt:
01/12/2010
Application #:
11399723
Filing Dt:
04/06/2006
Publication #:
Pub Dt:
10/11/2007
Title:
SEMICONDUCTOR PACKAGE AND METHOD USING ISOLATED VSS PLANE TO ACCOMMODATE HIGH SPEED CIRCUITRY GROUND ISOLATION
48
Patent #:
Issue Dt:
11/27/2007
Application #:
11448560
Filing Dt:
06/07/2006
Publication #:
Pub Dt:
10/12/2006
Title:
REINFORCED BOND PAD FOR A SEMICONDUCTOR DEVICE
49
Patent #:
Issue Dt:
05/31/2011
Application #:
11459249
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
03/29/2007
Title:
SOLDER BUMP STRUCTURE FOR FLIP CHIP SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURE THEREFORE
50
Patent #:
Issue Dt:
09/21/2010
Application #:
11460459
Filing Dt:
07/27/2006
Publication #:
Pub Dt:
01/31/2008
Title:
ON-CHIP SENSOR ARRAY FOR TEMPERATURE MANAGEMENT IN INTEGRATED CIRCUITS
51
Patent #:
Issue Dt:
12/15/2009
Application #:
11468901
Filing Dt:
08/31/2006
Publication #:
Pub Dt:
03/22/2007
Title:
HEAT DISSIPATION IN INTEGRATED CIRCUITS
52
Patent #:
Issue Dt:
11/27/2012
Application #:
11469960
Filing Dt:
09/05/2006
Publication #:
Pub Dt:
03/22/2007
Title:
ROUTING UNDER BOND PAD FOR THE REPLACEMENT OF AN INTERCONNECT LAYER
53
Patent #:
Issue Dt:
12/16/2008
Application #:
11494221
Filing Dt:
07/27/2006
Publication #:
Pub Dt:
11/23/2006
Title:
INTEGRATED CIRCUIT WITH SUBSTANTIALLY PERPENDICULAR WIRE BONDS
54
Patent #:
Issue Dt:
09/09/2008
Application #:
11505152
Filing Dt:
08/16/2006
Publication #:
Pub Dt:
02/21/2008
Title:
PLASTIC OVERMOLDED PACKAGES WITH MECHANICALLY DECOUPLED LID ATTACH ATTACHMENT
55
Patent #:
Issue Dt:
11/25/2008
Application #:
11506680
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
02/21/2008
Title:
INTEGRATED CIRCUIT PACKAGE AND SYSTEM INTERFACE
56
Patent #:
Issue Dt:
09/18/2007
Application #:
11530550
Filing Dt:
09/11/2006
Title:
SYSTEMS AND METHODS FOR DISTRIBUTING I/O IN A SEMICONDUCTOR DEVICE
57
Patent #:
Issue Dt:
09/28/2010
Application #:
11565701
Filing Dt:
12/01/2006
Publication #:
Pub Dt:
06/05/2008
Title:
WIRE BOND INTEGRATED CIRCUIT PACKAGE FOR HIGH SPEED I/O
58
Patent #:
Issue Dt:
07/07/2009
Application #:
11641989
Filing Dt:
12/18/2006
Publication #:
Pub Dt:
06/19/2008
Title:
ELECTRONIC COMPONENT CONNECTION SUPPORT STRUCTURES INCLUDING AIR AS A DIELECTRIC
59
Patent #:
Issue Dt:
09/30/2008
Application #:
11670031
Filing Dt:
02/01/2007
Publication #:
Pub Dt:
08/02/2007
Title:
FAILURE ANALYSIS AND TESTING OF SEMI-CONDUCTOR DEVICES USING INTELLIGENT SOFTWARE ON AUTOMATED TEST EQUIPMENT (ATE)
60
Patent #:
Issue Dt:
05/04/2010
Application #:
11684674
Filing Dt:
03/12/2007
Publication #:
Pub Dt:
03/13/2008
Title:
SYSTEMS AND METHODS FOR SUPPORTING A SUBSET OF MULTIPLE INTERFACE TYPES IN A SEMICONDUCTOR DEVICE
61
Patent #:
Issue Dt:
02/23/2010
Application #:
11717227
Filing Dt:
03/12/2007
Publication #:
Pub Dt:
09/18/2008
Title:
WIRE BONDING METHOD AND RELATED DEVICE FOR HIGH-FREQUENCY APPLICATIONS
62
Patent #:
Issue Dt:
01/20/2009
Application #:
11772267
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
INTEGRATED CIRCUIT PACKAGE WITH SPUTTERED HEAT SINK FOR IMPROVED THERMAL PERFORMANCE
63
Patent #:
Issue Dt:
06/02/2009
Application #:
11788346
Filing Dt:
04/19/2007
Publication #:
Pub Dt:
10/18/2007
Title:
SEMICONDUCTOR DEVICE PACKAGE WITH BASE FEATURES TO REDUCE LEAKAGE
64
Patent #:
Issue Dt:
09/30/2008
Application #:
11868624
Filing Dt:
10/08/2007
Publication #:
Pub Dt:
01/31/2008
Title:
INTEGRATED CIRCUIT DEVICE INCORPORATING METALLURGICAL BOND TO ENHANCE THERMAL CONDUCTION TO A HEAT SINK
65
Patent #:
Issue Dt:
08/17/2010
Application #:
11884328
Filing Dt:
05/30/2008
Publication #:
Pub Dt:
03/19/2009
Title:
STRUCTURE AND METHOD FOR FABRICATING FLIP CHIP DEVICES
66
Patent #:
Issue Dt:
02/15/2011
Application #:
11973859
Filing Dt:
10/10/2007
Publication #:
Pub Dt:
04/16/2009
Title:
INTEGRATED CIRCUIT PACKAGE INCLUDING WIRE BONDS
67
Patent #:
Issue Dt:
07/06/2010
Application #:
12034745
Filing Dt:
02/21/2008
Publication #:
Pub Dt:
08/27/2009
Title:
BALL GRID ARRAY PACKAGE LAYOUT SUPPORTING MANY VOLTAGE SPLITS AND FLEXIBLE SPLIT LOCATIONS
68
Patent #:
Issue Dt:
06/28/2011
Application #:
12038911
Filing Dt:
02/28/2008
Publication #:
Pub Dt:
09/03/2009
Title:
PROCESS OF GROUNDING HEAT SPREADER/STIFFENER TO A FLIP CHIP PACKAGE USING SOLDER AND FILM ADHESIVE
69
Patent #:
Issue Dt:
03/02/2010
Application #:
12060387
Filing Dt:
04/01/2008
Publication #:
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGE FOR HIGH-SPEED SIGNALS
70
Patent #:
Issue Dt:
03/13/2012
Application #:
12061728
Filing Dt:
04/03/2008
Publication #:
Pub Dt:
10/08/2009
Title:
HEAT DISSIPATION FOR INTEGRATED CIRCUIT
71
Patent #:
Issue Dt:
07/28/2009
Application #:
12079124
Filing Dt:
03/25/2008
Publication #:
Pub Dt:
07/24/2008
Title:
LEADFRAME DESIGNS FOR PLASTIC OVERMOLD PACKAGES
72
Patent #:
Issue Dt:
06/30/2009
Application #:
12119575
Filing Dt:
05/13/2008
Title:
PAD CURRENT SPLITTING
73
Patent #:
Issue Dt:
01/08/2013
Application #:
12121363
Filing Dt:
05/15/2008
Publication #:
Pub Dt:
11/19/2009
Title:
FLIPCHIP BUMP PATTERNS FOR EFFICIENT I-MESH POWER DISTRIBUTION SCHEMES
74
Patent #:
Issue Dt:
04/05/2011
Application #:
12139185
Filing Dt:
06/13/2008
Publication #:
Pub Dt:
10/09/2008
Title:
ASYMMETRIC ALIGNMENT OF SUBSTRATE INTERCONNECT TO SEMICONDUCTOR DIE
75
Patent #:
Issue Dt:
03/02/2010
Application #:
12151108
Filing Dt:
05/02/2008
Publication #:
Pub Dt:
11/05/2009
Title:
ELECTRONIC PACKAGES
76
Patent #:
Issue Dt:
05/25/2010
Application #:
12154794
Filing Dt:
05/27/2008
Publication #:
Pub Dt:
12/03/2009
Title:
METHOD OF MAKING ELECTRONIC ENTITIES
77
Patent #:
Issue Dt:
08/17/2010
Application #:
12160233
Filing Dt:
07/08/2008
Publication #:
Pub Dt:
01/01/2009
Title:
HIGH THERMAL PERFORMANCE PACKAGING FOR CIRCUIT DIES
78
Patent #:
Issue Dt:
10/06/2009
Application #:
12163453
Filing Dt:
06/27/2008
Publication #:
Pub Dt:
10/23/2008
Title:
CONTROLLING WARPING IN INTEGRATED CIRCUIT DEVICES
79
Patent #:
Issue Dt:
12/29/2009
Application #:
12171903
Filing Dt:
07/11/2008
Publication #:
Pub Dt:
11/20/2008
Title:
METHODS AND APPARATUS FOR WIRE BONDING WITH WIRE LENGTH ADJUSTMENT IN AN INTEGRATED CIRCUIT
80
Patent #:
Issue Dt:
07/05/2011
Application #:
12194706
Filing Dt:
08/20/2008
Publication #:
Pub Dt:
02/25/2010
Title:
THERMAL MONITORING AND MANAGEMENT OF INTEGRATED CIRCUITS
81
Patent #:
Issue Dt:
01/08/2013
Application #:
12206786
Filing Dt:
09/09/2008
Publication #:
Pub Dt:
03/11/2010
Title:
PACKAGE WITH POWER AND GROUND THROUGH VIA
82
Patent #:
Issue Dt:
06/01/2010
Application #:
12220182
Filing Dt:
07/22/2008
Publication #:
Pub Dt:
01/28/2010
Title:
MANUFACTURE OF DEVICES INCLUDING SOLDER BUMPS
83
Patent #:
Issue Dt:
12/15/2009
Application #:
12228720
Filing Dt:
08/15/2008
Publication #:
Pub Dt:
12/18/2008
Title:
PLASTIC OVERMOLDED PACKAGES WITH MECHANCIALLY DECOUPLED LID ATTACH ATTACHMENT
84
Patent #:
Issue Dt:
06/14/2011
Application #:
12253403
Filing Dt:
10/17/2008
Publication #:
Pub Dt:
02/12/2009
Title:
ELECTRICAL DEVICES HAVING ADJUSTABLE CAPACITANCE
85
Patent #:
Issue Dt:
06/23/2009
Application #:
12283820
Filing Dt:
09/15/2008
Publication #:
Pub Dt:
01/22/2009
Title:
INTEGRATED CIRCUIT PACKAGE AND SYSTEM INTERFACE
86
Patent #:
Issue Dt:
08/31/2010
Application #:
12327987
Filing Dt:
12/04/2008
Publication #:
Pub Dt:
06/10/2010
Title:
PREFERENTIALLY COOLED ELECTRONIC DEVICE
87
Patent #:
Issue Dt:
02/28/2012
Application #:
12331561
Filing Dt:
12/10/2008
Publication #:
Pub Dt:
09/24/2009
Title:
WIRE BONDING OVER ACTIVE CIRCUITS
88
Patent #:
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09/04/2012
Application #:
12337519
Filing Dt:
12/17/2008
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Pub Dt:
04/23/2009
Title:
SEMICONDUCTOR PACKAGE HAVING INCREASED RESISTANCE TO ELECTROSTATIC DISCHARGE
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02/14/2012
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12432763
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04/30/2009
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Pub Dt:
11/04/2010
Title:
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90
Patent #:
Issue Dt:
09/06/2011
Application #:
12462069
Filing Dt:
07/28/2009
Publication #:
Pub Dt:
11/26/2009
Title:
WHISKER-FREE LEAD FRAMES
91
Patent #:
Issue Dt:
05/25/2010
Application #:
12463718
Filing Dt:
05/11/2009
Title:
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92
Patent #:
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12/04/2012
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12469985
Filing Dt:
05/21/2009
Publication #:
Pub Dt:
11/26/2009
Title:
SOLUTION FOR PACKAGE CROSSTALK MINIMIZATION
93
Patent #:
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01/24/2012
Application #:
12471982
Filing Dt:
05/26/2009
Publication #:
Pub Dt:
12/02/2010
Title:
ALUMINUM BOND PADS WITH ENHANCED WIRE BOND STABILITY
94
Patent #:
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08/09/2011
Application #:
12483139
Filing Dt:
06/11/2009
Publication #:
Pub Dt:
12/16/2010
Title:
ELECTRONIC DEVICE PACKAGE AND METHOD OF MANUFACTURE
95
Patent #:
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02/05/2013
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12485238
Filing Dt:
06/16/2009
Publication #:
Pub Dt:
12/16/2010
Title:
METHOD OF GENERATING A LEADFRAME IC PACKAGE MODEL, A LEADFRAME MODELER AND AN IC DESIGN SYSTEM
96
Patent #:
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12/18/2012
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06/17/2009
Publication #:
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12/23/2010
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LEAD FRAME DESIGN TO IMPROVE RELIABILITY
97
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02/19/2013
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12501686
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98
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07/21/2009
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12/03/2009
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99
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12/17/2009
Title:
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100
Patent #:
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03/06/2012
Application #:
12625457
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
03/18/2010
Title:
SEMICONDUCTOR PACKAGE AND METHOD USING ISOLATED VSS PLANE TO ACCOMMODATE HIGH SPEED CIRCUITRY GROUND ISOLATION
Assignor
1
Exec Dt:
04/01/2022
Assignees
1
401 N. MICHIGAN AVE., SUITE 1630
CHICAGO, ILLINOIS 60611
2
401 N. MICHIGAN AVE., SUITE 1630
CHICAGO, ILLINOIS 60611
3
401 N. MICHIGAN AVE., SUITE 1630
CHICAGO, ILLINOIS 60611
Correspondence name and address
JOSHUA GAMMON
401 N. MICHIGAN AVE.
SUITE 1630
CHICAGO, IL 60611

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