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Total properties:
86
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|
Patent #:
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Issue Dt:
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09/29/2009
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Application #:
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11169850
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Filing Dt:
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06/28/2005
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|
Publication #:
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Pub Dt:
|
10/27/2005
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE FOR A LARGE DIE
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|
Patent #:
|
NONE
|
Issue Dt:
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|
Application #:
|
11337168
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Filing Dt:
|
01/20/2006
|
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
|
Title:
|
Semiconductor multi-package module having inverted second package stacked over die-down flip-chip ball grid array (BGA) package
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
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|
Application #:
|
12018441
|
Filing Dt:
|
01/23/2008
|
|
Publication #:
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|
Pub Dt:
|
06/12/2008
| | | | |
|
Title:
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Apparatus and process for precise encapsulation of flip chip interconnects
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|
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Patent #:
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|
Issue Dt:
|
02/02/2016
|
Application #:
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13207633
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Filing Dt:
|
08/11/2011
|
|
Publication #:
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|
Pub Dt:
|
08/30/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-Applied Protective Layer
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13245181
|
Filing Dt:
|
09/26/2011
|
|
Publication #:
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|
Pub Dt:
|
08/30/2012
| | | | |
|
Title:
|
SEMICONDUCTOR PACKAGING STRUCTURE AND METHOD OF FORMING METALLURGICAL INTERCONNECTION DIRECTLY BETWEEN A DUP AND METALLIZATION ON A SUBTRATE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/12/2016
|
Application #:
|
13268048
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Filing Dt:
|
10/07/2011
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2013
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming a Metallurgical Interconnection Between a Chip and a Substrate in a Flip Chip Package
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|
|
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|
Patent #:
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|
Issue Dt:
|
01/10/2017
|
Application #:
|
13596446
|
Filing Dt:
|
08/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2012
| | | | |
|
Title:
|
FLIP CHIP INTERCONNECT SOLDER MASK
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|
Patent #:
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|
Issue Dt:
|
01/10/2017
|
Application #:
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13596860
|
Filing Dt:
|
08/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2012
| | | | |
|
Title:
|
Flip Chip Interconnect Solder Mask
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/07/2015
|
Application #:
|
13743054
|
Filing Dt:
|
01/16/2013
|
|
Publication #:
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|
Pub Dt:
|
07/17/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Through-Silicon-Via with Sacrificial Layer
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|
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|
Patent #:
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|
Issue Dt:
|
04/19/2016
|
Application #:
|
13759911
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Filing Dt:
|
02/05/2013
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|
Publication #:
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|
Pub Dt:
|
08/07/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STRESS RELIEVING VIAS FOR IMPROVED FAN-OUT WLCSP PACKAGE
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|
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|
Patent #:
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|
Issue Dt:
|
05/24/2016
|
Application #:
|
13801294
|
Filing Dt:
|
03/13/2013
|
|
Publication #:
|
|
Pub Dt:
|
09/18/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming WLCSP with Semiconductor Die Embedded within Interconnect Structure
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|
Patent #:
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|
Issue Dt:
|
10/24/2017
|
Application #:
|
13801675
|
Filing Dt:
|
03/13/2013
|
|
Publication #:
|
|
Pub Dt:
|
09/18/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF USING PARTIAL WAFER SINGULATION FOR IMPROVED WAFER LEVEL EMBEDDED SYSTEM IN PACKAGE
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|
|
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|
Patent #:
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|
Issue Dt:
|
03/08/2016
|
Application #:
|
13846593
|
Filing Dt:
|
03/18/2013
|
|
Publication #:
|
|
Pub Dt:
|
09/18/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF CALIBRATING WARPAGE TESTING SYSTEM TO ACCURATELY MEASURE SEMICONDUCTOR PACKAGE WARPAGE
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|
|
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Patent #:
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|
Issue Dt:
|
02/02/2016
|
Application #:
|
13853810
|
Filing Dt:
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03/29/2013
|
|
Publication #:
|
|
Pub Dt:
|
10/02/2014
| | | | |
|
Title:
|
Methods of Manufacturing Flip Chip Semiconductor Packages Using Double-Sided Thermal Compression Bonding
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|
Patent #:
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|
Issue Dt:
|
02/23/2016
|
Application #:
|
13918103
|
Filing Dt:
|
06/14/2013
|
|
Publication #:
|
|
Pub Dt:
|
04/02/2015
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MAKING AN EMBEDDED WAFER LEVEL BALL GRID ARRAY (EWLB) PACKAGE ON PACKAGE (POP) DEVICE WITH A SLOTTED METAL CARRIER INTERPOSER
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|
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|
Patent #:
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|
Issue Dt:
|
12/20/2016
|
Application #:
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13928862
|
Filing Dt:
|
06/27/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
|
Title:
|
Semiconductor Device and Method of Individual Die Bonding Followed by Simultaneous Multiple Die Thermal Compression Bonding
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13929426
|
Filing Dt:
|
06/27/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming an Interposer Including a Beveled Edge
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/18/2017
|
Application #:
|
13929485
|
Filing Dt:
|
06/27/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Trench and Disposing Semiconductor Die Over Substrate to Control Outward Flow of Underfill Material
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13929767
|
Filing Dt:
|
06/27/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
|
Title:
|
Methods of Forming Conductive Materials on Contact Pads
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|
|
|
|
Patent #:
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|
Issue Dt:
|
11/29/2016
|
Application #:
|
13929775
|
Filing Dt:
|
06/27/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
|
Title:
|
METHODS OF FORMING CONDUCTIVE JUMPER TRACES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/02/2016
|
Application #:
|
13929776
|
Filing Dt:
|
06/27/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
|
Title:
|
Methods of Forming Conductive and Insulating Layers
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/14/2016
|
Application #:
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13930980
|
Filing Dt:
|
06/28/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
|
Title:
|
Semiconductor Device and Method of Using Substrate With Conductive Posts and Protective Layers to Form Embedded Sensor Die Package
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2015
|
Application #:
|
13931397
|
Filing Dt:
|
06/28/2013
|
|
Publication #:
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|
Pub Dt:
|
01/01/2015
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING LOW PROFILE 3D FAN-OUT PACKAGE
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|
|
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|
Patent #:
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|
Issue Dt:
|
02/02/2016
|
Application #:
|
13950122
|
Filing Dt:
|
07/24/2013
|
|
Publication #:
|
|
Pub Dt:
|
01/29/2015
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH MOLD HOLE WITH ALIGNMENT AND DIMENSION CONTROL
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|
Patent #:
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|
Issue Dt:
|
03/20/2018
|
Application #:
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13965356
|
Filing Dt:
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08/13/2013
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|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
|
Bump-on-Lead Flip Chip Interconnection
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/17/2019
|
Application #:
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14035726
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Filing Dt:
|
09/24/2013
|
|
Publication #:
|
|
Pub Dt:
|
03/26/2015
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Dual Fan-Out Semiconductor Package
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/28/2017
|
Application #:
|
14036193
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Filing Dt:
|
09/25/2013
|
|
Publication #:
|
|
Pub Dt:
|
03/26/2015
| | | | |
|
Title:
|
Semiconductor Device and Method of Controlling Warpage in Reconstituted Wafer
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/01/2017
|
Application #:
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14036525
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Filing Dt:
|
09/25/2013
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Using a Standardized Carrier to Form Embedded Wafer Level Chip Scale Packages
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|
|
|
|
Patent #:
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|
Issue Dt:
|
01/26/2016
|
Application #:
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14038339
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Filing Dt:
|
09/26/2013
|
|
Publication #:
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|
Pub Dt:
|
06/26/2014
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF SIMULTANEOUS MOLDING AND THERMALCOMPRESSION BONDING
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|
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|
Patent #:
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|
Issue Dt:
|
03/15/2016
|
Application #:
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14039092
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Filing Dt:
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09/27/2013
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Bonding Semiconductor Die to Substrate in Reconstituted Wafer Form
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|
Patent #:
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|
Issue Dt:
|
01/19/2016
|
Application #:
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14039418
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Filing Dt:
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09/27/2013
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|
Publication #:
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|
Pub Dt:
|
06/26/2014
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING BUMPLESS FLIPCHIP INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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07/11/2017
|
Application #:
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14070509
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Filing Dt:
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11/02/2013
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|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Embedded Wafer Level Chip Scale Packages
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Patent #:
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Issue Dt:
|
04/18/2017
|
Application #:
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14187014
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Filing Dt:
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02/21/2014
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|
Publication #:
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|
Pub Dt:
|
09/11/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Ultra High Density Embedded Semiconductor Die Package
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Patent #:
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Issue Dt:
|
06/21/2016
|
Application #:
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14192706
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Filing Dt:
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02/27/2014
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|
Publication #:
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|
Pub Dt:
|
06/26/2014
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES
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Patent #:
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Issue Dt:
|
06/20/2017
|
Application #:
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14193267
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Filing Dt:
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02/28/2014
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|
Publication #:
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|
Pub Dt:
|
09/11/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Embedded Conductive Layer for Power/Ground Planes in FO-EWLB
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Patent #:
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|
Issue Dt:
|
10/06/2015
|
Application #:
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14194691
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Filing Dt:
|
03/01/2014
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|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Discontinuous ESD Protection Layers Between Semiconductor Die
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Patent #:
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|
Issue Dt:
|
08/02/2016
|
Application #:
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14214120
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Filing Dt:
|
03/14/2014
|
|
Publication #:
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|
Pub Dt:
|
07/17/2014
| | | | |
|
Title:
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EXTENDED REDISTRIBUTION LAYERS BUMPED WAFER
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Patent #:
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Issue Dt:
|
01/09/2018
|
Application #:
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14222547
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Filing Dt:
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03/21/2014
|
|
Publication #:
|
|
Pub Dt:
|
10/09/2014
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE VIAS USING BACKSIDE VIA REVEAL AND SELECTIVE PASSIVATION
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Patent #:
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Issue Dt:
|
05/24/2016
|
Application #:
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14223695
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Filing Dt:
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03/24/2014
|
|
Publication #:
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|
Pub Dt:
|
10/30/2014
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING STRESS-REDUCED CONDUCTIVE JOINT STRUCTURES
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Patent #:
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Issue Dt:
|
05/02/2017
|
Application #:
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14224931
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Filing Dt:
|
03/25/2014
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|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE
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Patent #:
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Issue Dt:
|
03/21/2017
|
Application #:
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14249307
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Filing Dt:
|
04/09/2014
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|
Publication #:
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|
Pub Dt:
|
08/07/2014
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|
Title:
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Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street
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|
Patent #:
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|
Issue Dt:
|
10/25/2016
|
Application #:
|
14256047
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Filing Dt:
|
04/18/2014
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|
Publication #:
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|
Pub Dt:
|
08/14/2014
| | | | |
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Title:
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Semiconductor Device with Conductive Pillars Having Recesses or Protrusions to Detect Interconnect Continuity Between Semiconductor Die and Substrate
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Patent #:
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Issue Dt:
|
12/05/2017
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Application #:
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14257850
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Filing Dt:
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04/21/2014
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|
Publication #:
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|
Pub Dt:
|
08/14/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Insulating Layer in Notches Around Conductive TSV for Stress Relief
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Patent #:
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Issue Dt:
|
11/11/2014
|
Application #:
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14258300
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Filing Dt:
|
04/22/2014
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|
Publication #:
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|
Pub Dt:
|
08/14/2014
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|
Title:
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Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch
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Patent #:
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Issue Dt:
|
10/25/2016
|
Application #:
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14261252
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Filing Dt:
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04/24/2014
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|
Publication #:
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|
Pub Dt:
|
01/01/2015
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|
Title:
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Semiconductor Device and Method of Stacking Semiconductor Die on a Fan-Out WLCSP
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Patent #:
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Issue Dt:
|
02/09/2016
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Application #:
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14265782
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Filing Dt:
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04/30/2014
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|
Publication #:
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|
Pub Dt:
|
08/21/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING BUMPS FORMED ON SEMICONDUCTOR DIE INTO PENETRABLE ADHESIVE LAYER TO REDUCE DIE SHIFTING DURING ENCAPSULATION
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Patent #:
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Issue Dt:
|
10/25/2016
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Application #:
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14267777
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Filing Dt:
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05/01/2014
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|
Publication #:
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|
Pub Dt:
|
08/28/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV
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Patent #:
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Issue Dt:
|
07/26/2016
|
Application #:
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14267800
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Filing Dt:
|
05/01/2014
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|
Publication #:
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|
Pub Dt:
|
08/28/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming a Vertical Interconnect Structure for 3-D FO-WLCSP
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|
Patent #:
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|
Issue Dt:
|
06/20/2017
|
Application #:
|
14268316
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Filing Dt:
|
05/02/2014
|
|
Publication #:
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|
Pub Dt:
|
08/28/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL AROUND BUMP INTERCONNECT
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Patent #:
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Issue Dt:
|
07/21/2015
|
Application #:
|
14274599
|
Filing Dt:
|
05/09/2014
|
|
Publication #:
|
|
Pub Dt:
|
09/04/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
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|
Patent #:
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|
Issue Dt:
|
07/18/2017
|
Application #:
|
14275213
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Filing Dt:
|
05/12/2014
|
|
Publication #:
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|
Pub Dt:
|
09/18/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Forming a Dual UBM Structure for Lead Free Bump Connections
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|
|
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|
Patent #:
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|
Issue Dt:
|
10/18/2016
|
Application #:
|
14284752
|
Filing Dt:
|
05/22/2014
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Repassivation Layer with Reduced Opening to Contact Pad of Semiconductor Die
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Patent #:
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Issue Dt:
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03/21/2017
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Application #:
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14288589
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Filing Dt:
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05/28/2014
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Publication #:
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Pub Dt:
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09/18/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING UBM STRUCTURE ON BACK SURFACE OF TSV SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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01/17/2017
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Application #:
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14289344
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Filing Dt:
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05/28/2014
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Publication #:
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Pub Dt:
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09/18/2014
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Title:
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Semiconductor Device and Method of Forming an Inductor on Polymer Matrix Composite Substrate
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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14292925
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Filing Dt:
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06/01/2014
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Publication #:
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Pub Dt:
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09/18/2014
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Title:
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Semiconductor Device Including RDL Along Sloped Side Surface of Semiconductor Die for Z-Direction Interconnect
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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14303484
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Filing Dt:
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06/12/2014
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Publication #:
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Pub Dt:
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10/02/2014
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Title:
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Semiconductor Device and Method of Forming Shielding Layer Over Active Surface of Semiconductor Die
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Patent #:
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Issue Dt:
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06/21/2016
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Application #:
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14305185
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Filing Dt:
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06/16/2014
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Publication #:
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Pub Dt:
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10/02/2014
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Title:
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SOLDER JOINT FLIP CHIP INTERCONNECTION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14321370
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Filing Dt:
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07/01/2014
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Publication #:
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Pub Dt:
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10/23/2014
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Title:
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Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer
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Patent #:
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Issue Dt:
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12/29/2015
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Application #:
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14326237
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Filing Dt:
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07/08/2014
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Publication #:
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Pub Dt:
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10/30/2014
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Title:
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Semiconductor Device and Method of Forming TMV and TSV in WLCSP Using Same Carrier
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Patent #:
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Issue Dt:
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01/09/2018
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Application #:
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14326789
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Filing Dt:
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07/09/2014
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Publication #:
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Pub Dt:
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10/30/2014
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Title:
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SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
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Patent #:
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Issue Dt:
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01/26/2016
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Application #:
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14328348
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Filing Dt:
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07/10/2014
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Publication #:
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Pub Dt:
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10/30/2014
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Title:
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STACKABLE PACKAGE BY USING INTERNAL STACKING MODULES
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Patent #:
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Issue Dt:
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10/03/2017
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Application #:
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14328922
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Filing Dt:
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07/11/2014
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Publication #:
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Pub Dt:
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10/30/2014
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Title:
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Semiconductor Device and Method of Forming Bump Structure with Insulating Buffer Layer to Reduce Stress on Semiconductor Wafer
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Patent #:
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Issue Dt:
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03/03/2020
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Application #:
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14329162
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Filing Dt:
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07/11/2014
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Publication #:
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Pub Dt:
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10/30/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH ROUTING DENSITY INTERCONNECT SITES ON SUBSTRATE
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Patent #:
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Issue Dt:
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09/20/2016
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Application #:
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14329464
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Filing Dt:
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07/11/2014
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Publication #:
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Pub Dt:
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04/30/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF BALANCING SURFACES OF AN EMBEDDED PCB UNIT WITH A DUMMY COPPER PATTERN
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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14330704
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Filing Dt:
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07/14/2014
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Publication #:
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Pub Dt:
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10/30/2014
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Title:
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Semiconductor Device and Method of Forming Stacked Semiconductor Die and Conductive Interconnect Structure Through an Encapsulant
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Patent #:
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Issue Dt:
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06/20/2017
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Application #:
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14331050
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Filing Dt:
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07/14/2014
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Publication #:
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Pub Dt:
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10/30/2014
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Title:
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Semiconductor Device and Method of Forming Shielding Layer Over Semiconductor Die Mounted to TSV Interposer
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Patent #:
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Issue Dt:
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05/02/2017
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Application #:
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14332631
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Filing Dt:
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07/16/2014
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Publication #:
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Pub Dt:
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11/06/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INDUCTOR OVER INSULATING MATERIAL FILLED TRENCH IN SUBSTRATE
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Patent #:
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Issue Dt:
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10/24/2017
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Application #:
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14334229
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Filing Dt:
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07/17/2014
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Publication #:
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Pub Dt:
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11/06/2014
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Title:
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Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
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Patent #:
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Issue Dt:
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08/16/2016
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Application #:
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14340187
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Filing Dt:
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07/24/2014
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Publication #:
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Pub Dt:
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11/13/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADHESIVE MATERIAL TO SECURE SEMICONDUCTOR DIE TO CARRIER IN WLCSP
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Patent #:
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Issue Dt:
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05/10/2016
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Application #:
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14340436
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Filing Dt:
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07/24/2014
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Publication #:
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Pub Dt:
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11/13/2014
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Title:
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Integrated Circuit Package System with Removable Backing Element Having Plated Terminal Leads and Method of Manufacture Thereof
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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14449869
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Filing Dt:
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08/01/2014
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Publication #:
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Pub Dt:
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11/20/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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06/06/2017
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Application #:
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14449914
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Filing Dt:
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08/01/2014
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Publication #:
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Pub Dt:
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02/12/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING WAFER LEVEL CHIP SCALE PACKAGE
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Patent #:
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Issue Dt:
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12/27/2016
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Application #:
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14462347
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Filing Dt:
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08/18/2014
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Publication #:
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Pub Dt:
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12/04/2014
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Title:
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Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
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Patent #:
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Issue Dt:
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01/26/2021
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Application #:
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14466923
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Filing Dt:
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08/22/2014
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Publication #:
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Pub Dt:
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12/11/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF USING LEADFRAME BODIES TO FORM OPENINGS THROUGH ENCAPSULANT FOR VERTICAL INTERCONNECT OF SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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01/31/2017
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Application #:
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14494508
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Filing Dt:
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09/23/2014
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Publication #:
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Pub Dt:
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01/08/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SACRIFICIAL PROTECTIVE LAYER TO PROTECT SEMICONDUCTOR DIE EDGE DURING SINGULATION
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Patent #:
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Issue Dt:
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10/03/2017
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Application #:
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14503086
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Filing Dt:
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09/30/2014
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Publication #:
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Pub Dt:
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02/26/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PAD LAYOUT FOR FLIPCHIP SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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08/11/2015
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Application #:
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14503698
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Filing Dt:
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10/01/2014
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Publication #:
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Pub Dt:
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02/26/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE OVER SEED LAYER ON CONTACT PAD OF SEMICONDUCTOR DIE WITHOUT UNDERCUTTING SEED LAYER BENEATH INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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12/01/2015
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Application #:
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14509785
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Filing Dt:
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10/08/2014
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Publication #:
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Pub Dt:
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01/22/2015
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Title:
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Semiconductor Device and Method of Forming Thermal Lid for Balancing Warpage and Thermal Management
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Patent #:
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Issue Dt:
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03/28/2017
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Application #:
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14512614
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Filing Dt:
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10/13/2014
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Publication #:
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Pub Dt:
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03/05/2015
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Title:
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Semiconductor Device and Method for Forming Openings and Trenches in Insulating Layer by First LDA and Second LDA for RDL Formation
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Patent #:
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Issue Dt:
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08/01/2017
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Application #:
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14514190
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Filing Dt:
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10/14/2014
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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01/31/2017
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Application #:
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14523556
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
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03/05/2015
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Title:
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Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-Applied Protective Layer
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Patent #:
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Issue Dt:
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02/28/2017
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Application #:
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14553358
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Filing Dt:
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11/25/2014
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Publication #:
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Pub Dt:
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04/30/2015
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Title:
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Semiconductor Device and Method of Forming a Shielding Layer Between Stacked Semiconductor Die
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Patent #:
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Issue Dt:
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07/19/2016
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Application #:
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14563448
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Filing Dt:
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12/08/2014
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration
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Patent #:
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Issue Dt:
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11/27/2018
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Application #:
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14566870
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Filing Dt:
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12/11/2014
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE VIAS THROUGH INTERCONNECT STRUCTURES AND ENCAPSULANT OF WLCSP
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Patent #:
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Issue Dt:
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06/13/2017
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Application #:
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14572298
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Filing Dt:
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12/16/2014
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Publication #:
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Pub Dt:
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04/09/2015
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Title:
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Semiconductor Device and Method of Forming Conductive Layer Over Substrate with Vents to Channel Bump Material and Reduce Interconnect Voids
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Patent #:
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Issue Dt:
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05/08/2018
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Application #:
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14596080
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Filing Dt:
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01/13/2015
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Publication #:
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Pub Dt:
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05/07/2015
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Title:
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Semiconductor Device and Method of Forming Interposer Frame Electrically Connected to Embedded Semiconductor Die
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