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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09789108
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Filing Dt:
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02/20/2001
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Title:
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PLACEMENT-BASED INTEGRATED CIRCUIT RE-SYNTHESIS TOOL USING ESTIMATED MAXIMUM INTERCONNECT CAPACITANCES
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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09790088
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Filing Dt:
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02/20/2001
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Title:
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INSTALLATION AND ACCESS OF A DEVICE HANDLER FOR A PERIPHERAL DEVICE IN A COMPUTER
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09790821
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Filing Dt:
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02/22/2001
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Publication #:
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Pub Dt:
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06/28/2001
| | | | |
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Title:
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PROCESS FOR MAKING INTEGRATED CIRCUIT STRUCTURE WITH THIN DIELECTRIC BETWEEN AT LEAST LOCAL INTERCONNECT LEVEL AND FIRST METAL INTERCONNECT LEVEL
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09792100
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Filing Dt:
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02/23/2001
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Title:
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VERSATILE WRITE BUFFER FOR A MICROPROCESSOR AND METHOD USING SAME
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09792321
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Filing Dt:
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02/23/2001
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Title:
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METHOD OF PROTECTING ACID-CATALYZED PHOTORESIST FROM CHIP-GENERATED BASIC CONTAMINANTS
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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09792683
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Filing Dt:
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02/23/2001
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Publication #:
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Pub Dt:
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08/29/2002
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Title:
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PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL
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Patent #:
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Issue Dt:
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02/22/2005
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Application #:
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09792685
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Filing Dt:
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02/23/2001
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Publication #:
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Pub Dt:
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08/29/2002
| | | | |
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Title:
|
PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09792691
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Filing Dt:
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02/23/2001
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Publication #:
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Pub Dt:
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08/29/2002
| | | | |
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Title:
|
PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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09795767
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Filing Dt:
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02/28/2001
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Title:
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SYSTEM AND METHOD FOR MEASURING BUS FREQUENCY
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Patent #:
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Issue Dt:
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10/14/2003
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Application #:
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09795770
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Filing Dt:
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02/28/2001
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Title:
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PCI-X BUS SYSTEM TESTING AND VERIFICATION APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09800532
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Filing Dt:
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03/06/2001
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Title:
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METHOD FOR MINIMIZING CLOCK SKEW FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09801392
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Filing Dt:
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03/07/2001
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Title:
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CELL INTERCONNECT DELAY LIBRARY FOR INTEGRATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09802043
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Filing Dt:
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03/08/2001
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Title:
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GRIDLESS ROUTER USING MAZE AND LINE PROBE TECHNIQUES
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09802198
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Filing Dt:
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03/08/2001
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Title:
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BUILT-IN-SELF REPAIR CIRCUITRY UTILIZING PERMANENT RECORD OF DEFECTS
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09802424
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Filing Dt:
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03/09/2001
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Title:
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SUBSTRATE PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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02/12/2002
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Application #:
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09804118
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Filing Dt:
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03/12/2001
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Title:
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Integrated circuit having radially varying power bus grid architecture
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09804783
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Filing Dt:
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03/13/2001
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Publication #:
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Pub Dt:
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09/19/2002
| | | | |
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Title:
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METAL PLANARIZATION SYSTEM
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09804939
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Filing Dt:
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03/13/2001
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Title:
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CHANNEL ROUTER WITH BUFFER INSERTION
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Patent #:
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Issue Dt:
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12/17/2002
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Application #:
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09805642
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Filing Dt:
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03/13/2001
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Title:
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METHOD OF DATAPATH CELL PLACEMENT FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09808441
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Filing Dt:
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03/14/2001
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Title:
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POWER MESH BRIDGE
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09808510
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Filing Dt:
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03/14/2001
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Title:
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METHOD FOR ESTIMATING POROSITY OF HARDMACS
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09808549
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Filing Dt:
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03/14/2001
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Title:
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FULL-CHIP EXTRACTION OF INTERCONNECT PARASITIC DATA
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Patent #:
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Issue Dt:
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01/18/2005
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Application #:
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09814417
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Filing Dt:
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03/21/2001
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Title:
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DRIVER WAVEFORM MODELING WITH MULTIPLE EFFECTIVE CAPACITANCES
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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09815519
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Filing Dt:
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03/23/2001
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Title:
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BUILT-IN SELF TEST FOR SPEED AND TIMING MARGIN FOR A SOURCE SYNCHRONOUS IO INTER FACE
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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09815987
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Filing Dt:
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03/22/2001
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Publication #:
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Pub Dt:
|
11/28/2002
| | | | |
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Title:
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MINIMAL LATENCY SERIAL MEDIA INDEPENDENT INTERFACE TO MEDIA INDEPENDENT INTERFACE CONVERTER
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Patent #:
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Issue Dt:
|
11/05/2002
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Application #:
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09817642
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Filing Dt:
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03/26/2001
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Title:
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CONCENTRIC METAL DENSITY POWER ROUTING
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09820059
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Filing Dt:
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03/28/2001
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Title:
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DISTRIBUTION DEPENDENT CLUSTERING IN BUFFER INSERTION OF HIGH FANOUT NETS
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Patent #:
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Issue Dt:
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01/24/2006
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Application #:
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09820477
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Filing Dt:
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03/28/2001
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Title:
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DATA PACKET CONGESTION MANAGEMENT TECHNIQUE
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09820577
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Filing Dt:
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03/28/2001
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Title:
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SOURCE PULSED, LOW VOLTAGE CMOS SRAM CELL FOR FAST, STABLE OPERATION
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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09821226
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Filing Dt:
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03/28/2001
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Title:
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JTAG TEST ACCESS PORT CONTROLLER USED TO CONTROL INPUT/OUTPUT PAD FUNCTIONALITY
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Patent #:
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Issue Dt:
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09/06/2005
|
Application #:
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09821555
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Filing Dt:
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03/28/2001
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Title:
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ADAPTIVE NOISE CANCELLATION (ANC) FOR DVD SYSTEMS
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Patent #:
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Issue Dt:
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12/20/2005
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Application #:
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09821886
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Filing Dt:
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03/30/2001
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Title:
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DIGITAL CLOCK RECOVERY PPL
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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09822041
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Filing Dt:
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03/30/2001
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Title:
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DIGITAL CLOCK RECOVERY PLL
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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09822112
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Filing Dt:
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03/30/2001
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Title:
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DIGITAL CLOCK RECOVERY PLL
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09822665
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Filing Dt:
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03/30/2001
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Title:
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GRANT REMOVAL VIA DUMMY MASTER ARBITRATION
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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09822969
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Filing Dt:
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03/30/2001
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Title:
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EDITING PROTOCOL FOR FLEXIBLE SEARCH ENGINES
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09823184
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Filing Dt:
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03/29/2001
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Title:
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METHOD OF DATAPATH CELL PLACEMENT FOR BITWISE AND NON-BITWISE INTEGRATED CIRCUIT DESIGNS
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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09823852
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Filing Dt:
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03/29/2001
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Publication #:
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Pub Dt:
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11/08/2001
| | | | |
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Title:
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HIGH DENSITY ANALOG RECORDING USING WRITE SYMBOLS HAVING DISTINGUISHABLE READOUT WAVEFORMS
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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09827434
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Filing Dt:
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04/06/2001
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Title:
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WIRE DELAY DISTRIBUTED MODEL
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09827992
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Filing Dt:
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04/05/2001
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Publication #:
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Pub Dt:
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10/11/2001
| | | | |
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Title:
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MICROPROCESSOR EMPLOYING BRANCH INSTRUCTION TO SET COMPRESSION MODE
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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09828311
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Filing Dt:
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04/06/2001
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Title:
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DIGITAL AUTOMATIC GAIN CONTROL OF A MULTILEVEL OPTICAL DISC READ SIGNAL
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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09828553
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Filing Dt:
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04/05/2001
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Title:
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BUFFER CELL INSERTION AND ELECTRONIC DESIGN AUTOMATION
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09829373
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Filing Dt:
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04/09/2001
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Title:
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APPARATUS AND METHOD FOR SYSTEM ACCESS TO TAP CONTROLLED BIST OF RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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12/04/2001
|
Application #:
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09829377
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Filing Dt:
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04/09/2001
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Title:
|
Synchronizing data operations across a synchronization boundary between different clock domains using two-hot encoding
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09833142
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Filing Dt:
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04/11/2001
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Title:
|
PROCESS FOR SOLVING ASSIGNMENT PROBLEMS IN INTEGRATED CIRCUIT DESIGNS WITH UNIMODAL OBJECT PENALTY FUNCTIONS AND LINEARLY ORDERED SET OF BOXES
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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09834013
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Filing Dt:
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04/12/2001
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Title:
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BUS SEQUENCE OPERATION WITH AUTOMATIC LINKING FROM CURRENT I/O INFORMATION TO SUBSEQUENT I/O INFORMATION
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Patent #:
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Issue Dt:
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01/13/2004
|
Application #:
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09834368
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Filing Dt:
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04/13/2001
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Title:
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WRITE-AHEAD LOG IN DIRECTORY MANAGEMENT FOR CONCURRENT I/O ACCESS FOR BLOCK STORAGE
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09836075
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Filing Dt:
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04/16/2001
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Publication #:
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Pub Dt:
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07/25/2002
| | | | |
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Title:
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DIRECT MEMORY ACCESSING
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Patent #:
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Issue Dt:
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07/22/2003
|
Application #:
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09836129
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Filing Dt:
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04/16/2001
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Title:
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STATIC TIMING ANALYSIS VALIDATION TOOL FOR ASIC CORES
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Patent #:
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Issue Dt:
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08/03/2004
|
Application #:
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09836895
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Filing Dt:
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04/17/2001
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Title:
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SCSI PHASE SPECIFIC BUS RESET GENERATOR
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Patent #:
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Issue Dt:
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02/25/2003
|
Application #:
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09837492
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Filing Dt:
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04/18/2001
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Title:
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CHIP CORE SIZE ESTIMATION
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Patent #:
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Issue Dt:
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08/10/2004
|
Application #:
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09838784
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Filing Dt:
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04/19/2001
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Title:
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BANDWIDTH MANAGEMENT
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Patent #:
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Issue Dt:
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12/17/2002
|
Application #:
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09839441
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Filing Dt:
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04/20/2001
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Publication #:
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Pub Dt:
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10/24/2002
| | | | |
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Title:
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METHOD AND APPARATUS FOR GENERATING AND CONTROLLING INTEGRATED CIRCUIT MEMORY WRITE SIGNALS
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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09839897
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Filing Dt:
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04/20/2001
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Publication #:
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Pub Dt:
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10/24/2002
| | | | |
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Title:
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METHOD AND APPARATUS FOR IMPLEMENTING LOW LATENCY CROSSBAR SWITCHES WITH INTEGRATED STORAGE SIGNALS
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09839925
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Filing Dt:
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04/20/2001
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Title:
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CONTACT ESCAPE PATTERN
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Patent #:
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Issue Dt:
|
10/21/2003
|
Application #:
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09841824
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Filing Dt:
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04/25/2001
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Title:
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ASSIGNMENT OF CELL COORDINATES
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09841825
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Filing Dt:
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04/25/2001
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Title:
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TIMING RECOMPUTATION
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09842214
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Filing Dt:
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04/25/2001
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Publication #:
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Pub Dt:
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11/14/2002
| | | | |
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Title:
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METHOD OF FABRICATING SUB-MICRON HEMISPHERICAL AND HEMICYLIDRICAL STRUCTURES FROM NON-SPHERICALLY SHAPED TEMPLATES
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09842350
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Filing Dt:
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04/25/2001
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Publication #:
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Pub Dt:
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10/31/2002
| | | | |
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Title:
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PARALLELIZATION OF RESYNTHESIS
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09843443
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Filing Dt:
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04/26/2001
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Title:
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DUAL CHIP IN PACKAGE WITH A WIRE BONDED DIE MOUNTED TO A SUBSTRATE
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09844299
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Filing Dt:
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04/26/2001
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Title:
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SUPPLY DEGRADATION COMPENSATION FOR MEMORY SELF TIME CIRCUITS
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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09844352
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Filing Dt:
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04/27/2001
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Title:
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IN SITU LINER BARRIER
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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09844361
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Filing Dt:
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04/27/2001
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Title:
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DENSITY DRIVEN ASSIGNMENT OF COORDINATES
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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09844531
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Filing Dt:
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04/27/2001
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Title:
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ANALOG CAPACITOR DUAL DAMASCENE PROCESS
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09845909
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Filing Dt:
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04/30/2001
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Title:
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METHOD AND APPARATUS FOR LOADING/STORING MULTIPLE DATA SOURCES TO COMMON MEMORY UNIT
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Patent #:
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Issue Dt:
|
08/13/2002
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Application #:
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09846435
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Filing Dt:
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05/01/2001
|
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Title:
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TEST FIXTURE FOR FLIP CHIP BALL GRID ARRAY CIRCUITS
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Patent #:
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Issue Dt:
|
12/31/2002
|
Application #:
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09847460
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Filing Dt:
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05/02/2001
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Title:
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CIRCUIT MODELING
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Patent #:
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Issue Dt:
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03/04/2003
|
Application #:
|
09847838
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Filing Dt:
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04/30/2001
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Publication #:
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Pub Dt:
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10/31/2002
| | | | |
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Title:
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RTL ANNOTATION TOOL FOR LAYOUT INDUCED NETLIST CHANGES
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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09847848
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Filing Dt:
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04/30/2001
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Title:
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PARAMETERIZABLE QUEUED MEMORY ACCESS SYSTEM
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Patent #:
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Issue Dt:
|
12/10/2002
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Application #:
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09848489
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Filing Dt:
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05/03/2001
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Title:
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METHOD AND APPARATUS FOR INDENTIFYING CAUSES OF POOR SILICON-TO-SIMULATION CORRELATION
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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09848569
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Filing Dt:
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05/02/2001
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Title:
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METHOD AND APPARATUS FOR PROCESSING CHAIN MESSAGES (SGL CHAINING)
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Patent #:
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Issue Dt:
|
01/07/2003
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Application #:
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09848758
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Filing Dt:
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05/02/2001
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Publication #:
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Pub Dt:
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11/07/2002
| | | | |
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Title:
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PROCESS FOR FORMING METAL-FILLED OPENINGS IN LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL WHILE INHIBITING VIA POISONING
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Patent #:
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Issue Dt:
|
12/31/2002
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Application #:
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09848942
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Filing Dt:
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05/04/2001
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Title:
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HIGH SPEED INPUT BUFFER CIRCUIT
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Patent #:
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Issue Dt:
|
09/16/2003
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Application #:
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09849640
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Filing Dt:
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05/04/2001
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Title:
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CONTROL CIRCUIT FOR POWER
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Patent #:
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Issue Dt:
|
07/11/2006
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Application #:
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09849691
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Filing Dt:
|
05/04/2001
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Title:
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MINIMAL BENDS CONNECTION MODELS FOR WIRE DENSITY CALCULATION
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Patent #:
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Issue Dt:
|
11/26/2002
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Application #:
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09849919
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Filing Dt:
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05/04/2001
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Title:
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PROCESS, APPARATUS AND PROGRAM FOR TRANSFORMING PROGRAM LANGUAGE DESCRIPTION OF AN IC TO AN RTL DESCRIPTION
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Patent #:
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Issue Dt:
|
04/12/2005
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Application #:
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09850865
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Filing Dt:
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05/08/2001
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Title:
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PIPELINED PROCESSOR AND METHOD USING A PROFILE REGISTER STORING THE RETURN FROM EXCEPTION ADDRESS OF AN EXECUTED INSTRUCTION SUPPLIED BY AN EXCEPTION PROGRAM COUNTER CHAIN FOR CODE PROFILING
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Patent #:
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Issue Dt:
|
05/09/2006
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Application #:
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09851181
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Filing Dt:
|
05/08/2001
|
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Title:
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APPLICATION SPECIFIC INTEGRATED CIRCUIT HAVING A PROGRAMMABLE LOGIC CORE AND A METHOD OF OPERATION THEREOF
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|
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Patent #:
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|
Issue Dt:
|
11/18/2008
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Application #:
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09851504
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Filing Dt:
|
05/08/2001
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|
Title:
|
FIELD PROGRAMMABLE NETWORK APPLICATION SPECIFIC INTEGRATED CIRCUIT AND A METHOD OF OPERATION THEREOF
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|
|
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Patent #:
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Issue Dt:
|
12/02/2003
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Application #:
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09851712
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Filing Dt:
|
05/09/2001
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|
Publication #:
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Pub Dt:
|
07/18/2002
| | | | |
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Title:
|
BURST SIGNAL GENERATION FOR PIPELINED ACCESS TO AMBA BUS
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Patent #:
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Issue Dt:
|
10/05/2004
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Application #:
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09851860
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Filing Dt:
|
05/09/2001
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Publication #:
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Pub Dt:
|
07/04/2002
| | | | |
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Title:
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BIT REDUCTION USING DITHER, ROUNDING AND ERROR FEEDBACK
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|
|
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Patent #:
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Issue Dt:
|
09/16/2003
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Application #:
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09852437
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Filing Dt:
|
05/10/2001
|
|
Title:
|
BUS SNOOPING FOR CACHE COHERENCY FOR A BUS WITHOUT BUILT-IN BUS SNOOPING CAPABILITIES
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|
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Patent #:
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Issue Dt:
|
08/03/2004
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Application #:
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09853562
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Filing Dt:
|
05/11/2001
|
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Title:
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DATA TIMELINE MANAGEMENT USING SNAPSHOT VOLUMES
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|
|
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Patent #:
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|
Issue Dt:
|
01/14/2003
|
Application #:
|
09858166
|
Filing Dt:
|
05/15/2001
|
|
Title:
|
NET DELAY OPTIMIZATION WITH RAMPTIME VIOLATION REMOVAL
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|
|
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Patent #:
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|
Issue Dt:
|
03/01/2005
|
Application #:
|
09858686
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Filing Dt:
|
05/15/2001
|
|
Title:
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MINIMUM METAL CONSUMPTION POWER DISTRIBUTION NETWORK ON A BONDED DIE
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|
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Patent #:
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|
Issue Dt:
|
07/01/2003
|
Application #:
|
09859149
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Filing Dt:
|
05/15/2001
|
|
Title:
|
MODELING DELAYS FOR SMALL NETS IN AN INTEGRATED CIRCUIT DESIGN
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|
|
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Patent #:
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Issue Dt:
|
07/08/2003
|
Application #:
|
09859880
|
Filing Dt:
|
05/17/2001
|
|
Publication #:
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Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
HEXADECAGONAL ROUTING
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/23/2005
|
Application #:
|
09860149
|
Filing Dt:
|
05/17/2001
|
|
Publication #:
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|
Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
PROGRAMMABLE COUNTERS FOR SETTING BUS ARBITRATION DELAYS INVOLVES COUNTING CLOCK CYCLES EQUAL TO A COUNT NUMBER LOADED FROM A MEMORY
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|
|
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Patent #:
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|
Issue Dt:
|
08/31/2004
|
Application #:
|
09862000
|
Filing Dt:
|
05/04/2001
|
|
Title:
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PREFIX COMPARATOR
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|
|
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|
Patent #:
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|
Issue Dt:
|
12/16/2003
|
Application #:
|
09862045
|
Filing Dt:
|
05/21/2001
|
|
Title:
|
IDDQ TEST METHODOLOGY BASED ON THE SENSITIVITY OF FAULT CURRENT TO POWER SUPPLY VARIATIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
09862261
|
Filing Dt:
|
05/21/2001
|
|
Publication #:
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|
Pub Dt:
|
07/25/2002
| | | | |
|
Title:
|
CYCLIC BUFFER FOR INFRARED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
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Application #:
|
09862531
|
Filing Dt:
|
05/22/2001
|
|
Publication #:
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Pub Dt:
|
06/13/2002
| | | | |
|
Title:
|
APPARATUS AND METHOD FOR DETECTING A PREDETERMINED PATTERN OF BITS IN A BITSTREAM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
09863736
|
Filing Dt:
|
05/22/2001
|
|
Publication #:
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Pub Dt:
|
05/16/2002
| | | | |
|
Title:
|
DEVICE AND METHOD FOR EFFICIENT DECODING WITH TIME REVERSED DATA
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
09863744
|
Filing Dt:
|
05/23/2001
|
|
Publication #:
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Pub Dt:
|
07/18/2002
| | | | |
|
Title:
|
APPARATUS AND METHOD OF INTERRUPT DETECTION IN AN OPTICAL DISC ENVIRONMENT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2003
|
Application #:
|
09864760
|
Filing Dt:
|
05/24/2001
|
|
Title:
|
MESSAGE INDEX DESCRIPTOR
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
|
09865900
|
Filing Dt:
|
05/25/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
|
Title:
|
SELF ALIGNED GATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
09866525
|
Filing Dt:
|
05/25/2001
|
|
Title:
|
LINE INTERFACE, APPARATUS AND METHOD FOR COUPLING TRANSCEIVER AND TRANSMISSION LINE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
09866661
|
Filing Dt:
|
05/30/2001
|
|
Title:
|
RTL CODE OPTIMIZATION FOR RESOURCE SHARING STRUCTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
09867052
|
Filing Dt:
|
05/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR REDUCING NOISE IN A TRACKING ERROR SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2005
|
Application #:
|
09870136
|
Filing Dt:
|
05/30/2001
|
|
Title:
|
MULTI-CHANNEL INTERFACE CONTROLLER FOR ENABLING A HOST TO INTERFACE WITH ONE OR MORE HOST DEVICES
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|
