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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09870851
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Filing Dt:
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05/30/2001
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Title:
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SLOPED SIDEWALL VIA FOR INTEGRATED CIRCUIT STRUCTURE TO SUPPRESS VIA POISONING AND PROCESS FOR FORMING SAME
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09870949
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Filing Dt:
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05/31/2001
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Title:
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METHOD AND APPARATUS FOR TESTING HIGH FREQUENCY DELAY LOCKED LOOPS
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09871023
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Filing Dt:
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05/31/2001
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Title:
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PROGRAMMABLE SELF TIME CIRCUITRY FOR MEMORIES
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09871129
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Filing Dt:
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05/31/2001
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Title:
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IC TIMING ANALYSIS WITH KNOWN FALSE PATHS
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Patent #:
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Issue Dt:
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01/27/2004
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Application #:
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09871177
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Filing Dt:
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05/31/2001
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Title:
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OUT OF ORDER EXECUTION MEMORY ACCESS REQUEST FIFO
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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09872058
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Filing Dt:
|
05/31/2001
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Title:
|
PROCESS FOR FORMING A LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL ON AN INTEGRATED CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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09872246
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Filing Dt:
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05/31/2001
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Title:
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DYNAMIC BREAK LOOP FOR CLOSED LOOP UNMANAGED STACKING SWITCHES
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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09872486
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Filing Dt:
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05/31/2001
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Title:
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CREATION OF SYNCHRONIZATION MARKS IN MULTILEVEL OPTICAL DATA STORAGE
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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09872582
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Filing Dt:
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06/04/2001
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Title:
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TESTING IMPLEMENTATION SUITABLE FOR BUILT-IN SELF-REPAIR (BISR) MEMORIES
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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09872643
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Filing Dt:
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06/01/2001
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Title:
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METHOD TO PROTECT AND RECOVER A WRITE AHEAD LOG FROM INTERRUPTIONS
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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09872661
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Filing Dt:
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06/01/2001
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Title:
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METHOD AND APPARATUS FOR PERFORMING EFFICIENT RESEEKS IN AN OPTICAL STORAGE DEVICE
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Patent #:
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Issue Dt:
|
11/11/2003
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Application #:
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09872883
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Filing Dt:
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06/01/2001
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Title:
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ADDRESS TRANSLATION CIRCUIT FOR PROCESSORS UTILIZING A SINGLE CODE IMAGE
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09875314
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Filing Dt:
|
06/04/2001
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Title:
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METHOD OF CLOCK BUFFER PARTITIONING TO MINIMIZE CLOCK SKEW FOR AN INTEGRATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
|
08/27/2002
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Application #:
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09876736
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Filing Dt:
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06/06/2001
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Title:
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METHOD OF GENERATING AN OPTIMAL CLOCK BUFFER SET FOR MINIMIZING CLOCK SKEW IN BALANCED CLOCK TREES
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Patent #:
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Issue Dt:
|
05/14/2002
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Application #:
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09876749
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Filing Dt:
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06/06/2001
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Publication #:
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Pub Dt:
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11/15/2001
| | | | |
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Title:
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ON-CHIP SINGLE LAYER HORIZONTAL DEFLECTING WAVEGUIDE AND DAMASCENE METHOD OF FABRICATING THE SAME
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09876854
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Filing Dt:
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06/07/2001
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Publication #:
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Pub Dt:
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11/29/2001
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Title:
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PROGRAMMABLE WRITE SIGNAL GENERATOR
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09878142
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Filing Dt:
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06/08/2001
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Title:
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LINE DRIVER FOR ASYMMETRIC DIGITAL SUBSCRIBER LINE SYSTEM
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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09878499
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Filing Dt:
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06/11/2001
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Title:
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HARD MACRO HAVING AN ANTENNA RULE VIOLATION FREE INPUT/OUTPUT PORTS
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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09878594
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Filing Dt:
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06/11/2001
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Title:
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BLOCK MOVE ENGINE WITH MACROBLOCK ADDRESSING MODES
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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09878604
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Filing Dt:
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06/11/2001
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Title:
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MULTI-STAGE FILTER CIRCUIT AND DIGITAL SIGNAL PROCESSING CIRCUIT EMPLOYING THE SAME
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09878741
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Filing Dt:
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06/11/2001
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Title:
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OPTICAL INTENSITY MODIFIER
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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09878820
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Filing Dt:
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06/11/2001
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Publication #:
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Pub Dt:
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12/12/2002
| | | | |
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Title:
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PLASMA TREATMENT SYSTEM
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09879297
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Filing Dt:
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06/12/2001
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Title:
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RTL BACK ANNOTATOR
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Patent #:
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Issue Dt:
|
09/02/2003
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Application #:
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09879380
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Filing Dt:
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06/12/2001
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Title:
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OPTIMAL CLOCK TIMING SCHEDULE FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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09879416
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Filing Dt:
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06/12/2001
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Title:
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DELAY-LOCKED LOOP WITH BUILT-IN SELF-TEST OF PHASE MARGIN
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09879417
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Filing Dt:
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06/12/2001
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Title:
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METHOD OF ANALYZING STATIC CURRENT TEST VECTORS WITH REDUCED FILE SIZES FOR SEMICONDUCTOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09879506
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Filing Dt:
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06/12/2001
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Title:
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METHOD OF ANALYZING STATIC CURRENT TEST VECTORS FOR SEMICONDUCTOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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12/17/2002
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Application #:
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09879642
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Filing Dt:
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06/12/2001
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Title:
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METHOD AND APPRATUS FOR REMOVING PHOTORESIST EDGE BEADS FROM THIN FILM SUBSTRATES
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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09879643
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Filing Dt:
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06/12/2001
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Title:
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PROCESS FOR FAST CELL PLACEMENT IN INTEGRATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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09879664
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Filing Dt:
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06/12/2001
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Title:
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MASK CORRECTION FOR PHOTOLITHOGRAPHIC PROCESSES
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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09879783
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Filing Dt:
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06/12/2001
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Title:
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COMPOSITION WITH EMC SHIELDING CHARACTERISTICS
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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09879824
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Filing Dt:
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06/11/2001
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Title:
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METHOD AND APPARATUS FOR CONTROLLING OSCILLATION AMPLITUDE AND OSCILLATION FREQUENCY OF CRYSTAL OSCILLATOR
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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09879841
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Filing Dt:
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06/12/2001
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Title:
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METHOD AND APPARATUS FOR OPTIMIZING THE TIMING OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09879845
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Filing Dt:
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06/12/2001
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Title:
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EPSILON-DISCREPANT SELF-TEST TECHNIQUE
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Patent #:
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Issue Dt:
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08/26/2003
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Application #:
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09879846
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Filing Dt:
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06/12/2001
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Title:
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MASK CORRECTION OPTIMIZATION
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Patent #:
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Issue Dt:
|
05/11/2004
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Application #:
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09880283
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Filing Dt:
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06/13/2001
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Publication #:
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Pub Dt:
|
07/18/2002
| | | | |
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Title:
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APPARATUS AND METHOD PROVIDING A MIRROR AVERAGING FUNCTION TO GENERATE A MIRROR SIGNAL FROM OPTICAL DATA ON AN OPTICAL DISC
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Patent #:
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Issue Dt:
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08/08/2006
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Application #:
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09880291
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Filing Dt:
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06/13/2001
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Title:
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TRIPLE CONVERSION RF TUNER WITH SYNCHRONOUS LOCAL OSCILLATORS
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Patent #:
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Issue Dt:
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06/11/2002
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Application #:
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09880491
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Filing Dt:
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06/13/2001
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Title:
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LOW POWER HIGH DENSITY ASYNCHRONOUS MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09880492
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Filing Dt:
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06/13/2001
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Title:
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METHOD AND/OR ARCHITECTURE FOR IMPLEMENTING A VARIABLE GAIN AMPLIFIER CONTROL
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09880607
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Filing Dt:
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06/12/2001
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Title:
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GENERATING STANDARD DELAY FORMAT FILES WITH CONDITIONAL PATH DELAY FOR DESIGNING INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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09880675
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Filing Dt:
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06/13/2001
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Title:
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SCAN METHOD FOR BUILT-IN-SELF-REPAIR (BISR)
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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09881151
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Filing Dt:
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06/14/2001
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Title:
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CONVERTER DEVICE
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09881365
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Filing Dt:
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06/14/2001
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Title:
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FEEDBACK CONTROL OF CLOCK DUTY CYCLE
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Patent #:
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Issue Dt:
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09/02/2003
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Application #:
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09881512
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Filing Dt:
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06/14/2001
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Publication #:
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Pub Dt:
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11/29/2001
| | | | |
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Title:
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EFFICIENT IMPLEMENTATION OF FIRST-IN-FIRST-OUT MEMORIES FOR MULTI-PROCESSOR SYSTEMS
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09881570
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Filing Dt:
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06/13/2001
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Title:
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SWITCHED-CAPACITOR DAC/CONTINOUS-TIME RECONSTRUCTION FILTER INTERFACE CIRCUIT
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Patent #:
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Issue Dt:
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01/31/2006
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Application #:
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09881584
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Filing Dt:
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06/14/2001
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Title:
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SYSTEM AND METHOD FOR DATA VERIFICATION IN A RAID SYSTEM
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Patent #:
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Issue Dt:
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08/19/2003
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Application #:
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09882114
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Filing Dt:
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06/15/2001
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Title:
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METHOD OF CONTROL CELL PLACEMENT TO MINIMIZE CONNECTION LENGTH AND CELL DELAY
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09882124
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Filing Dt:
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06/14/2001
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Title:
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PROCESS FOR SELECTIVE POLISHING OF METAL-FILLED TRENCHES OF INTEGRATED CIRCUIT STRUCTURES
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09882404
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Filing Dt:
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06/12/2001
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Title:
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FUSE CONSTRUCTION FOR INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09882497
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Filing Dt:
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06/15/2001
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Title:
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AMPLIFIER CIRCUIT FOR LINE DRIVER
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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09882499
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Filing Dt:
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06/15/2001
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Title:
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AMPLIFIER AND LINE DRIVER FOR BROADBAND COMMUNICATIONS
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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09882786
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Filing Dt:
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06/15/2001
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Title:
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TESTING IMPLEMENTATION FOR SIGNAL CHARACTERIZATION
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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09882899
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Filing Dt:
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06/15/2001
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Title:
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METHOD FOR REDUCING SIMULATION OVERHEAD FOR EXTERNAL MODELS
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09882977
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Filing Dt:
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06/15/2001
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Title:
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DESIGN SIMPLICITY OF VERY HIGH-SPEED SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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09883139
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Filing Dt:
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06/15/2001
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Title:
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METHOD TO SUPPORT GENERAL ENCLOSURE WIRING WHEN ASSOCIATING SES DATA WITH PHYSICAL DEVICE ON A FIBER CHANNEL LOOP WITH SOFT ADDRESSES
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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09883141
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Filing Dt:
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06/15/2001
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Title:
|
DATA STORAGE SYSTEM AND METHOD FOR MANAGING CRITICAL DATA IN AN N-WAY MIRRORED STORAGE DEVICE USING FIRST AND SECOND SEQUENCE NUMBERS
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Patent #:
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Issue Dt:
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01/13/2004
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Application #:
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09883142
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Filing Dt:
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06/15/2001
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Title:
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SYSTEM AND METHOD FOR READING AND WRITING N-WAY MIRRORED STORAGE DEVICES
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Patent #:
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Issue Dt:
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05/23/2006
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Application #:
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09883733
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Filing Dt:
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06/18/2001
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Title:
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PSEUDO-RANDOM ONE-TO-ONE CIRCUIT SYNTHESIS
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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09883761
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Filing Dt:
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06/18/2001
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Publication #:
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Pub Dt:
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06/27/2002
| | | | |
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Title:
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METHOD AND APPARATUS FOR ESTIMATION OF ERROR IN DATA RECOVERY SCHEMES
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09884327
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Filing Dt:
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06/19/2001
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Title:
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INVERTING LEVEL SHIFTER WITH START-UP CIRCUIT
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09884711
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Filing Dt:
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06/18/2001
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Title:
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UNIVERSAL TEST COUPON FOR PERFORMING PREQUALIFICATION TESTS ON SUBSTRATES
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Patent #:
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Issue Dt:
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08/16/2005
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Application #:
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09884736
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Filing Dt:
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06/19/2001
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Title:
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PLASMA TREATMENT OF LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL TO FORM STRUCTURES USEFUL IN FORMATION OF METAL INTERCONNECTS AND/OR FILLED VIAS FOR INTEGRATED CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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09884805
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Filing Dt:
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06/18/2001
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Publication #:
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Pub Dt:
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11/01/2001
| | | | |
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Title:
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CONFINEMENT DEVICE FOR USE IN DRY ETCHING OF SUBSTRATE SURFACE AND METHOD OF DRY ETCHING A WAFER SURFACE
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09885299
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Filing Dt:
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06/20/2001
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Title:
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HIGH DENSITY SIGNAL ROUTING
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09885491
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Filing Dt:
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06/20/2001
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Title:
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SPLITTING AND ASSIGNING POWER PLANES
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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09885497
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Filing Dt:
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06/19/2001
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Title:
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METHOD OF SHALLOW TRENCH ISOLATION FORMATION AND PLANARIZATION
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Patent #:
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Issue Dt:
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04/15/2003
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Application #:
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09885589
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Filing Dt:
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06/19/2001
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Title:
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METHOD IN INTEGRATING CLOCK TREE SYNTHESIS AND TIMING OPTIMIZATION FOR AN INTEGRATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09885596
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Filing Dt:
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06/19/2001
|
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Title:
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METHOD OF GLOBAL PLACEMENT OF CONTROL CELLS AND HARDMAC PINS IN A DATAPATH MACRO FOR AN INTEGRATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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09885687
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Filing Dt:
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06/19/2001
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Title:
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SEMICONDUCTOR DEVICE PACKAGE SUBSTRATE PROBE FIXTURE
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09885896
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Filing Dt:
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06/20/2001
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Title:
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MODULAR COLLECTION OF SPARE GATES FOR USE IN HIERARCHICAL INTEGRATED CIRCUIT DESIGN PROCESS
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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09887131
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Filing Dt:
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06/22/2001
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Title:
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PROCESS INDEPENDENT ALIGNMENT MARKS
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09887838
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Filing Dt:
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06/22/2001
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Publication #:
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Pub Dt:
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03/14/2002
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Title:
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TRANSCONDUCTANCE CONTINUOUS TIME FILTER CIRCUIT
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09888207
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Filing Dt:
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06/22/2001
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Title:
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POWER SEQUENCE PROTECTION FOR A LEVEL SHIFTER
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Patent #:
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Issue Dt:
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06/08/2004
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Application #:
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09888302
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Filing Dt:
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06/21/2001
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Title:
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WAFER HOLDER FOR BACKSIDE VIEWING FRONTSIDE PROBING ON AUTOMATED WAFER PROBE STATIONS
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09888866
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Filing Dt:
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06/25/2001
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Title:
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HIGH SPEED TCP/IP STACK IN SILICON
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09891648
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Filing Dt:
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06/26/2001
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Title:
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METHOD TO REDUCE POWER BUS TRANSIENTS IN SYNCHRONOUS INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09892241
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Filing Dt:
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06/26/2001
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Title:
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METHOD OF CONTROL CELL PLACEMENT FOR DATAPATH MACROS IN INTEGRATED CIRCUIT DESIGNS
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09892250
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Filing Dt:
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06/27/2001
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Title:
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PROCESS FOR FORMING INTEGRATED CIRCUIT STRUCTURE WITH LOW DIELECTRIC CONSTANT MATERIAL BETWEEN CLOSELY SPACED APART METAL LINES
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09894618
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Filing Dt:
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06/27/2001
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Title:
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TIMING DRIVEN INTERCONNECT ANALYSIS
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09894643
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Filing Dt:
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06/27/2001
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Title:
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MASK-PROGRAMMABLE ROM CELL
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Patent #:
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Issue Dt:
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08/26/2003
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Application #:
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09895668
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Filing Dt:
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06/29/2001
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Title:
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METHOD FOR ESTIMATING CELL POROSITY OF HARDMACS
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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09896363
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Filing Dt:
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06/28/2001
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Title:
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DUAL LAYER BARRIER FILM TECHNIQUES TO PREVENT RESIST POISONING
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09896958
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Filing Dt:
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06/29/2001
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Title:
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SILICON CARBIDE CMOS CHANNEL
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Patent #:
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Issue Dt:
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01/20/2004
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Application #:
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09897517
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Filing Dt:
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06/29/2001
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Title:
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SHALLOW JUNCTION FORMATION
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09897828
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Filing Dt:
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06/29/2001
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Title:
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DEFECT SCREENING USING DELTA VDD
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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09898194
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Filing Dt:
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07/02/2001
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Title:
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PROCESS FOR REMOVAL OF PHOTORESIST MASK USED FOR MAKING VIAS IN LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL, AND FOR REMOVAL OF ETCH RESIDUES FROM FORMATION OF VIAS AND REMOVAL OF PHOTORESIST MASK
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09898267
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Filing Dt:
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07/03/2001
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Title:
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REDUCED PARTICULATE ETCHING
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Patent #:
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Issue Dt:
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08/15/2006
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Application #:
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09900940
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Filing Dt:
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07/09/2001
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Title:
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BLOCK MOVE ENGINE WITH SCALING AND/OR FILTERING FOR VIDEO OR GRAPHICS
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09906331
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Filing Dt:
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07/16/2001
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Title:
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METHOD OF COUPLING CAPACITANCE REDUCTION
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09907202
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Filing Dt:
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07/17/2001
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Title:
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SYSTEM AND METHOD FOR PROVIDING ROW REDUNDANCY WITH NO TIMING PENALTY FOR BUILT-IN-SELF-REPAIR (BISR) IN HIGH DENSITY MEMORIES
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09907424
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Filing Dt:
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07/17/2001
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Title:
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BARRIER AND SEED LAYER SYSTEM
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09909175
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Filing Dt:
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07/19/2001
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Title:
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ARRANGEMENT AND METHOD FOR CONTROLLING THE TRANSMISSION OF A LIGHT SIGNAL BASED ON INTENSITY OF A RECEIVED LIGHT SIGNAL
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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09910088
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Filing Dt:
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07/20/2001
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Title:
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METHODS AND APPARATUS FOR BOOTING A HOST ADAPTER DEVICE DEVOID OF NONVOLATILE PROGRAM MEMORY
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09910464
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Filing Dt:
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07/19/2001
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Publication #:
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Pub Dt:
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03/21/2002
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Title:
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METHOD AND APPARATUS FOR READING AND WRITING A MULTILEVEL SIGNAL FROM AN OPTICAL DISC
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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09910658
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Filing Dt:
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07/20/2001
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Title:
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METHODS AND APPARATUS FOR SAVING AND RESTORING SCATTER/GATHER LIST PROCESSING CONTEXT IN INTELLIGENT CONTROLLERS
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09911209
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Filing Dt:
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07/23/2001
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Publication #:
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Pub Dt:
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12/27/2001
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Title:
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HIGH VOLTAGE CRYSTAL CONTROLLED OSCILLATOR FOR AN ELECTRONIC PEN USED WITH AN ELECTROSTATIC DIGITIZING TABLET
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09915237
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Filing Dt:
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07/25/2001
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Title:
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PROCESS, VOLTAGE AND TEMPERATURE INDEPENDENT CLOCK TREE DESKEW CIRCUITRY-ACTIVE DRIVE METHOD
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Patent #:
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Issue Dt:
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04/25/2006
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Application #:
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09915833
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Filing Dt:
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07/26/2001
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Title:
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METHOD FOR MULTIPROCESSOR COMMUNICATION WITHIN A SHARED MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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09916924
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Filing Dt:
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07/27/2001
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Title:
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SYSTEM AND METHOD FOR STATE RESTORATION IN A DIAGNOSTIC MODULE FOR A HIGH-SPEED MICROPROCESSOR
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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09916958
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Filing Dt:
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07/27/2001
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Title:
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DESIGN SYSTEM UPGRADE MIGRATION
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