|
Total properties:
75
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12505273
|
Filing Dt:
|
07/17/2009
|
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Conductive TSV in Peripheral Region of Die Prior to Wafer Singulaton
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2016
|
Application #:
|
12545390
|
Filing Dt:
|
08/21/2009
|
|
Publication #:
|
|
Pub Dt:
|
02/24/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Dual-Active Sided Semiconductor Die in Fan-Out Wafer Level Chip Scale Package
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2016
|
Application #:
|
12551270
|
Filing Dt:
|
08/31/2009
|
|
Publication #:
|
|
Pub Dt:
|
03/03/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Pre-Molded Semiconductor Die Having Bumps Embedded in Encapsulant
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2015
|
Application #:
|
12617877
|
Filing Dt:
|
11/13/2009
|
|
Publication #:
|
|
Pub Dt:
|
05/19/2011
| | | | |
|
Title:
|
Method of Forming Protective Material Between Semiconductor Die Stacked on Semiconductor Wafer to Reduce Defects During Singulation
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2018
|
Application #:
|
12714190
|
Filing Dt:
|
02/26/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/24/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2018
|
Application #:
|
12717335
|
Filing Dt:
|
03/04/2010
|
|
Publication #:
|
|
Pub Dt:
|
09/08/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PACKAGE-ON-PACKAGE STRUCTURE ELECTRICALLY INTERCONNECTED THROUGH TSV IN WLCSP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2016
|
Application #:
|
12766607
|
Filing Dt:
|
04/23/2010
|
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Openings in Thermally-Conductive Frame of FO-WLCSP to Dissipate Heat and Reduce Package Height
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2016
|
Application #:
|
12773669
|
Filing Dt:
|
05/04/2010
|
|
Publication #:
|
|
Pub Dt:
|
11/10/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Channels in Back Surface of FO-WLCSP for Heat Dissipation
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
12781754
|
Filing Dt:
|
05/17/2010
|
|
Publication #:
|
|
Pub Dt:
|
11/17/2011
| | | | |
|
Title:
|
METHOD OF FORMING PERFORATED OPENING IN BOTTOM SUBSTRATE OF FLIPCHIP POP ASSEMBLY TO REDUCE BLEEDING OF UNDERFILL MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2017
|
Application #:
|
12786008
|
Filing Dt:
|
05/24/2010
|
|
Publication #:
|
|
Pub Dt:
|
11/24/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Ultra Thin Multi-Die Face-to-Face WLCSP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2016
|
Application #:
|
12792031
|
Filing Dt:
|
06/02/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/08/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming EMI Shielding Layer with Conductive Material Around Semiconductor Die
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2016
|
Application #:
|
12794598
|
Filing Dt:
|
06/04/2010
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Sacrificial Adhesive Over Contact Pads of Semiconductor Die
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2017
|
Application #:
|
12822458
|
Filing Dt:
|
06/24/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/29/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Anisotropic Conductive Film Between Semiconductor Die and Build-Up Interconnect Structure
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
12837562
|
Filing Dt:
|
07/16/2010
|
|
Publication #:
|
|
Pub Dt:
|
01/19/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Protective Layer Over Exposed Surfaces of Semiconductor Die
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12870681
|
Filing Dt:
|
08/27/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Leadframe as Vertical Interconnect Structure Between Stacked Semiconductor Die
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2016
|
Application #:
|
12882728
|
Filing Dt:
|
09/15/2010
|
|
Publication #:
|
|
Pub Dt:
|
01/06/2011
| | | | |
|
Title:
|
Chip Scale Module Package in BGA Semiconductor Package
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12882748
|
Filing Dt:
|
09/15/2010
|
|
Publication #:
|
|
Pub Dt:
|
02/03/2011
| | | | |
|
Title:
|
Stackable Package By Using Internal Stacking Modules
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2016
|
Application #:
|
12914878
|
Filing Dt:
|
10/28/2010
|
|
Publication #:
|
|
Pub Dt:
|
05/03/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED INTERPOSER FOR STACKING AND ELECTRICALLY CONNECTING SEMICONDUCTOR DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2019
|
Application #:
|
12947414
|
Filing Dt:
|
11/16/2010
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING FLIPCHIP INTERCONNECT STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12951399
|
Filing Dt:
|
11/22/2010
|
|
Publication #:
|
|
Pub Dt:
|
05/24/2012
| | | | |
|
Title:
|
METHOD OF FORMING PARTIALLY-ETCHED CONDUCTIVE LAYER RECESSED WITHIN SUBSTRATE FOR BONDING TO SEMICONDUCTOR DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2016
|
Application #:
|
12961107
|
Filing Dt:
|
12/06/2010
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Narrow Interconnect Sites on Substrate with Elongated Mask Openings
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
10/27/2015
|
Application #:
|
12961260
|
Filing Dt:
|
12/06/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPENINGS THROUGH ENCAPSULANT TO REDUCE WARPAGE AND STRESS ON SEMICONDUCTOR PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2017
|
Application #:
|
12964823
|
Filing Dt:
|
12/10/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Openings Through Insulating Layer Over Encapsulant for Enhanced Adhesion of Interconnect Structure
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2016
|
Application #:
|
12969451
|
Filing Dt:
|
12/15/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/15/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Flipchip Interconnection Structure with Bump on Partial Pad
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/2015
|
Application #:
|
12985559
|
Filing Dt:
|
01/06/2011
|
|
Publication #:
|
|
Pub Dt:
|
05/05/2011
| | | | |
|
Title:
|
Semiconductor Device with Bump Interconnection
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2012
|
Application #:
|
13032536
|
Filing Dt:
|
02/22/2011
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING WLCSP STRUCTURE USING PROTRUDED MLP
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13038843
|
Filing Dt:
|
03/02/2011
|
|
Publication #:
|
|
Pub Dt:
|
08/30/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming the Device Using Sacrificial Carrier
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2016
|
Application #:
|
13069191
|
Filing Dt:
|
03/22/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Leadframe With Notched Fingers for Stacking Semiconductor Die
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13098419
|
Filing Dt:
|
04/30/2011
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming 3D Inductor from Prefabricated Pillar Frame
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
|
Application #:
|
13098438
|
Filing Dt:
|
04/30/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Embedding TSV Semiconductor Die Within Substrate for Vertical Interconnect in POP
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13098443
|
Filing Dt:
|
04/30/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2016
|
Application #:
|
13098448
|
Filing Dt:
|
04/30/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming an Interconnect Structure with Conductive Material Recessed Within Conductive Ring Over Surface of Conductive Pillar
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2016
|
Application #:
|
13106591
|
Filing Dt:
|
05/12/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/15/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING LEADFRAME WITH CONDUCTIVE BODIES FOR VERTICAL ELECTRICAL INTERCONNECT OF SEMICONDUCTOR DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2018
|
Application #:
|
13107075
|
Filing Dt:
|
05/13/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/15/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Dummy Pillars Between Semiconductor Die and Substrate for Maintaining Standoff Distance
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2016
|
Application #:
|
13112172
|
Filing Dt:
|
05/20/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming 3D Semiconductor Package with Semiconductor Die Stacked Over Semiconductor Wafer
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2016
|
Application #:
|
13172680
|
Filing Dt:
|
06/29/2011
|
|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
|
Title:
|
Semiconductor Device and Method of Wafer Level Package Integration
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
12/01/2015
|
Application #:
|
13181412
|
Filing Dt:
|
07/12/2011
|
|
Publication #:
|
|
Pub Dt:
|
01/26/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming RDL over Contact Pad with High Alignment Tolerance or Reduced Interconnect Pitch
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
12/29/2015
|
Application #:
|
13184253
|
Filing Dt:
|
07/15/2011
|
|
Publication #:
|
|
Pub Dt:
|
03/29/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING TSV INTERPOSER WITH SEMICONDUCTOR DIE AND BUILD-UP INTERCONNECT STRUCTURE ON OPPOSING SURFACES OF THE INTERPOSER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
13190339
|
Filing Dt:
|
07/25/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/17/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO HEAT SPREADER ON TEMPORARY CARRIER AND FORMING POLYMER LAYER AND CONDUCTIVE LAYER OVER THE DIE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2015
|
Application #:
|
13191318
|
Filing Dt:
|
07/26/2011
|
|
Publication #:
|
|
Pub Dt:
|
11/17/2011
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A VERTICAL INTERCONNECT STRUCTURE FOR 3-D FO-WLCSP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2014
|
Application #:
|
13231789
|
Filing Dt:
|
09/13/2011
|
|
Publication #:
|
|
Pub Dt:
|
01/05/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Compliant Stress Relief Buffer Around Large Array WLCSP
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/30/2014
|
Application #:
|
13235413
|
Filing Dt:
|
09/18/2011
|
|
Publication #:
|
|
Pub Dt:
|
01/05/2012
| | | | |
|
Title:
|
Semiconductor Package and Method of Forming Similar Structure for Top and Bottom Bonding Pads
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|
|
|
|
Patent #:
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|
Issue Dt:
|
11/06/2012
|
Application #:
|
13237828
|
Filing Dt:
|
09/20/2011
|
|
Publication #:
|
|
Pub Dt:
|
01/12/2012
| | | | |
|
Title:
|
SOLDER BUMP WITH INNER CORE PILLAR IN SEMICONDUCTOR PACKAGE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/09/2015
|
Application #:
|
13284003
|
Filing Dt:
|
10/28/2011
|
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming WLP With Semiconductor Die Embedded Within Penetrable Encapsulant Between TSV Interposers
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|
|
|
|
Patent #:
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|
Issue Dt:
|
01/12/2016
|
Application #:
|
13334556
|
Filing Dt:
|
12/22/2011
|
|
Publication #:
|
|
Pub Dt:
|
04/19/2012
| | | | |
|
Title:
|
Semiconductor Die and Method of Forming Noise Absorbing Regions Between THVs in Peripheral Region of the Die
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
07/12/2016
|
Application #:
|
13346415
|
Filing Dt:
|
01/09/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/03/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/02/2016
|
Application #:
|
13350692
|
Filing Dt:
|
01/13/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/10/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE INCLUDING PRE-FABRICATED SHIELDING FRAME DISPOSED OVER SEMICONDUCTOR DIE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2016
|
Application #:
|
13365097
|
Filing Dt:
|
02/02/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/24/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Passive Devices
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2016
|
Application #:
|
13403859
|
Filing Dt:
|
02/23/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
|
Title:
|
Semiconductor Device with Thin Profile WLCSP with Vertical Interconnect over Package Footprint
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2017
|
Application #:
|
13403889
|
Filing Dt:
|
02/23/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
|
Title:
|
Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13408715
|
Filing Dt:
|
02/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
|
Title:
|
Double-Sided Semiconductor Device and Method of Forming Top-Side and Bottom-Side Interconnect Structures
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
13420400
|
Filing Dt:
|
03/14/2012
|
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
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Patent #:
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Issue Dt:
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06/20/2017
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Application #:
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13423265
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Filing Dt:
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03/18/2012
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Publication #:
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Pub Dt:
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07/12/2012
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING IPD ON MOLDED SUBSTRATE
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Patent #:
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Issue Dt:
|
12/20/2016
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Application #:
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13423782
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Filing Dt:
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03/19/2012
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING NO-FLOW UNDERFILL MATERIAL AROUND VERTICAL INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
08/20/2013
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Application #:
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13423832
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Filing Dt:
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03/19/2012
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
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Patent #:
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Issue Dt:
|
01/29/2019
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Application #:
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13424484
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Filing Dt:
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03/20/2012
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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Semiconductor Device and Method of Forming Vertical Interconnect Structure in Substrate for IPD and Baseband Circuit Separated by High-Resistivity Molding Compound
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Patent #:
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Issue Dt:
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11/03/2015
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Application #:
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13430538
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Filing Dt:
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03/26/2012
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Publication #:
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Pub Dt:
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07/19/2012
| | | | |
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Title:
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Semiconductor Device and Method of Stacking Die on Leadframe Electrically Connected by Conductive Pillars
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13430577
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Filing Dt:
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03/26/2012
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Publication #:
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Pub Dt:
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07/19/2012
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Title:
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Semiconductor Device and Method of Forming Bond Wires and Stud Bumps in Recessed Region of Peripheral Area around the Device for Electrical Interconnection to Other Devices
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Patent #:
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Issue Dt:
|
01/09/2018
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Application #:
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13438696
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Filing Dt:
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04/03/2012
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Publication #:
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Pub Dt:
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07/26/2012
| | | | |
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Title:
|
Semiconductor Device and Method of Forming a Fan-Out Structure with Integrated Passive Device and Discrete Component
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|
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Patent #:
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Issue Dt:
|
08/16/2016
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Application #:
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13438713
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Filing Dt:
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04/03/2012
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Publication #:
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Pub Dt:
|
07/26/2012
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING B-STAGE CONDUCTIVE POLYMER OVER CONTACT PADS OF SEMICONDUCTOR DIE IN FO-WLCSP
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|
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Patent #:
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Issue Dt:
|
02/16/2016
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Application #:
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13446863
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Filing Dt:
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04/13/2012
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Publication #:
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Pub Dt:
|
08/09/2012
| | | | |
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Title:
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Semiconductor Device Having a Vertical Interconnect Structure Using Stud Bumps
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|
|
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Patent #:
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Issue Dt:
|
01/31/2017
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Application #:
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13469754
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Filing Dt:
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05/11/2012
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Publication #:
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Pub Dt:
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11/15/2012
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF SINGULATING THIN SEMICONDUCTOR WAFER ON CARRIER ALONG MODIFIED REGION WITHIN NON-ACTIVE REGION FORMED BY IRRADIATING ENERGY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
12/19/2017
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Application #:
|
13476410
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Filing Dt:
|
05/21/2012
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Publication #:
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Pub Dt:
|
09/06/2012
| | | | |
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Title:
|
Semiconductor Device and Method of Forming Vertical Interconnect Structure Between Semiconductor Die and Substrate
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/26/2017
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Application #:
|
13529794
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Filing Dt:
|
06/21/2012
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|
Publication #:
|
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Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
Solder Joint Flip Chip Interconnection Having Relief Structure
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|
|
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Patent #:
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NONE
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Issue Dt:
|
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Application #:
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13536120
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Filing Dt:
|
06/28/2012
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Publication #:
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Pub Dt:
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10/18/2012
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Title:
|
Semiconductor Device and Method of Providing Common Voltage Bus and Wire Bondable Redistribution
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|
|
|
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Patent #:
|
|
Issue Dt:
|
05/17/2016
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Application #:
|
13543088
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Filing Dt:
|
07/06/2012
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|
Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
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Title:
|
Semiconductor Device and Method of Forming IPD in Fan-Out Wafer Level Chip Scale Package
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|
|
|
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Patent #:
|
|
Issue Dt:
|
11/03/2015
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Application #:
|
13543618
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Filing Dt:
|
07/06/2012
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Publication #:
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Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
Semiconductor Wafer Having Through-Hole Vias on Saw Streets with Backside Redistribution Layer
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|
|
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Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
13543637
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Filing Dt:
|
07/06/2012
|
|
Publication #:
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|
Pub Dt:
|
11/01/2012
| | | | |
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Title:
|
Semiconductor Device and Method of Forming Wafer Level Multi-Row Etched Lead Package
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/22/2015
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Application #:
|
13546726
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Filing Dt:
|
07/11/2012
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Publication #:
|
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Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING WAFER LEVEL DIE INTEGRATION
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
13553711
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Filing Dt:
|
07/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/08/2012
| | | | |
|
Title:
|
Semiconductor Die and Method of Forming through Organic Vias having Varying Width in Peripheral Region of the Die
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13553739
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Filing Dt:
|
07/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/08/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE INCLUDING CONDUCTIVE THROUGH ORGANIC VIAS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/2016
|
Application #:
|
13555353
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Filing Dt:
|
07/23/2012
|
|
Publication #:
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|
Pub Dt:
|
11/15/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH OPTICAL SENSOR AND METHOD OF FORMING INTERCONNECT STRUCTURE ON FRONT AND BACKSIDE OF THE DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2015
|
Application #:
|
13566287
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Filing Dt:
|
08/03/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING DIE WITH TSV IN CAVITY OF SUBSTRATE FOR ELECTRICAL INTERCONNECT OF FI-POP
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2016
|
Application #:
|
13569088
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Filing Dt:
|
08/07/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Holes in Substrate to Interconnect Top Shield and Ground Shield
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2016
|
Application #:
|
13569105
|
Filing Dt:
|
08/07/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming an IPD over a High-Resistivity Encapsulant Separated from other IPDS and Baseband Circuit
|
|
