Total properties:
84
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2011
|
Application #:
|
11313895
|
Filing Dt:
|
12/21/2005
|
Title:
|
FLOW CONTROL IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2010
|
Application #:
|
11313900
|
Filing Dt:
|
12/21/2005
|
Title:
|
BUFFERING DATA IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2010
|
Application #:
|
11314254
|
Filing Dt:
|
12/21/2005
|
Title:
|
MANAGING DATA FLOWS IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
11314270
|
Filing Dt:
|
12/21/2005
|
Title:
|
MANAGING BUFFER STORAGE IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11314861
|
Filing Dt:
|
12/21/2005
|
Title:
|
TRANSFERRING DATA IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2009
|
Application #:
|
11404187
|
Filing Dt:
|
04/14/2006
|
Title:
|
MANAGING MEMORY IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
11404207
|
Filing Dt:
|
04/14/2006
|
Title:
|
MAPPING MEMORY IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2010
|
Application #:
|
11404281
|
Filing Dt:
|
04/14/2006
|
Title:
|
DIRECTING DATA IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
|
Application #:
|
11404409
|
Filing Dt:
|
04/14/2006
|
Title:
|
COUPLING INTEGRATED CIRCUITS IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
|
Application #:
|
11404461
|
Filing Dt:
|
04/14/2006
|
Title:
|
PROTECTION IN A PARALLEL PROCESSING ENVIRONMENT USING ACCESS INFORMATION ASSOCIATED WITH EACH SWITCH TO PREVENT DATA FROM BEING FORWARDED OUTSIDE A PLURALITY OF TILES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
11404641
|
Filing Dt:
|
04/14/2006
|
Title:
|
MANAGING CACHE MEMORY IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11404654
|
Filing Dt:
|
04/14/2006
|
Title:
|
MANAGING SET ASSOCIATIVE CACHE MEMORY ACCORDING TO ENTRY TYPE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
11404655
|
Filing Dt:
|
04/14/2006
|
Title:
|
MANAGING MEMORY ACCESS IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2009
|
Application #:
|
11404658
|
Filing Dt:
|
04/14/2006
|
Title:
|
COUPLING DATA IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2009
|
Application #:
|
11404958
|
Filing Dt:
|
04/14/2006
|
Title:
|
MANAGING DATA IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
11564694
|
Filing Dt:
|
11/29/2006
|
Title:
|
PATTERN MATCHING IN A MULTIPROCESSOR ENVIRONMENT WITH FINITE STATE AUTOMATON TRANSITIONS BASED ON AN ORDER OF VECTORS IN A STATE TRANSITION TABLE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
11564723
|
Filing Dt:
|
11/29/2006
|
Title:
|
Programming in a Multiprocessor Environment
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2011
|
Application #:
|
11753315
|
Filing Dt:
|
05/24/2007
|
Title:
|
PATTERN MATCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
11753325
|
Filing Dt:
|
05/24/2007
|
Title:
|
PACKET PROCESSING IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
11754016
|
Filing Dt:
|
05/25/2007
|
Title:
|
CACHING IN MULTICORE AND MULTIPROCESSOR ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
11754062
|
Filing Dt:
|
05/25/2007
|
Title:
|
CACHING IN MULTICORE AND MULTIPROCESSOR ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
11754118
|
Filing Dt:
|
05/25/2007
|
Title:
|
CACHING IN MULTICORE AND MULTIPROCESSOR ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
11754162
|
Filing Dt:
|
05/25/2007
|
Title:
|
CACHING IN MULTICORE AND MULTIPROCESSOR ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2012
|
Application #:
|
12028002
|
Filing Dt:
|
02/07/2008
|
Title:
|
COMPILING CODE FOR PARALLEL PROCESSING ARCHITECTURES BASED ON CONTROL FLOW
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2012
|
Application #:
|
12028003
|
Filing Dt:
|
02/07/2008
|
Title:
|
DISTRIBUTING PARALLELISM FOR PARALLEL PROCESSING ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12028005
|
Filing Dt:
|
02/07/2008
|
Title:
|
COMMUNICATION SCHEDULING FOR PARALLEL PROCESSING ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2012
|
Application #:
|
12028007
|
Filing Dt:
|
02/07/2008
|
Title:
|
MEMORY ACCESS ASSIGNMENT FOR PARALLEL PROCESSING ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2012
|
Application #:
|
12036918
|
Filing Dt:
|
02/25/2008
|
Title:
|
COUPLING DATA FOR INTERRUPT PROCESSING IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2010
|
Application #:
|
12110871
|
Filing Dt:
|
04/28/2008
|
Title:
|
MANAGING DATA FORWARDED BETWEEN PROCESSORS IN A PARALLEL PROCESSING ENVIRONMENT BASED ON OPERATIONS ASSOCIATED WITH INSTRUCTIONS ISSUED BY THE PROCESSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
12110956
|
Filing Dt:
|
04/28/2008
|
Title:
|
MANAGING DATA PROVIDED TO SWITCHES IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12169436
|
Filing Dt:
|
07/08/2008
|
Title:
|
CONFIGURING ROUTING IN MESH NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2011
|
Application #:
|
12169442
|
Filing Dt:
|
07/08/2008
|
Title:
|
CONFIGURING ROUTING IN MESH NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2012
|
Application #:
|
12169456
|
Filing Dt:
|
07/08/2008
|
Title:
|
CONFIGURING ROUTING IN MESH NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
12885957
|
Filing Dt:
|
09/20/2010
|
Title:
|
MANAGING SHARED RESOURCE IN AN OPERATING SYSTEM BY DISTRIBUTING REFERENCE TO OBJECT AND SETTING PROTECTION LEVELS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
12885978
|
Filing Dt:
|
09/20/2010
|
Title:
|
LOW-OVERHEAD OPERATING SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2013
|
Application #:
|
12885994
|
Filing Dt:
|
09/20/2010
|
Title:
|
MANAGING CACHE COHERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
12886013
|
Filing Dt:
|
09/20/2010
|
Title:
|
SUPPORTING SECONDARY ATOMIC OPERATIONS USING PRIMARY ATOMIC OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2014
|
Application #:
|
12886050
|
Filing Dt:
|
09/20/2010
|
Title:
|
MANAGING MEMORY REQUESTS BASED ON PRIORITY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2015
|
Application #:
|
12886136
|
Filing Dt:
|
09/20/2010
|
Title:
|
MEMORY CONTROLLER LOAD BALANCING WITH CONFIGURABLE STRIPING DOMAINS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2015
|
Application #:
|
12886163
|
Filing Dt:
|
09/20/2010
|
Title:
|
ROUTE PREDICTION IN PACKET SWITCHED NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
12886346
|
Filing Dt:
|
09/20/2010
|
Title:
|
LOW LATENCY DYNAMIC ROUTE SELECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2015
|
Application #:
|
12886365
|
Filing Dt:
|
09/20/2010
|
Title:
|
MANAGING CACHE ACCESS AND STREAMING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
12886366
|
Filing Dt:
|
09/20/2010
|
Title:
|
CONDENSED ROUTER HEADERS WITH LOW LATENCY OUTPUT PORT CALCULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
12886372
|
Filing Dt:
|
09/20/2010
|
Title:
|
MANAGING HOME CACHE ASSIGNMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
12886376
|
Filing Dt:
|
09/20/2010
|
Title:
|
MANAGING CACHE COHERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
12886382
|
Filing Dt:
|
09/20/2010
|
Title:
|
CONFIGURABLE DEVICE INTERFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
12886386
|
Filing Dt:
|
09/20/2010
|
Title:
|
MEMORY-MAPPED DATA TRANSFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12890996
|
Filing Dt:
|
09/27/2010
|
Title:
|
PATTERN MATCHING IN A MULTIPROCESSOR ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12958920
|
Filing Dt:
|
12/02/2010
|
Title:
|
CACHING IN MULTICORE AND MULTIPROCESSOR ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2011
|
Application #:
|
12966686
|
Filing Dt:
|
12/13/2010
|
Title:
|
CACHING IN MULTICORE AND MULTIPROCESSOR ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
12977565
|
Filing Dt:
|
12/23/2010
|
Title:
|
PATTERN MATCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2012
|
Application #:
|
12983368
|
Filing Dt:
|
01/03/2011
|
Title:
|
MANAGING CACHE MEMORY IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
13188580
|
Filing Dt:
|
07/22/2011
|
Title:
|
PATTERN MATCHING IN A MULTIPROCESSOR ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2012
|
Application #:
|
13190035
|
Filing Dt:
|
07/25/2011
|
Title:
|
CACHING IN MULTICORE AND MULTIPROCESSOR ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13211065
|
Filing Dt:
|
08/16/2011
|
Title:
|
TRANSFERRING AND STORING DATA IN MULTICORE AND MULTIPROCESSOR ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13229294
|
Filing Dt:
|
09/09/2011
|
Title:
|
FLOW CONTROL IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13278663
|
Filing Dt:
|
10/21/2011
|
Title:
|
CONFIGURING ROUTING IN MESH NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2016
|
Application #:
|
13278676
|
Filing Dt:
|
10/21/2011
|
Title:
|
CONFIGURING ROUTING IN MESH NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13280927
|
Filing Dt:
|
10/25/2011
|
Title:
|
COMPUTING IN PARALLEL PROCESSING ENVIRONMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2017
|
Application #:
|
13487361
|
Filing Dt:
|
06/04/2012
|
Publication #:
|
|
Pub Dt:
|
03/21/2013
| | | | |
Title:
|
Packet Processing in a Parallel Processing Environment
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
13491413
|
Filing Dt:
|
06/07/2012
|
Title:
|
MANAGING CACHE MEMORY IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13553884
|
Filing Dt:
|
07/20/2012
|
Title:
|
Caching in Multicore and Multiprocessor Architectures
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
|
Application #:
|
13588141
|
Filing Dt:
|
08/17/2012
|
Title:
|
COMPILING CODE FOR PARALLEL PROCESSING ARCHITECTURES BASED ON CONTROL FLOW
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2016
|
Application #:
|
13789801
|
Filing Dt:
|
03/08/2013
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
Title:
|
HIGH PERFORMANCE, SCALABLE MULTI CHIP INTERCONNECT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2016
|
Application #:
|
14047128
|
Filing Dt:
|
10/07/2013
|
Title:
|
Caching in Multicore and Multiprocessor Architectures
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2016
|
Application #:
|
14154277
|
Filing Dt:
|
01/14/2014
|
Title:
|
MANAGING CACHE MEMORY IN A PARALLEL PROCESSING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2016
|
Application #:
|
14159608
|
Filing Dt:
|
01/21/2014
|
Title:
|
Flow Control In A Parallel Processing Environment
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2021
|
Application #:
|
14208405
|
Filing Dt:
|
03/13/2014
|
Title:
|
CACHE COHERENCY IN MULTIPROCESSOR SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2019
|
Application #:
|
14246213
|
Filing Dt:
|
04/07/2014
|
Title:
|
Global Socket to Socket Cache Coherence Architecture
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2018
|
Application #:
|
14286000
|
Filing Dt:
|
05/23/2014
|
Title:
|
COMPUTING IN PARALLEL PROCESSING ENVIRONMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2018
|
Application #:
|
14450476
|
Filing Dt:
|
08/04/2014
|
Title:
|
Managing Shared Resources In An Operating System
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2018
|
Application #:
|
14450527
|
Filing Dt:
|
08/04/2014
|
Title:
|
CONFIGURABLE DEVICE INTERFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2018
|
Application #:
|
14508027
|
Filing Dt:
|
10/07/2014
|
Title:
|
Multi-Core Processor Using Three Dimensional Integration
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2016
|
Application #:
|
14594299
|
Filing Dt:
|
01/12/2015
|
Title:
|
LOW LATENCY DYNAMIC ROUTE SELECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2018
|
Application #:
|
14636296
|
Filing Dt:
|
03/03/2015
|
Title:
|
Computing In Parallel Processing Environments
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2018
|
Application #:
|
14675935
|
Filing Dt:
|
04/01/2015
|
Title:
|
Programming In A Multiprocessor Environment
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2017
|
Application #:
|
14747044
|
Filing Dt:
|
06/23/2015
|
Title:
|
Memory Controller Load Balancing With Configurable Striping Domains
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2016
|
Application #:
|
14854286
|
Filing Dt:
|
09/15/2015
|
Title:
|
Route Prediction In Packet Switched Networks
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2019
|
Application #:
|
14967665
|
Filing Dt:
|
12/14/2015
|
Title:
|
MANAGING CACHE ACCESS AND STREAMING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2017
|
Application #:
|
15083408
|
Filing Dt:
|
03/29/2016
|
Title:
|
Managing Cache Memory In A Parallel Processing Environment
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2018
|
Application #:
|
15143754
|
Filing Dt:
|
05/02/2016
|
Title:
|
Flow Control In A Parallel Processing Environment
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2019
|
Application #:
|
15201754
|
Filing Dt:
|
07/05/2016
|
Title:
|
CONFIGURING ROUTING IN MESH NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2019
|
Application #:
|
15244171
|
Filing Dt:
|
08/23/2016
|
Title:
|
High Performance, Scalable Multi Chip Interconnect
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2018
|
Application #:
|
15368947
|
Filing Dt:
|
12/05/2016
|
Title:
|
Caching in Multicore and Multiprocessor Architectures
|
|