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Patent #:
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Issue Dt:
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12/02/2014
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Application #:
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13425349
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Filing Dt:
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03/20/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE LAYER OVER METAL SUBSTRATE FOR ELECTRICAL INTERCONNECT OF SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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01/20/2015
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Application #:
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13426416
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Filing Dt:
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03/21/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF SINGULATING SEMICONDUCTOR WAFER ALONG MODIFIED REGION WITHIN NON-ACTIVE REGION FORMED BY IRRADIATING ENERGY THROUGH MOUNTING TAPE
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Patent #:
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Issue Dt:
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07/29/2014
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Application #:
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13426552
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Filing Dt:
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03/21/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL OVER BUMP INTERCONNECT CONDUCTIVE LAYER FOR STRESS RELIEF
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Patent #:
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Issue Dt:
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12/02/2014
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Application #:
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13426561
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Filing Dt:
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03/21/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR FORMING OPENINGS AND TRENCHES IN INSULATING LAYER BY FIRST LDA AND SECOND LDA FOR RDL FORMATION
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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13429119
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Filing Dt:
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03/23/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
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Patent #:
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Issue Dt:
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07/12/2016
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Application #:
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13466945
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Filing Dt:
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05/08/2012
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Publication #:
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Pub Dt:
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11/14/2013
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Title:
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Semiconductor Device and Method of Depositing Underfill Material With Uniform Flow Rate
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Patent #:
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Issue Dt:
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08/02/2016
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Application #:
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13471314
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Filing Dt:
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05/14/2012
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Publication #:
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Pub Dt:
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11/14/2013
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Title:
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Semiconductor Device and Method of Controlling Warpage in Semiconductor Package
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13477982
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Filing Dt:
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05/22/2012
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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Semiconductor Method and Device of Forming a Fan-Out PoP Device with PWB Vertical Interconnect Units
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Patent #:
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Issue Dt:
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07/26/2016
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Application #:
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13488029
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Filing Dt:
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06/04/2012
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Publication #:
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Pub Dt:
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12/05/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF BACKGRINDING AND SINGULATION OF SEMICONDUCTOR WAFER WHILE REDUCING KERF SHIFTING AND PROTECTING WAFER SURFACES
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Patent #:
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Issue Dt:
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01/05/2016
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Application #:
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13489143
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Filing Dt:
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06/05/2012
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Publication #:
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Pub Dt:
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12/05/2013
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Title:
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Semiconductor Device and Method of Reflow Soldering for Conductive Column Structure in Flip Chip Package
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Patent #:
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Issue Dt:
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07/05/2016
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Application #:
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13630912
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Filing Dt:
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09/28/2012
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Publication #:
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Pub Dt:
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04/03/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SUPPORTING LAYER OVER SEMICONDUCTOR DIE IN THIN FAN-OUT WAFER LEVEL CHIP SCALE PACKAGE
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Patent #:
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Issue Dt:
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07/29/2014
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Application #:
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13791375
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Filing Dt:
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03/08/2013
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Publication #:
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Pub Dt:
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10/03/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE CIRCUITRY AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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05/24/2016
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Application #:
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13801294
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Filing Dt:
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03/13/2013
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Publication #:
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Pub Dt:
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09/18/2014
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Title:
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Semiconductor Device and Method of Forming WLCSP with Semiconductor Die Embedded within Interconnect Structure
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Patent #:
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Issue Dt:
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07/05/2016
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Application #:
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13832118
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Filing Dt:
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03/15/2013
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Publication #:
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Pub Dt:
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03/20/2014
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Title:
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Semiconductor Device and Method of Forming Build-Up Interconnect Structures Over Carrier for Testing at Interim Stages
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Patent #:
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Issue Dt:
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01/29/2019
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Application #:
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13832205
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Filing Dt:
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03/15/2013
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Publication #:
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Pub Dt:
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03/20/2014
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Title:
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Semiconductor Device and Method of Forming Dual-Sided Interconnect Structures in FO-WLCSP
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Patent #:
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Issue Dt:
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05/22/2018
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Application #:
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13832449
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Filing Dt:
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03/15/2013
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Publication #:
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Pub Dt:
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03/20/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING DUAL-SIDED INTERCONNECT STRUCTURES IN FO-WLCSP
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Patent #:
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Issue Dt:
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11/15/2016
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Application #:
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13832809
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Filing Dt:
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03/15/2013
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Publication #:
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Pub Dt:
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04/03/2014
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Title:
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Semiconductor Device and Method of Depositing Encapsulant Along Sides and Surface Edge of Semiconductor Die in Embedded WLCSP
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Patent #:
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Issue Dt:
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03/08/2016
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Application #:
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13846593
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Filing Dt:
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03/18/2013
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Publication #:
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Pub Dt:
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09/18/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF CALIBRATING WARPAGE TESTING SYSTEM TO ACCURATELY MEASURE SEMICONDUCTOR PACKAGE WARPAGE
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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13853810
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Filing Dt:
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03/29/2013
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Publication #:
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Pub Dt:
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10/02/2014
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Title:
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Methods of Manufacturing Flip Chip Semiconductor Packages Using Double-Sided Thermal Compression Bonding
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Patent #:
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Issue Dt:
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02/24/2015
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Application #:
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13893616
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Filing Dt:
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05/14/2013
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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METHOD OF FORMING RDL WIDER THAN CONTACT PAD ALONG FIRST AXIS AND NARROWER THAN CONTACT PAD ALONG SECOND
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Patent #:
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Issue Dt:
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01/13/2015
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Application #:
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13896635
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Filing Dt:
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05/17/2013
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Publication #:
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Pub Dt:
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09/26/2013
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Title:
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Semiconductor Device and Method of Forming Partially-Etched Conductive Layer Recessed Within Substrate for Bonding to Semiconductor Die
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Patent #:
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Issue Dt:
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06/03/2014
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Application #:
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13905845
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Filing Dt:
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05/30/2013
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Publication #:
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Pub Dt:
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10/10/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL DURING REFLOW WITH SOLDER MASK PATCH
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13906060
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Filing Dt:
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05/30/2013
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Publication #:
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Pub Dt:
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10/03/2013
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Title:
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Semiconductor Device and Method of Forming Reconstituted Wafer With Larger Carrier to Achieve More EWLB Packages Per Wafer with Encapsulant Deposited Under Temperature and Pressure
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13906489
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Filing Dt:
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05/31/2013
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Publication #:
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Pub Dt:
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10/03/2013
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Title:
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Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue
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Patent #:
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Issue Dt:
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02/09/2016
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Application #:
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13906667
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Filing Dt:
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05/31/2013
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Publication #:
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Pub Dt:
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10/03/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED HEAT SPREADER FRAME WITH EMBEDDED SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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11/11/2014
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Application #:
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13906844
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Filing Dt:
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05/31/2013
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Publication #:
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Pub Dt:
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10/10/2013
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Title:
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SEMICONDUCTOR DEVICE WITH BUMP FORMED ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS
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Patent #:
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Issue Dt:
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10/27/2015
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Application #:
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13910786
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Filing Dt:
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06/05/2013
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Publication #:
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Pub Dt:
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10/10/2013
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Title:
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SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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12/05/2017
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Application #:
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13917982
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Filing Dt:
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06/14/2013
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Publication #:
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Pub Dt:
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10/24/2013
| | | | |
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Title:
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Semiconductor Method and Device of Forming a Fan-Out Device with PWB Vertical Interconnect Units
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Patent #:
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|
Issue Dt:
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12/20/2016
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Application #:
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13928862
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Filing Dt:
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06/27/2013
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Publication #:
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Pub Dt:
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01/01/2015
| | | | |
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Title:
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Semiconductor Device and Method of Individual Die Bonding Followed by Simultaneous Multiple Die Thermal Compression Bonding
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13929426
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Filing Dt:
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06/27/2013
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Publication #:
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Pub Dt:
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01/01/2015
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Title:
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Semiconductor Device and Method of Forming an Interposer Including a Beveled Edge
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Patent #:
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|
Issue Dt:
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04/18/2017
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Application #:
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13929485
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Filing Dt:
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06/27/2013
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Publication #:
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Pub Dt:
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01/01/2015
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Title:
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Semiconductor Device and Method of Forming Trench and Disposing Semiconductor Die Over Substrate to Control Outward Flow of Underfill Material
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13929767
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Filing Dt:
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06/27/2013
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Publication #:
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Pub Dt:
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01/01/2015
| | | | |
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Title:
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Methods of Forming Conductive Materials on Contact Pads
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Patent #:
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Issue Dt:
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11/29/2016
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Application #:
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13929775
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Filing Dt:
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06/27/2013
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Publication #:
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Pub Dt:
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01/01/2015
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Title:
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METHODS OF FORMING CONDUCTIVE JUMPER TRACES
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Patent #:
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Issue Dt:
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08/02/2016
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Application #:
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13929776
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Filing Dt:
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06/27/2013
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Publication #:
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Pub Dt:
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01/01/2015
| | | | |
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Title:
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Methods of Forming Conductive and Insulating Layers
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Patent #:
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|
Issue Dt:
|
06/14/2016
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Application #:
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13930980
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Filing Dt:
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06/28/2013
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Publication #:
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Pub Dt:
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01/01/2015
| | | | |
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Title:
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Semiconductor Device and Method of Using Substrate With Conductive Posts and Protective Layers to Form Embedded Sensor Die Package
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Patent #:
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|
Issue Dt:
|
03/17/2015
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Application #:
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13931397
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Filing Dt:
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06/28/2013
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Publication #:
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Pub Dt:
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01/01/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING LOW PROFILE 3D FAN-OUT PACKAGE
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Patent #:
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Issue Dt:
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07/05/2016
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Application #:
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13935053
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Filing Dt:
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07/03/2013
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Publication #:
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Pub Dt:
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11/07/2013
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE WITH EMBEDDED DIE
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Patent #:
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Issue Dt:
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01/20/2015
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Application #:
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13935312
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Filing Dt:
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07/03/2013
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Publication #:
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Pub Dt:
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11/07/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
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Patent #:
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Issue Dt:
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05/03/2016
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Application #:
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13944783
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Filing Dt:
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07/17/2013
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Publication #:
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Pub Dt:
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11/14/2013
| | | | |
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Title:
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Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13944825
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Filing Dt:
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07/17/2013
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Publication #:
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Pub Dt:
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11/14/2013
| | | | |
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Title:
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Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die
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|
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Patent #:
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|
Issue Dt:
|
03/07/2017
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Application #:
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14011491
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Filing Dt:
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08/27/2013
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Publication #:
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Pub Dt:
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12/26/2013
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION
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|
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Patent #:
|
|
Issue Dt:
|
06/02/2015
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Application #:
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14017963
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Filing Dt:
|
09/04/2013
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
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Title:
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Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
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|
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Patent #:
|
|
Issue Dt:
|
03/10/2015
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Application #:
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14018282
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Filing Dt:
|
09/04/2013
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Publication #:
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Pub Dt:
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01/02/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE HAVING BALANCED BAND-PASS FILTER IMPLEMENTED WITH LC RESONATORS
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Patent #:
|
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Issue Dt:
|
07/22/2014
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Application #:
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14020996
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/02/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
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Patent #:
|
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Issue Dt:
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11/18/2014
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Application #:
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14021056
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Filing Dt:
|
09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure
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Patent #:
|
|
Issue Dt:
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07/19/2016
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Application #:
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14021208
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
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Title:
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Optical Semiconductor Device Having Pre-Molded Leadframe with Window and Method Therefor
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14021740
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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14021914
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
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Patent #:
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Issue Dt:
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03/28/2017
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Application #:
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14036193
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Filing Dt:
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09/25/2013
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Publication #:
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Pub Dt:
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03/26/2015
| | | | |
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Title:
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Semiconductor Device and Method of Controlling Warpage in Reconstituted Wafer
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/01/2017
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Application #:
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14036525
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Filing Dt:
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09/25/2013
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Publication #:
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Pub Dt:
|
07/03/2014
| | | | |
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Title:
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Semiconductor Device and Method of Using a Standardized Carrier to Form Embedded Wafer Level Chip Scale Packages
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Patent #:
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Issue Dt:
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01/26/2016
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Application #:
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14038339
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Filing Dt:
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09/26/2013
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Publication #:
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Pub Dt:
|
06/26/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF SIMULTANEOUS MOLDING AND THERMALCOMPRESSION BONDING
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Patent #:
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Issue Dt:
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07/11/2017
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Application #:
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14038575
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Filing Dt:
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09/26/2013
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Publication #:
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Pub Dt:
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06/12/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Low Profile Fan-Out Package with Vertical Interconnection Units
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Patent #:
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Issue Dt:
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03/15/2016
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Application #:
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14039092
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Filing Dt:
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09/27/2013
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Publication #:
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Pub Dt:
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06/26/2014
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Title:
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Semiconductor Device and Method of Bonding Semiconductor Die to Substrate in Reconstituted Wafer Form
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Patent #:
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Issue Dt:
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01/19/2016
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Application #:
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14039418
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Filing Dt:
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09/27/2013
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Publication #:
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Pub Dt:
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06/26/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING BUMPLESS FLIPCHIP INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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08/14/2018
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Application #:
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14061244
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Filing Dt:
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10/23/2013
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Publication #:
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Pub Dt:
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02/20/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
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Patent #:
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Issue Dt:
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07/07/2015
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Application #:
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14063274
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Filing Dt:
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10/25/2013
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Publication #:
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Pub Dt:
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02/20/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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07/11/2017
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Application #:
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14070509
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Filing Dt:
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11/02/2013
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Publication #:
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Pub Dt:
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07/03/2014
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Title:
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Semiconductor Device and Method of Forming Embedded Wafer Level Chip Scale Packages
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14082155
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Filing Dt:
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11/17/2013
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Publication #:
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Pub Dt:
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03/13/2014
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Title:
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Semiconductor Device and Method of Forming Conductive THV and RDL on Opposite Sides of Semiconductor Die for RDL-to-RDL Bonding
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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14084745
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Filing Dt:
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11/20/2013
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Publication #:
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Pub Dt:
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03/13/2014
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Title:
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Semiconductor Device and Method of Forming Multi-Layered UBM with Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor Wafer
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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14087653
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Filing Dt:
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11/22/2013
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Publication #:
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Pub Dt:
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03/20/2014
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Title:
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Semiconductor Device with Protective Layer Over Exposed Surfaces of Semiconductor Die
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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14090036
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Filing Dt:
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11/26/2013
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Publication #:
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Pub Dt:
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03/27/2014
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Title:
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SEMICONDUCTOR DEVICE WITH DUMMY METAL PROTECTIVE STRUCTURE AROUND SEMICONDUCTOR DIE FOR LOCALIZED PLANARIZATION OF INSULATING LAYER
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Patent #:
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Issue Dt:
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04/11/2017
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Application #:
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14097534
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Filing Dt:
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12/05/2013
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Publication #:
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Pub Dt:
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04/03/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF USING A STANDARDIZED CARRIER IN SEMICONDUCTOR PACKAGING
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Patent #:
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Issue Dt:
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12/12/2017
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Application #:
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14135415
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Filing Dt:
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12/19/2013
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Publication #:
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Pub Dt:
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04/17/2014
| | | | |
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Title:
|
Semiconductor Device and Method of Forming a POP Device with Embedded Vertical Interconnect Units
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Patent #:
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Issue Dt:
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08/25/2015
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Application #:
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14138382
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Filing Dt:
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12/23/2013
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Publication #:
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Pub Dt:
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04/17/2014
| | | | |
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Title:
|
Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability
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Patent #:
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Issue Dt:
|
04/05/2016
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Application #:
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14138646
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Filing Dt:
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12/23/2013
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
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Title:
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Semiconductor Package and Method of Mounting Semiconductor Die to Opposite Sides of TSV Substrate
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Patent #:
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Issue Dt:
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06/09/2015
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Application #:
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14143891
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Filing Dt:
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12/30/2013
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
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Title:
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Semiconductor Device and Method of Making TSV Interconnect Structures Using Encapsulant for Structural Support
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Patent #:
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|
Issue Dt:
|
06/13/2017
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Application #:
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14144906
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Filing Dt:
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12/31/2013
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL WITH SOLDER MASK PATCH
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14154049
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Filing Dt:
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01/13/2014
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Publication #:
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Pub Dt:
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05/08/2014
| | | | |
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Title:
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EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
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Patent #:
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Issue Dt:
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12/22/2015
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Application #:
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14160796
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Filing Dt:
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01/22/2014
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Publication #:
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Pub Dt:
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05/15/2014
| | | | |
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Title:
|
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14170295
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Filing Dt:
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01/31/2014
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Publication #:
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Pub Dt:
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05/29/2014
| | | | |
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Title:
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Flip Chip Interconnection Structure
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14181429
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Filing Dt:
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02/14/2014
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Publication #:
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Pub Dt:
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06/12/2014
| | | | |
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Title:
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Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP Coating
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Patent #:
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|
Issue Dt:
|
06/21/2016
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Application #:
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14192706
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Filing Dt:
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02/27/2014
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Publication #:
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Pub Dt:
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06/26/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES
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Patent #:
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Issue Dt:
|
06/20/2017
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Application #:
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14193267
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Filing Dt:
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02/28/2014
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Publication #:
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Pub Dt:
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09/11/2014
| | | | |
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Title:
|
Semiconductor Device and Method of Forming Embedded Conductive Layer for Power/Ground Planes in FO-EWLB
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Patent #:
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|
Issue Dt:
|
08/02/2016
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Application #:
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14214120
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Filing Dt:
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03/14/2014
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Publication #:
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Pub Dt:
|
07/17/2014
| | | | |
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Title:
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EXTENDED REDISTRIBUTION LAYERS BUMPED WAFER
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Patent #:
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|
Issue Dt:
|
05/24/2016
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Application #:
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14223695
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Filing Dt:
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03/24/2014
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Publication #:
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Pub Dt:
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10/30/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING STRESS-REDUCED CONDUCTIVE JOINT STRUCTURES
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Patent #:
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Issue Dt:
|
05/02/2017
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Application #:
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14224931
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Filing Dt:
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03/25/2014
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Publication #:
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Pub Dt:
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07/24/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE
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Patent #:
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Issue Dt:
|
03/21/2017
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Application #:
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14249307
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Filing Dt:
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04/09/2014
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Publication #:
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Pub Dt:
|
08/07/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street
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Patent #:
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Issue Dt:
|
10/25/2016
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Application #:
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14256047
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Filing Dt:
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04/18/2014
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Publication #:
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Pub Dt:
|
08/14/2014
| | | | |
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Title:
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Semiconductor Device with Conductive Pillars Having Recesses or Protrusions to Detect Interconnect Continuity Between Semiconductor Die and Substrate
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Patent #:
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Issue Dt:
|
11/11/2014
|
Application #:
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14258300
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Filing Dt:
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04/22/2014
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Publication #:
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Pub Dt:
|
08/14/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch
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Patent #:
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Issue Dt:
|
10/25/2016
|
Application #:
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14267777
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Filing Dt:
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05/01/2014
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Publication #:
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Pub Dt:
|
08/28/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV
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Patent #:
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Issue Dt:
|
06/20/2017
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Application #:
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14268316
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Filing Dt:
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05/02/2014
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Publication #:
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Pub Dt:
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08/28/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL AROUND BUMP INTERCONNECT
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Patent #:
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Issue Dt:
|
07/18/2017
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Application #:
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14275213
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Filing Dt:
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05/12/2014
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Publication #:
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Pub Dt:
|
09/18/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming a Dual UBM Structure for Lead Free Bump Connections
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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14303484
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Filing Dt:
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06/12/2014
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Publication #:
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Pub Dt:
|
10/02/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Shielding Layer Over Active Surface of Semiconductor Die
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Patent #:
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Issue Dt:
|
06/21/2016
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Application #:
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14305185
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Filing Dt:
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06/16/2014
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Publication #:
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Pub Dt:
|
10/02/2014
| | | | |
|
Title:
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SOLDER JOINT FLIP CHIP INTERCONNECTION
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
14321370
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Filing Dt:
|
07/01/2014
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|
Publication #:
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|
Pub Dt:
|
10/23/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer
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Patent #:
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Issue Dt:
|
01/09/2018
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Application #:
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14326789
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Filing Dt:
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07/09/2014
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|
Publication #:
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|
Pub Dt:
|
10/30/2014
| | | | |
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Title:
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SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
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Patent #:
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Issue Dt:
|
01/26/2016
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Application #:
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14328348
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Filing Dt:
|
07/10/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
|
Title:
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STACKABLE PACKAGE BY USING INTERNAL STACKING MODULES
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Patent #:
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Issue Dt:
|
03/03/2020
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Application #:
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14329162
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Filing Dt:
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07/11/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH ROUTING DENSITY INTERCONNECT SITES ON SUBSTRATE
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Patent #:
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Issue Dt:
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09/20/2016
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Application #:
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14329464
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Filing Dt:
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07/11/2014
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Publication #:
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Pub Dt:
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04/30/2015
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF BALANCING SURFACES OF AN EMBEDDED PCB UNIT WITH A DUMMY COPPER PATTERN
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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14330704
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Filing Dt:
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07/14/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Stacked Semiconductor Die and Conductive Interconnect Structure Through an Encapsulant
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Patent #:
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Issue Dt:
|
05/02/2017
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Application #:
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14332631
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Filing Dt:
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07/16/2014
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Publication #:
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Pub Dt:
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11/06/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INDUCTOR OVER INSULATING MATERIAL FILLED TRENCH IN SUBSTRATE
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Patent #:
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Issue Dt:
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10/24/2017
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Application #:
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14334229
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Filing Dt:
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07/17/2014
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Publication #:
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Pub Dt:
|
11/06/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
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Patent #:
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Issue Dt:
|
05/10/2016
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Application #:
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14340436
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Filing Dt:
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07/24/2014
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Publication #:
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Pub Dt:
|
11/13/2014
| | | | |
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Title:
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Integrated Circuit Package System with Removable Backing Element Having Plated Terminal Leads and Method of Manufacture Thereof
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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14449869
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Filing Dt:
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08/01/2014
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Publication #:
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Pub Dt:
|
11/20/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
01/31/2017
|
Application #:
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14494508
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Filing Dt:
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09/23/2014
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Publication #:
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|
Pub Dt:
|
01/08/2015
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SACRIFICIAL PROTECTIVE LAYER TO PROTECT SEMICONDUCTOR DIE EDGE DURING SINGULATION
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Patent #:
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Issue Dt:
|
10/03/2017
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Application #:
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14503086
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Filing Dt:
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09/30/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PAD LAYOUT FOR FLIPCHIP SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
12/01/2015
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Application #:
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14509785
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Filing Dt:
|
10/08/2014
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|
Publication #:
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|
Pub Dt:
|
01/22/2015
| | | | |
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Title:
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Semiconductor Device and Method of Forming Thermal Lid for Balancing Warpage and Thermal Management
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Patent #:
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Issue Dt:
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08/01/2017
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Application #:
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14514190
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Filing Dt:
|
10/14/2014
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Publication #:
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|
Pub Dt:
|
01/29/2015
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
01/31/2017
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Application #:
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14523556
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Filing Dt:
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10/24/2014
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|
Publication #:
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Pub Dt:
|
03/05/2015
| | | | |
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Title:
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Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-Applied Protective Layer
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Patent #:
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Issue Dt:
|
06/13/2017
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Application #:
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14572298
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Filing Dt:
|
12/16/2014
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|
Publication #:
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|
Pub Dt:
|
04/09/2015
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Conductive Layer Over Substrate with Vents to Channel Bump Material and Reduce Interconnect Voids
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|
