skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:008744/0555   Pages: 9
Recorded: 10/16/1997
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 25
1
Patent #:
Issue Dt:
03/20/1979
Application #:
05808112
Filing Dt:
06/20/1977
Title:
DISTRIBUTED DATA PROCESSING SYSTEM
2
Patent #:
Issue Dt:
10/18/1983
Application #:
06220902
Filing Dt:
12/29/1980
Title:
COMPUTER HAVING AN INDEXED LOCAL RAM TO STORE PREVIOUSLY TRANSLATED VIRTUAL ADDRESSES
3
Patent #:
Issue Dt:
03/27/1984
Application #:
06542556
Filing Dt:
10/17/1983
Title:
DATA PROCESSING MACHINE WITH IMPROVED CACHE MEMORY MANAGEMENT
4
Patent #:
Issue Dt:
08/04/1987
Application #:
06704359
Filing Dt:
02/22/1985
Title:
SIMPLIFIED CACHE WITH AUTOMATIC UPDATE
5
Patent #:
Issue Dt:
08/09/1988
Application #:
06810795
Filing Dt:
12/19/1985
Title:
METHOD AND APPARATUS FOR FLOATING POINT OPERATIONS
6
Patent #:
Issue Dt:
01/17/1989
Application #:
07080722
Filing Dt:
07/30/1987
Title:
MEMORY ADDRESS GENERATOR WITH DEVICE ADDRESS TYPE SPECIFIER
7
Patent #:
Issue Dt:
01/23/1990
Application #:
07088936
Filing Dt:
08/24/1987
Title:
MEANS FOR ROUTING EVENTS FROM KEY STROKES IN A MULTI-PROCESSING COMPUTER SYSTEMS
8
Patent #:
Issue Dt:
07/24/1990
Application #:
07179162
Filing Dt:
04/08/1988
Title:
MEMORY DIAGNOSTIC APPARATUS AND METHOD
9
Patent #:
Issue Dt:
03/26/1991
Application #:
07213401
Filing Dt:
06/30/1988
Title:
INTERFACE CONTROLLER WITH FIRST AND SECOND BUFFER STORAGE AREA FOR RECEIVING AND TRANSMITTING DATA BETWEEN I/O BUS AND HIGH SPEED SYTEM BUS
10
Patent #:
Issue Dt:
08/10/1993
Application #:
07213402
Filing Dt:
06/30/1988
Title:
SYSTEM BUS HAVING MULTIPLEXED COMMAND/ID AND DATA
11
Patent #:
Issue Dt:
07/23/1991
Application #:
07288506
Filing Dt:
12/22/1988
Title:
APPARATUS AND METHOD FOR EXECUTING A CONDITIONAL BRANCH INSTRUCTION
12
Patent #:
Issue Dt:
10/29/1991
Application #:
07291847
Filing Dt:
12/29/1988
Title:
PROCESSOR /COPROCESSOR INTERFACE APPARATUS INCLUDING MICROINSTRUCTION CLOCK SYNCHRONIZATION
13
Patent #:
Issue Dt:
03/03/1992
Application #:
07367297
Filing Dt:
06/15/1989
Title:
INFORMATION PROCESSING SYSTEM EMULATION APPARATUS AND METHOD
14
Patent #:
Issue Dt:
05/05/1992
Application #:
07615729
Filing Dt:
11/19/1990
Title:
ADJUSTING DELAY CIRCUITRY
15
Patent #:
Issue Dt:
03/17/1992
Application #:
07719064
Filing Dt:
06/18/1991
Title:
MULTI-PROCESSOR SYSTEM WITH CACHE MEMORIES
16
Patent #:
Issue Dt:
11/09/1993
Application #:
07786327
Filing Dt:
10/31/1991
Title:
METHOD AND APPARATUS FOR PROVIDING MEMORY SYSTEM STATUS SIGNALS
17
Patent #:
Issue Dt:
11/09/1993
Application #:
07912052
Filing Dt:
07/07/1992
Title:
I/O BUS TO SYSTEM INTERFACE
18
Patent #:
Issue Dt:
02/01/2000
Application #:
08092628
Filing Dt:
07/15/1993
Title:
MULTIPLE MODE MEMORY MODULE
19
Patent #:
Issue Dt:
11/29/1994
Application #:
08127981
Filing Dt:
09/27/1993
Title:
DATA PROCESSOR THAT CUSTOMIZES PROGRAM BEHAVIOR BY USING A RESOURCE RETRIEVAL CAPABILITY
20
Patent #:
Issue Dt:
12/27/1994
Application #:
08134806
Filing Dt:
10/12/1993
Title:
APPARATUS AND METHODS FOR REDUCING NUMBERS OF READ-MODIFY-WRITE CYCLES TO A MEMORY, AND FOR IMPROVING DMA EFFICIENCY
21
Patent #:
Issue Dt:
12/12/1995
Application #:
08135113
Filing Dt:
10/12/1993
Title:
CLOCK FREQUENCY MULTIPLYING AND SQUARING CIRCUIT AND METHOD
22
Patent #:
Issue Dt:
09/24/1996
Application #:
08236878
Filing Dt:
04/29/1994
Title:
SYSTEM WITH CLOCK FREQUENCY CONTROLLER RESPONSIVE TO INTERRUPT INDEPENDENT OF SOFTWARE ROUTINE AND SOFTWARE LOOP REPEATEDLY EXECUTING INSTRUCTION TO SLOW DOWN SYSTEM CLOCK
23
Patent #:
Issue Dt:
04/04/1995
Application #:
08261318
Filing Dt:
06/16/1994
Title:
CPU HAVING PIPELINED INSTRUCTION UNIT AND EFFECTIVE ADDRESS CALCULATION UNIT WITH RETAINED VIRTUAL ADDRESS CAPABILITY
24
Patent #:
Issue Dt:
09/16/1997
Application #:
08303853
Filing Dt:
09/09/1994
Title:
APPARATUS AND METHODS FOR REDUCING NUMBERS OF READ-MODIFY-WRITE CYCLES TO A MEMORY, AND FOR IMPROVING DMA EFFICIENCY
25
Patent #:
Issue Dt:
07/30/1996
Application #:
08343268
Filing Dt:
11/22/1994
Title:
METHOD AND APPARATUS FOR EXECUTING AN ATOMIC READ-MODIFY-WRITE INSTRUCTION
Assignor
1
Exec Dt:
08/29/1997
Assignee
1
416 MAETAN-DONG, PALDAL-KU
SUWON, KYUNGI-DO, KOREA, REPUBLIC OF
Correspondence name and address
BANNER & WITCOFF, LTD.
MICHAEL H. SHANAHAN
ONE FINANCIAL CENTER, 45TH FLOOR
BOSTON, MA 02111

Search Results as of: 05/27/2024 07:14 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT