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Patent Assignment Details

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Reel/Frame:	030596/0562			Pages:	6
		Recorded:	06/12/2013
Attorney Dkt #:	IBM - ID
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 12

Patent #:	6115066	Issue Dt:	09/05/2000	Application #:	08876694	Filing Dt:	06/12/1997
Title:	IMAGE SENSOR WITH DIRECT DIGITAL CORRELATED SAMPLING

Patent #:	6336160	Issue Dt:	01/01/2002	Application #:	09100717	Filing Dt:	06/19/1998
Title:	METHOD AND SYSTEM FOR DIVIDING A COMPUTER PROCESSOR REGISTER INTO SECTORS AND STORING FREQUENTLY USED VALUES THEREIN

Patent #:	6338103	Issue Dt:	01/08/2002	Application #:	09275567	Filing Dt:	03/24/1999
Title:	SYSTEM FOR HIGH-SPEED DATA TRANSFER USING A SEQUENCE OF OVERLAPPED GLOBAL POINTFER SIGNALS FOR GENERATING CORRESPONDING SEQUENCE OF NON-OVERLAPPED LOCAL POINTER SIGNALS

Patent #:	6972770	Issue Dt:	12/06/2005	Application #:	09377642	Filing Dt:	08/19/1999
Title:	METHOD AND APPARATUS FOR PERFORMING RASTER OPRATIONS IN A DATA PROCESSING SYSTEM

Patent #:	6977928	Issue Dt:	12/20/2005	Application #:	09548906	Filing Dt:	04/13/2000
Title:	METHOD AND SYSTEM FOR DATA FLOW MULTICASTING

Patent #:	6335494	Issue Dt:	01/01/2002	Application #:	09602911	Filing Dt:	06/23/2000
Title:	Multiple power distribution for delta-I noise reduction

Patent #:	6335214	Issue Dt:	01/01/2002	Application #:	09665395	Filing Dt:	09/20/2000
Title:	SOI circuit with dual-gate transistors

Patent #:	6978016	Issue Dt:	12/20/2005	Application #:	09740245	Filing Dt:	12/19/2000
Publication #:	US20050185791	Pub Dt:	08/25/2005
Title:	CIRCUITS FOR CALCULATING MODULAR MULTIPLICATIVE INVERSE

Patent #:	6980551	Issue Dt:	12/27/2005	Application #:	09903723	Filing Dt:	07/12/2001
Publication #:	US20030016669	Pub Dt:	01/23/2003
Title:	FULL TRANSMISSION CONTROL PROTOCOL OFF-LOAD

Patent #:	6933186	Issue Dt:	08/23/2005	Application #:	09961009	Filing Dt:	09/21/2001
Publication #:	US20030059992	Pub Dt:	03/27/2003
Title:	METHOD FOR BEOL RESISTOR TOLERANCE IMPROVEMENT USING ANODIC OXIDATION

Patent #:	6984997	Issue Dt:	01/10/2006	Application #:	10714215	Filing Dt:	11/13/2003
Publication #:	US20050104608	Pub Dt:	05/19/2005
Title:	METHOD AND SYSTEM FOR TESTING MULTI-CHIP INTEGRATED CIRCUIT MODULES

Patent #:	6974335	Issue Dt:	12/13/2005	Application #:	10905879	Filing Dt:	01/25/2005
Title:	INTERCHANGEABLE MULTI-FORM FACTOR MODULE SOCKET

Assignor

Exec Dt:

06/04/2013

Assignee

GOLDEN TOWER 10FL., #511 SAMSEONG-RO, GANGNAM-GU

SEOUL, KOREA, REPUBLIC OF 135-090

Correspondence name and address
	H.C. PARK & ASSOCIATES, PLC
	1894 PRESTON WHITE DRIVE
	RESTON, VA 20191

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