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Total properties:
32
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Patent #:
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Issue Dt:
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11/16/1999
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Application #:
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08475421
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Filing Dt:
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06/07/1995
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Title:
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ACTIVE HIERARCHICAL BITLINE MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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08759166
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Filing Dt:
|
12/03/1996
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Title:
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REDUCING THE MEMORY REQUIRED FOR DECOMPRESSION BY STORING COMPRESSED INFORMATION USING DCT BASED TECHNIQUES
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Patent #:
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Issue Dt:
|
03/14/2000
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Application #:
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08771645
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Filing Dt:
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12/21/1996
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Title:
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BURN-IN STRESS TEST MODE
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Patent #:
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Issue Dt:
|
01/04/2000
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Application #:
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08775632
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Filing Dt:
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12/31/1996
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Title:
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HIGH VOLTAGE TERMINATION WITH BURIED FIELD-SHAPING REGION
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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08852278
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Filing Dt:
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05/07/1997
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Title:
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PROGRAMMING THE INDUCTANCE OF READ/WRITE HEADS
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Patent #:
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Issue Dt:
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12/28/1999
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Application #:
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08854667
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Filing Dt:
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05/12/1997
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Title:
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SHORT CIRCUIT PROTECTION CIRCUIT FOR A LOW-SIDE DRIVER CIRCUIT
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Patent #:
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Issue Dt:
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12/21/1999
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Application #:
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08865641
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Filing Dt:
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05/30/1997
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Title:
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LAYOUT FOR SRAM STRUCTURE
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Patent #:
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Issue Dt:
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02/08/2000
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Application #:
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08866895
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Filing Dt:
|
05/30/1997
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Title:
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METHOD OF FORMING INTEGRATED CIRCUIT TRANSISTORS USING SACRIFICIAL SPACER
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Patent #:
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Issue Dt:
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12/21/1999
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Application #:
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08874868
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Filing Dt:
|
06/13/1997
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Title:
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POWER DOWN BRAKE LATCH CIRCUIT FOR A BRUSHLESS DC MOTOR
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Patent #:
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Issue Dt:
|
01/04/2000
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Application #:
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08887204
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Filing Dt:
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07/02/1997
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Title:
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SOLID STATE FINGERPRINT SENSOR PACKAGING APPARATUS AND METHOD
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Patent #:
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Issue Dt:
|
02/29/2000
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Application #:
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08921864
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Filing Dt:
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08/22/1997
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Title:
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VOLTAGE REGULATOR CIRCUIT
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Patent #:
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Issue Dt:
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04/18/2000
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Application #:
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08928447
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Filing Dt:
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09/12/1997
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Title:
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METHOD AND CIRCUIT FOR ENABLING RAPID FLUX REVERSAL IN THE COIL OF A WRITE HEAD ASSOCIATED WITH A COMPUTER DISK DRIVE, OR THE LIKE
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Patent #:
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Issue Dt:
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07/25/2000
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Application #:
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08943382
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Filing Dt:
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10/02/1997
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Title:
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A LANDING PAD STRUCTURE IN AN INTEGRATED CIRCUIT
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|
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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08956837
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Filing Dt:
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10/23/1997
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Title:
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METHOD AND APPARATUS FOR IMPROVED TRANSITION FROM PULSE WIDTH MODULATION TO LINEAR CONTROL
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|
|
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Patent #:
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|
Issue Dt:
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02/22/2000
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Application #:
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08957568
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Filing Dt:
|
10/24/1997
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Title:
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INTEGRATED RELEASED BEAM SENSOR FOR SENSING ACCELERATION AND ASSOCIATED METHODS
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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08960947
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Filing Dt:
|
10/30/1997
|
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Title:
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SURFACE MOUNTABLE INTEGRATED CIRCUIT PACKAGE WITH DETACHABLE MODULE AND INTERPOSER
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|
|
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Patent #:
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Issue Dt:
|
02/22/2000
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Application #:
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08972917
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Filing Dt:
|
11/18/1997
|
|
Title:
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PICTURE MEMORY MAPPING TO MINIMIZE MEMORY BANDWIDTH IN COMPRESSION AND DECOMPRESSION OF DATA SEQUENCES
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|
|
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Patent #:
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|
Issue Dt:
|
03/07/2000
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Application #:
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08978382
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Filing Dt:
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11/25/1997
|
|
Title:
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METHOD OF FORMING SUBMICRON CONTACTS AND VIAS IN AN INTEGRATED CIRCUIT
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|
|
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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08978547
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Filing Dt:
|
11/26/1997
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Title:
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MOTOR CONTROL CIRCUIT AND METHOD WITH DIGITAL LEVEL SHIFTING
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|
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Patent #:
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|
Issue Dt:
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12/21/1999
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Application #:
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08980465
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Filing Dt:
|
11/28/1997
|
|
Title:
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FIELD EMISSION DISPLAY FABRICATION METHOD
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|
|
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Patent #:
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|
Issue Dt:
|
05/16/2000
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Application #:
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08989094
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Filing Dt:
|
12/11/1997
|
|
Title:
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METHOD OF RETRACTING A READ AND/OR WRITE HEAD FOR PARKING
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|
|
|
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Patent #:
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|
Issue Dt:
|
02/15/2000
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Application #:
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08989953
|
Filing Dt:
|
12/12/1997
|
|
Title:
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METHOD OF FORMING A LANDING PAD STRUCTURE IN AN INTEGRATED CIRCUIT
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|
|
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Patent #:
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|
Issue Dt:
|
12/28/1999
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Application #:
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08992446
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Filing Dt:
|
12/17/1997
|
|
Title:
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ELECTRONIC SPEED LIMIT NOTIFICATION SYSTEM
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|
|
|
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Patent #:
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|
Issue Dt:
|
11/30/1999
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Application #:
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08995192
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Filing Dt:
|
12/22/1997
|
|
Title:
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OSCILLATOR USING A TIME CONSTANT CIRCUIT BASED ON CYCLIC HEATING AND COOLING
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|
|
|
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Patent #:
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|
Issue Dt:
|
02/08/2000
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Application #:
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08996457
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Filing Dt:
|
12/23/1997
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|
Title:
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METHOD OF FORMING AN INTEGRATED CIRCUIT HAVING SPACER AFTER SHALLOW TRENCH FILL AND INTEGRATED CIRCUIT FORMED THEREBY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
12/21/1999
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Application #:
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09020430
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Filing Dt:
|
02/09/1998
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|
Title:
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CIRCUIT AND METHOD FOR SETTING THE TIME DURATION OF A WRITE TO A MEMORY CELL
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/07/2000
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Application #:
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09030149
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Filing Dt:
|
02/25/1998
|
|
Title:
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INTEGRATED CIRCUIT WITH IMPROVED ELECTROSTATIC DISCHARGE PROTECTION INCLUDING MULTI-LEVEL INDUCTOR
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2000
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Application #:
|
09073417
|
Filing Dt:
|
05/06/1998
|
|
Title:
|
METHOD OF FORMING AN INTEGRATED CIRCUIT DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
09087399
|
Filing Dt:
|
05/29/1998
|
|
Title:
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CIRCUIT AND METHOD FOR READING A MEMORY CELL
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
09094135
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Filing Dt:
|
06/09/1998
|
|
Title:
|
STRESS REDUCTION FOR FLIP CHIP PACKAGE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
09152729
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Filing Dt:
|
09/14/1998
|
|
Title:
|
METHOD OF IMPROVING PHOTORESIST ADHESION ON A DIELECTRIC LAYER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2000
|
Application #:
|
09227941
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Filing Dt:
|
01/11/1999
|
|
Title:
|
ESD PROTECTION CIRCUITS
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