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Patent Assignment Details
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Reel/Frame:029549/0633   Pages: 13
Recorded: 12/28/2012
Attorney Dkt #:6757-38500
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE STATE OF INCORPORATION OF THE ASSIGNOR WITHIN THE ASSIGNMENT DOCUMENT PREVIOUSLY RECORDED ON REEL 024045 FRAME 0739. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Total properties: 2
1
Patent #:
Issue Dt:
02/27/2001
Application #:
09159120
Filing Dt:
09/23/1998
Title:
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
2
Patent #:
Issue Dt:
06/03/2003
Application #:
10101039
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
08/01/2002
Title:
FLEXIBLE CIRCUIT CONNECTOR FOR STACKED CHIP MODULE
Assignor
1
Exec Dt:
09/27/2000
Assignee
1
8900 SHOAL CREEK BLVD.
SUITE 125
AUSTIN, TEXAS 78758
Correspondence name and address
DAWN DELUCA
1120 SOUTH CAPITAL OF TEXAS HIGHWAY
BUILDING 2, SUITE 300
AUSTIN, TX 78746

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