Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 014863/0651 | |
| Pages: | 5 |
| | Recorded: | 07/19/2004 | | |
| Conveyance: | CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). |
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Total properties:
9
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Patent #:
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Issue Dt:
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06/22/2004
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Application #:
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08193725
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Filing Dt:
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02/09/1994
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Title:
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METHOD OF FABRICATING A ONE-SIDED POLYSILICON THIN FILM TRANSISTOR
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Patent #:
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Issue Dt:
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05/25/2004
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Application #:
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09144302
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Filing Dt:
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08/31/1998
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Publication #:
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Pub Dt:
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01/16/2003
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Title:
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RESERVATION STATIONS TO INCREASE INSTRUCTION LEVEL PARALLELISM
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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09594831
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Filing Dt:
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06/14/2000
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Title:
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BOOST CAPACITOR LAYOUT
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Patent #:
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Issue Dt:
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03/16/2004
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Application #:
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09632388
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Filing Dt:
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08/03/2000
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Title:
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SEMICONDUCTOR STRUCTURE HAVING AN IMPROVED PRE-METAL DIELECTRIC STACK AND METHOD FOR FORMING THE SAME
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09659885
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Filing Dt:
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09/12/2000
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Title:
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METHOD OF OPERATING A VERTICAL DMOS TRANSISTOR WITH SCHOTTKY DIODE BODY STRUCTURE
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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09712827
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Filing Dt:
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11/14/2000
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Title:
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METHOD AND INTERLEVEL DIELECTRIC STRUCTURE FOR IMPROVED METAL STEP COVERAGE
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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09792962
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Filing Dt:
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02/26/2001
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Publication #:
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Pub Dt:
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01/24/2002
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Title:
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INTEGRATED SENSOR HAVING PLURALITY OF RELEASED BEAMS FOR SENSING ACCELERATION AND ASSOCIATED METHODS
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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09800039
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Filing Dt:
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03/06/2001
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Publication #:
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Pub Dt:
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07/26/2001
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Title:
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CMOS INTEGRATED CIRCUIT DEVICE WITH LDD N-CHANNEL TRANSISTOR AND NON-LDD P-CHANNEL TRANSISTOR
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Patent #:
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Issue Dt:
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12/09/2003
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Application #:
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10305437
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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10/09/2003
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Title:
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MEMORY MASKING FOR PERIPHERY SALICIDATION OF ACTIVE REGIONS
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Assignee
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| 1310 ELECTRONICS DRIVE |
| CARROLLTON, TEXAS 75006 |
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Correspondence name and address
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MARIO J. DONATO, JR.
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1310 ELECTRONICS DRIVE
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CARROLLTON, TX 75006
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