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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:065700/0656   Pages: 10
Recorded: 11/29/2023
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 5
1
Patent #:
Issue Dt:
12/19/2023
Application #:
17697856
Filing Dt:
03/17/2022
Publication #:
Pub Dt:
09/21/2023
Title:
CONFIGURATION LATCH FOR PROGRAMMABLE LOGIC DEVICE
2
Patent #:
Issue Dt:
05/16/2023
Application #:
17697862
Filing Dt:
03/17/2022
Title:
SECTIONAL CONFIGURATION FOR PROGRAMMABLE LOGIC DEVICES
3
Patent #:
Issue Dt:
12/19/2023
Application #:
17714136
Filing Dt:
04/05/2022
Publication #:
Pub Dt:
10/05/2023
Title:
PROGRAMMABLE LOGIC DEVICE WITH DESIGN FOR TEST FUNCTIONALITY
4
Patent #:
Issue Dt:
03/19/2024
Application #:
17725564
Filing Dt:
04/21/2022
Publication #:
Pub Dt:
10/26/2023
Title:
AREA-EFFICIENT CONFIGURATION LATCH FOR PROGRAMMABLE LOGIC DEVICE
5
Patent #:
NONE
Issue Dt:
Application #:
18307699
Filing Dt:
04/26/2023
Publication #:
Pub Dt:
11/02/2023
Title:
SECTIONAL CONFIGURATION FOR PROGRAMMABLE LOGIC DEVICES
Assignor
1
Exec Dt:
12/21/2018
Assignee
1
224 AIRPORT PARKWAY
SAN JOSE, CALIFORNIA 95110
Correspondence name and address
PATTY CHENG
2625 MIDDLEFIELD RD., #215
PALO ALTO, CA 94306

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