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Patent Assignment Details
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Reel/Frame:019028/0674   Pages: 6
Recorded: 03/19/2007
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 35
1
Patent #:
Issue Dt:
01/08/2002
Application #:
09255108
Filing Dt:
02/22/1999
Title:
IN LINE YIELD PREDICTION USING ADC DETERMINED KILL RATIOS DIE HEALTH STATISTICS AND DIE STACKING
2
Patent #:
Issue Dt:
03/12/2002
Application #:
09263699
Filing Dt:
03/05/1999
Title:
EFFECT OF DOPED AMORPHOUS SI THICKNESS ON BETTER POLY 1 CONTACT RESISTANCE PERFORMANCE FOR NAND TYPE FLASH MEMORY DEVICES
3
Patent #:
Issue Dt:
02/06/2001
Application #:
09263701
Filing Dt:
03/05/1999
Title:
METHOD TO ELIMATE SILICIDE CRACKING FOR NAND TYPE FLASH MEMORY DEVICES BY IMPLANTING A POLISH RATE IMPROVER INTO THE SECOND POLYSILICON LAYER AND POLISHING IT
4
Patent #:
Issue Dt:
10/30/2001
Application #:
09263983
Filing Dt:
03/05/1999
Publication #:
Pub Dt:
11/29/2001
Title:
METHOD OF FORMING HIGH K TANTALUM PENTOXIDE TA205 INSTEAD OF ONO STACKED FILMS TO INCREASE COUPLING RATIO AND IMPROVE RELIABILITY FOR FLASH MEMORY DEVICES
5
Patent #:
Issue Dt:
12/19/2000
Application #:
09266714
Filing Dt:
03/11/1999
Title:
AMMONIA ANNEALED AND WET OXIDIZED LPCVD OXIDE TO REPLACE ONO FILMS FOR HIGH INTEGRATED FLASH MEMORY DEVICES
6
Patent #:
Issue Dt:
04/30/2002
Application #:
09322195
Filing Dt:
05/28/1999
Title:
METHOD OF UTILIZING FAST CHIP ERASE TO SCREEN ENDURANCE REJECTS
7
Patent #:
Issue Dt:
03/20/2001
Application #:
09349603
Filing Dt:
07/09/1999
Title:
METHOD OF FORMING SELECT GATE TO IMPROVE RELIABILITY AND PERFORMANCE FOR NAND TYPE FLASH MEMORY DEVICES
8
Patent #:
Issue Dt:
05/29/2001
Application #:
09353267
Filing Dt:
07/14/1999
Title:
REDUCTION OF VOLTAGE STRESS ACROSS A GATE OXIDE AND ACROSS A JUNCTION WITHIN A HIGH VOLTAGE TRANSISTOR OF AN ERASABLE MEMORY DEVICE
9
Patent #:
Issue Dt:
10/09/2001
Application #:
09368073
Filing Dt:
08/03/1999
Title:
METHOD FOR REDUCED GATE ASPECT RATIO TO IMPROVE GAP-FILL AFTER SPACER ETCH
10
Patent #:
Issue Dt:
11/27/2001
Application #:
09368247
Filing Dt:
08/03/1999
Title:
METHOD FOR MONITORING SECOND GATE OVER-ETCH IN A SEMICONDUCTOR DEVICE
11
Patent #:
Issue Dt:
06/25/2002
Application #:
09387018
Filing Dt:
08/31/1999
Title:
CONTINOUS CAPACITOR DIVIDER SAMPLED REGULATION SCHEME
12
Patent #:
Issue Dt:
07/09/2002
Application #:
09387421
Filing Dt:
08/31/1999
Title:
EMBEDDED METHODOLOGY TO PROGRAM/ERASE REFERENCE CELLS USED IN SENSING FLASH CELLS
13
Patent #:
Issue Dt:
09/11/2001
Application #:
09392675
Filing Dt:
09/08/1999
Title:
PROCESS FOR FABRICATING AN MNOS FLASH MEMORY DEVICE
14
Patent #:
Issue Dt:
03/13/2001
Application #:
09409542
Filing Dt:
09/30/1999
Title:
METHOD AND APPARATUS FOR MEASURING SUBTHRESHOLD CURRENT IN A MEMORY ARRAY
15
Patent #:
Issue Dt:
01/14/2003
Application #:
09413621
Filing Dt:
10/06/1999
Title:
IN-SITU PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE WITH INTEGRAL REMOVAL OF ANTIREFLECTION AND ETCH STOP LAYERS
16
Patent #:
Issue Dt:
01/23/2001
Application #:
09421762
Filing Dt:
10/19/1999
Title:
SEPARATE OUTPUT POWER SUPPLY TO REDUCE OUTPUT NOISE FOR A SIMULTANEOUS OPERATION FLASH MEMORY DEVICE
17
Patent #:
Issue Dt:
10/28/2003
Application #:
09483176
Filing Dt:
01/13/2000
Title:
METHOD AND SYSTEM FOR PROCESSING A SEMICONDUCTOR DEVICE
18
Patent #:
Issue Dt:
12/12/2000
Application #:
09498205
Filing Dt:
02/04/2000
Title:
Noise reduction during simultaneous operation of a flash memory device
19
Patent #:
Issue Dt:
06/05/2001
Application #:
09504186
Filing Dt:
02/15/2000
Title:
Two-stage pipeline sensing for page mode flash memory
20
Patent #:
Issue Dt:
04/01/2003
Application #:
09531871
Filing Dt:
03/21/2000
Title:
METHOD AND APPARATUS FOR EQUALIZATION OF ADDRESS TRANSITION DETECTION PULSE WIDTH
21
Patent #:
Issue Dt:
10/23/2001
Application #:
09538922
Filing Dt:
03/30/2000
Title:
Method and system for fabricating a flash memory array
22
Patent #:
Issue Dt:
09/10/2002
Application #:
09539307
Filing Dt:
03/30/2000
Title:
METHOD AND SYSTEM FOR PROCESSING A SEMICONDUCTOR DEVICE
23
Patent #:
Issue Dt:
07/10/2001
Application #:
09557728
Filing Dt:
04/26/2000
Title:
Matching loading between sensing reference and memory cell with reduced transistor count in a dual-bank flash memory
24
Patent #:
Issue Dt:
08/26/2003
Application #:
09563179
Filing Dt:
05/02/2000
Title:
FLASH MEMORY ARRAY AND A METHOD AND SYSTEM OF FABRICATION THEREOF
25
Patent #:
Issue Dt:
04/30/2002
Application #:
09656675
Filing Dt:
09/07/2000
Title:
USING A NEGATIVE GATE ERASE TO INCREASE THE CYCLING ENDURANCE OF A NON-VOLATILE MEMORY CELL WITH AN OXIDE-NITRIDE-OXIDE (ONO) STRUCTURE
26
Patent #:
Issue Dt:
09/11/2001
Application #:
09675940
Filing Dt:
09/29/2000
Title:
Method and apparatus for continuously regulating a charge pump output voltage using a capacitor divider
27
Patent #:
Issue Dt:
12/31/2002
Application #:
09684694
Filing Dt:
10/04/2000
Title:
USING A LOW DRAIN BIAS DURING ERASE VERIFY TO ENSURE COMPLETE REMOVAL OF RESIDUAL CHARGE IN THE NITRIDE IN SONOS NON-VOLATILE MEMORIES
28
Patent #:
Issue Dt:
02/04/2003
Application #:
09698485
Filing Dt:
10/30/2000
Title:
THIN OXIDE ANTI-FUSE
29
Patent #:
Issue Dt:
06/25/2002
Application #:
09774327
Filing Dt:
01/31/2001
Publication #:
Pub Dt:
06/28/2001
Title:
FLASH MEMORY DEVICE WITH MONITOR STRUCTURE FOR MONITORING SECOND GATE OVER-ETCH
30
Patent #:
Issue Dt:
08/14/2001
Application #:
09774509
Filing Dt:
01/31/2001
Title:
Reduction of voltage stress across a gate oxide and across a junction within a high voltage transistor of an erasable memory device
31
Patent #:
Issue Dt:
04/23/2002
Application #:
09811288
Filing Dt:
03/16/2001
Publication #:
Pub Dt:
08/23/2001
Title:
Method for reduced gate aspect ratio to improve gap-fill after spacer etch
32
Patent #:
Issue Dt:
02/11/2003
Application #:
09902332
Filing Dt:
07/10/2001
Title:
USING HOT CARRIER INJECTION TO CONTROL OVER-PROGRAMMING IN A NON-VOLATILE MEMORY CELL HAVING AN OXIDE-NITRIDE-OXIDE (ONO) STRUCTURE
33
Patent #:
Issue Dt:
10/29/2002
Application #:
09925205
Filing Dt:
08/08/2001
Publication #:
Pub Dt:
03/07/2002
Title:
METHOD AND SYSTEM FOR ETCHING TUNNEL OXIDE TO REDUCE UNDERCUTTING DURING MEMORY ARRAY FABRICATION
34
Patent #:
Issue Dt:
12/27/2005
Application #:
09941370
Filing Dt:
08/28/2001
Title:
FLASH MEMORY DEVICE AND A METHOD OF FABRICATION THEREOF
35
Patent #:
Issue Dt:
11/09/2004
Application #:
10260061
Filing Dt:
09/27/2002
Title:
FLASH MEMORY HAVING IMPROVED CORE FIELD ISOLATION IN SELECT GATE REGIONS
Assignor
1
Exec Dt:
01/31/2007
Assignee
1
915 DEGUIGNE DRIVE, P.O. BOX 3453
MAIL STOP 250
SUNNYVALE, CALIFORNIA 94088-3453
Correspondence name and address
RAYMOND E. FRITZ
915 DEGUIGNE DRIVE, P.O. BOX 3453
MAIL STOP 250
SUNNYVALE, CA 94088-3453

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